cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cerf.c (4298B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * linux/arch/arm/mach-sa1100/cerf.c
      4 *
      5 * Apr-2003 : Removed some old PDA crud [FB]
      6 * Oct-2003 : Added uart2 resource [FB]
      7 * Jan-2004 : Removed io map for flash [FB]
      8 */
      9
     10#include <linux/init.h>
     11#include <linux/gpio/machine.h>
     12#include <linux/kernel.h>
     13#include <linux/tty.h>
     14#include <linux/platform_data/sa11x0-serial.h>
     15#include <linux/platform_device.h>
     16#include <linux/irq.h>
     17#include <linux/mtd/mtd.h>
     18#include <linux/mtd/partitions.h>
     19#include <linux/gpio.h>
     20#include <linux/leds.h>
     21
     22#include <mach/hardware.h>
     23#include <asm/setup.h>
     24
     25#include <asm/mach-types.h>
     26#include <asm/mach/arch.h>
     27#include <asm/mach/flash.h>
     28#include <asm/mach/map.h>
     29
     30#include <mach/cerf.h>
     31#include <linux/platform_data/mfd-mcp-sa11x0.h>
     32#include <mach/irqs.h>
     33#include "generic.h"
     34
     35static struct resource cerfuart2_resources[] = {
     36	[0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
     37};
     38
     39static struct platform_device cerfuart2_device = {
     40	.name		= "sa11x0-uart",
     41	.id		= 2,
     42	.num_resources	= ARRAY_SIZE(cerfuart2_resources),
     43	.resource	= cerfuart2_resources,
     44};
     45
     46/* Compact Flash */
     47static struct gpiod_lookup_table cerf_cf_gpio_table = {
     48	.dev_id = "sa11x0-pcmcia.1",
     49	.table = {
     50		GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH),
     51		GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH),
     52		GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH),
     53		GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH),
     54		GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW),
     55		{ },
     56	},
     57};
     58
     59/* LEDs */
     60struct gpio_led cerf_gpio_leds[] = {
     61	{
     62		.name			= "cerf:d0",
     63		.default_trigger	= "heartbeat",
     64		.gpio			= 0,
     65	},
     66	{
     67		.name			= "cerf:d1",
     68		.default_trigger	= "cpu0",
     69		.gpio			= 1,
     70	},
     71	{
     72		.name			= "cerf:d2",
     73		.default_trigger	= "default-on",
     74		.gpio			= 2,
     75	},
     76	{
     77		.name			= "cerf:d3",
     78		.default_trigger	= "default-on",
     79		.gpio			= 3,
     80	},
     81
     82};
     83
     84static struct gpio_led_platform_data cerf_gpio_led_info = {
     85	.leds		= cerf_gpio_leds,
     86	.num_leds	= ARRAY_SIZE(cerf_gpio_leds),
     87};
     88
     89static struct platform_device *cerf_devices[] __initdata = {
     90	&cerfuart2_device,
     91};
     92
     93#ifdef CONFIG_SA1100_CERF_FLASH_32MB
     94#  define CERF_FLASH_SIZE	0x02000000
     95#elif defined CONFIG_SA1100_CERF_FLASH_16MB
     96#  define CERF_FLASH_SIZE	0x01000000
     97#elif defined CONFIG_SA1100_CERF_FLASH_8MB
     98#  define CERF_FLASH_SIZE	0x00800000
     99#else
    100#  error "Undefined flash size for CERF"
    101#endif
    102
    103static struct mtd_partition cerf_partitions[] = {
    104	{
    105		.name		= "Bootloader",
    106		.size		= 0x00020000,
    107		.offset		= 0x00000000,
    108	}, {
    109		.name		= "Params",
    110		.size		= 0x00040000,
    111		.offset		= 0x00020000,
    112	}, {
    113		.name		= "Kernel",
    114		.size		= 0x00100000,
    115		.offset		= 0x00060000,
    116	}, {
    117		.name		= "Filesystem",
    118		.size		= CERF_FLASH_SIZE-0x00160000,
    119		.offset		= 0x00160000,
    120	}
    121};
    122
    123static struct flash_platform_data cerf_flash_data = {
    124	.map_name	= "cfi_probe",
    125	.parts		= cerf_partitions,
    126	.nr_parts	= ARRAY_SIZE(cerf_partitions),
    127};
    128
    129static struct resource cerf_flash_resource =
    130	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
    131
    132static void __init cerf_init_irq(void)
    133{
    134	sa1100_init_irq();
    135	irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
    136}
    137
    138static struct map_desc cerf_io_desc[] __initdata = {
    139  	{	/* Crystal Ethernet Chip */
    140		.virtual	=  0xf0000000,
    141		.pfn		= __phys_to_pfn(0x08000000),
    142		.length		= 0x00100000,
    143		.type		= MT_DEVICE
    144	}
    145};
    146
    147static void __init cerf_map_io(void)
    148{
    149	sa1100_map_io();
    150	iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
    151
    152	sa1100_register_uart(0, 3);
    153	sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
    154	sa1100_register_uart(2, 1);
    155}
    156
    157static struct mcp_plat_data cerf_mcp_data = {
    158	.mccr0		= MCCR0_ADM,
    159	.sclk_rate	= 11981000,
    160};
    161
    162static void __init cerf_init(void)
    163{
    164	sa11x0_ppc_configure_mcp();
    165	platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
    166	gpio_led_register_device(-1, &cerf_gpio_led_info);
    167	sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
    168	sa11x0_register_mcp(&cerf_mcp_data);
    169	sa11x0_register_pcmcia(1, &cerf_cf_gpio_table);
    170}
    171
    172MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
    173	/* Maintainer: support@intrinsyc.com */
    174	.map_io		= cerf_map_io,
    175	.nr_irqs	= SA1100_NR_IRQS,
    176	.init_irq	= cerf_init_irq,
    177	.init_time	= sa1100_timer_init,
    178	.init_machine	= cerf_init,
    179	.init_late	= sa11x0_init_late,
    180	.restart	= sa11x0_restart,
    181MACHINE_END