cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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headsmp.S (978B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * arch/arm/mach-spear13XX/headsmp.S
      4 *
      5 * Picked from realview
      6 * Copyright (c) 2012 ST Microelectronics Limited
      7 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
      8 */
      9
     10#include <linux/linkage.h>
     11#include <linux/init.h>
     12
     13	__INIT
     14
     15/*
     16 * spear13xx specific entry point for secondary CPUs. This provides
     17 * a "holding pen" into which all secondary cores are held until we're
     18 * ready for them to initialise.
     19 */
     20ENTRY(spear13xx_secondary_startup)
     21	mrc	p15, 0, r0, c0, c0, 5
     22	and	r0, r0, #15
     23	adr	r4, 1f
     24	ldmia	r4, {r5, r6}
     25	sub	r4, r4, r5
     26	add	r6, r6, r4
     27pen:	ldr	r7, [r6]
     28	cmp	r7, r0
     29	bne	pen
     30
     31	/* re-enable coherency */
     32	mrc	p15, 0, r0, c1, c0, 1
     33	orr	r0, r0, #(1 << 6) | (1 << 0)
     34	mcr	p15, 0, r0, c1, c0, 1
     35	/*
     36	 * we've been released from the holding pen: secondary_stack
     37	 * should now contain the SVC stack for this core
     38	 */
     39	b	secondary_startup
     40
     41	.align
     421:	.long	.
     43	.long	spear_pen_release
     44ENDPROC(spear13xx_secondary_startup)