cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spear300.c (4496B)


      1/*
      2 * arch/arm/mach-spear3xx/spear300.c
      3 *
      4 * SPEAr300 machine source file
      5 *
      6 * Copyright (C) 2009-2012 ST Microelectronics
      7 * Viresh Kumar <vireshk@kernel.org>
      8 *
      9 * This file is licensed under the terms of the GNU General Public
     10 * License version 2. This program is licensed "as is" without any
     11 * warranty of any kind, whether express or implied.
     12 */
     13
     14#define pr_fmt(fmt) "SPEAr300: " fmt
     15
     16#include <linux/amba/pl08x.h>
     17#include <linux/of_platform.h>
     18#include <asm/mach/arch.h>
     19#include "generic.h"
     20#include "spear.h"
     21
     22/* DMAC platform data's slave info */
     23struct pl08x_channel_data spear300_dma_info[] = {
     24	{
     25		.bus_id = "uart0_rx",
     26		.min_signal = 2,
     27		.max_signal = 2,
     28		.muxval = 0,
     29		.periph_buses = PL08X_AHB1,
     30	}, {
     31		.bus_id = "uart0_tx",
     32		.min_signal = 3,
     33		.max_signal = 3,
     34		.muxval = 0,
     35		.periph_buses = PL08X_AHB1,
     36	}, {
     37		.bus_id = "ssp0_rx",
     38		.min_signal = 8,
     39		.max_signal = 8,
     40		.muxval = 0,
     41		.periph_buses = PL08X_AHB1,
     42	}, {
     43		.bus_id = "ssp0_tx",
     44		.min_signal = 9,
     45		.max_signal = 9,
     46		.muxval = 0,
     47		.periph_buses = PL08X_AHB1,
     48	}, {
     49		.bus_id = "i2c_rx",
     50		.min_signal = 10,
     51		.max_signal = 10,
     52		.muxval = 0,
     53		.periph_buses = PL08X_AHB1,
     54	}, {
     55		.bus_id = "i2c_tx",
     56		.min_signal = 11,
     57		.max_signal = 11,
     58		.muxval = 0,
     59		.periph_buses = PL08X_AHB1,
     60	}, {
     61		.bus_id = "irda",
     62		.min_signal = 12,
     63		.max_signal = 12,
     64		.muxval = 0,
     65		.periph_buses = PL08X_AHB1,
     66	}, {
     67		.bus_id = "adc",
     68		.min_signal = 13,
     69		.max_signal = 13,
     70		.muxval = 0,
     71		.periph_buses = PL08X_AHB1,
     72	}, {
     73		.bus_id = "to_jpeg",
     74		.min_signal = 14,
     75		.max_signal = 14,
     76		.muxval = 0,
     77		.periph_buses = PL08X_AHB1,
     78	}, {
     79		.bus_id = "from_jpeg",
     80		.min_signal = 15,
     81		.max_signal = 15,
     82		.muxval = 0,
     83		.periph_buses = PL08X_AHB1,
     84	}, {
     85		.bus_id = "ras0_rx",
     86		.min_signal = 0,
     87		.max_signal = 0,
     88		.muxval = 1,
     89		.periph_buses = PL08X_AHB1,
     90	}, {
     91		.bus_id = "ras0_tx",
     92		.min_signal = 1,
     93		.max_signal = 1,
     94		.muxval = 1,
     95		.periph_buses = PL08X_AHB1,
     96	}, {
     97		.bus_id = "ras1_rx",
     98		.min_signal = 2,
     99		.max_signal = 2,
    100		.muxval = 1,
    101		.periph_buses = PL08X_AHB1,
    102	}, {
    103		.bus_id = "ras1_tx",
    104		.min_signal = 3,
    105		.max_signal = 3,
    106		.muxval = 1,
    107		.periph_buses = PL08X_AHB1,
    108	}, {
    109		.bus_id = "ras2_rx",
    110		.min_signal = 4,
    111		.max_signal = 4,
    112		.muxval = 1,
    113		.periph_buses = PL08X_AHB1,
    114	}, {
    115		.bus_id = "ras2_tx",
    116		.min_signal = 5,
    117		.max_signal = 5,
    118		.muxval = 1,
    119		.periph_buses = PL08X_AHB1,
    120	}, {
    121		.bus_id = "ras3_rx",
    122		.min_signal = 6,
    123		.max_signal = 6,
    124		.muxval = 1,
    125		.periph_buses = PL08X_AHB1,
    126	}, {
    127		.bus_id = "ras3_tx",
    128		.min_signal = 7,
    129		.max_signal = 7,
    130		.muxval = 1,
    131		.periph_buses = PL08X_AHB1,
    132	}, {
    133		.bus_id = "ras4_rx",
    134		.min_signal = 8,
    135		.max_signal = 8,
    136		.muxval = 1,
    137		.periph_buses = PL08X_AHB1,
    138	}, {
    139		.bus_id = "ras4_tx",
    140		.min_signal = 9,
    141		.max_signal = 9,
    142		.muxval = 1,
    143		.periph_buses = PL08X_AHB1,
    144	}, {
    145		.bus_id = "ras5_rx",
    146		.min_signal = 10,
    147		.max_signal = 10,
    148		.muxval = 1,
    149		.periph_buses = PL08X_AHB1,
    150	}, {
    151		.bus_id = "ras5_tx",
    152		.min_signal = 11,
    153		.max_signal = 11,
    154		.muxval = 1,
    155		.periph_buses = PL08X_AHB1,
    156	}, {
    157		.bus_id = "ras6_rx",
    158		.min_signal = 12,
    159		.max_signal = 12,
    160		.muxval = 1,
    161		.periph_buses = PL08X_AHB1,
    162	}, {
    163		.bus_id = "ras6_tx",
    164		.min_signal = 13,
    165		.max_signal = 13,
    166		.muxval = 1,
    167		.periph_buses = PL08X_AHB1,
    168	}, {
    169		.bus_id = "ras7_rx",
    170		.min_signal = 14,
    171		.max_signal = 14,
    172		.muxval = 1,
    173		.periph_buses = PL08X_AHB1,
    174	}, {
    175		.bus_id = "ras7_tx",
    176		.min_signal = 15,
    177		.max_signal = 15,
    178		.muxval = 1,
    179		.periph_buses = PL08X_AHB1,
    180	},
    181};
    182
    183/* Add SPEAr300 auxdata to pass platform data */
    184static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
    185	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
    186			&pl022_plat_data),
    187	OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
    188			&pl080_plat_data),
    189	{}
    190};
    191
    192static void __init spear300_dt_init(void)
    193{
    194	pl080_plat_data.slave_channels = spear300_dma_info;
    195	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
    196
    197	of_platform_default_populate(NULL, spear300_auxdata_lookup, NULL);
    198}
    199
    200static const char * const spear300_dt_board_compat[] = {
    201	"st,spear300",
    202	"st,spear300-evb",
    203	NULL,
    204};
    205
    206static void __init spear300_map_io(void)
    207{
    208	spear3xx_map_io();
    209}
    210
    211DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
    212	.map_io		=	spear300_map_io,
    213	.init_time	=	spear3xx_timer_init,
    214	.init_machine	=	spear300_dt_init,
    215	.restart	=	spear_restart,
    216	.dt_compat	=	spear300_dt_board_compat,
    217MACHINE_END