cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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copypage-feroceon.c (3133B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  linux/arch/arm/mm/copypage-feroceon.S
      4 *
      5 *  Copyright (C) 2008 Marvell Semiconductors
      6 *
      7 * This handles copy_user_highpage and clear_user_page on Feroceon
      8 * more optimally than the generic implementations.
      9 */
     10#include <linux/init.h>
     11#include <linux/highmem.h>
     12
     13static void feroceon_copy_user_page(void *kto, const void *kfrom)
     14{
     15	int tmp;
     16
     17	asm volatile ("\
     181:	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     19	pld	[%1, #0]			\n\
     20	pld	[%1, #32]			\n\
     21	pld	[%1, #64]			\n\
     22	pld	[%1, #96]			\n\
     23	pld	[%1, #128]			\n\
     24	pld	[%1, #160]			\n\
     25	pld	[%1, #192]			\n\
     26	stmia	%0, {r2 - r7, ip, lr}		\n\
     27	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     28	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     29	add	%0, %0, #32			\n\
     30	stmia	%0, {r2 - r7, ip, lr}		\n\
     31	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     32	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     33	add	%0, %0, #32			\n\
     34	stmia	%0, {r2 - r7, ip, lr}		\n\
     35	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     36	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     37	add	%0, %0, #32			\n\
     38	stmia	%0, {r2 - r7, ip, lr}		\n\
     39	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     40	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     41	add	%0, %0, #32			\n\
     42	stmia	%0, {r2 - r7, ip, lr}		\n\
     43	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     44	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     45	add	%0, %0, #32			\n\
     46	stmia	%0, {r2 - r7, ip, lr}		\n\
     47	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     48	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     49	add	%0, %0, #32			\n\
     50	stmia	%0, {r2 - r7, ip, lr}		\n\
     51	ldmia	%1!, {r2 - r7, ip, lr}		\n\
     52	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     53	add	%0, %0, #32			\n\
     54	stmia	%0, {r2 - r7, ip, lr}		\n\
     55	subs	%2, %2, #(32 * 8)		\n\
     56	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     57	add	%0, %0, #32			\n\
     58	bne	1b				\n\
     59	mcr	p15, 0, %2, c7, c10, 4		@ drain WB"
     60	: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
     61	: "2" (PAGE_SIZE)
     62	: "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
     63}
     64
     65void feroceon_copy_user_highpage(struct page *to, struct page *from,
     66	unsigned long vaddr, struct vm_area_struct *vma)
     67{
     68	void *kto, *kfrom;
     69
     70	kto = kmap_atomic(to);
     71	kfrom = kmap_atomic(from);
     72	flush_cache_page(vma, vaddr, page_to_pfn(from));
     73	feroceon_copy_user_page(kto, kfrom);
     74	kunmap_atomic(kfrom);
     75	kunmap_atomic(kto);
     76}
     77
     78void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr)
     79{
     80	void *ptr, *kaddr = kmap_atomic(page);
     81	asm volatile ("\
     82	mov	r1, %2				\n\
     83	mov	r2, #0				\n\
     84	mov	r3, #0				\n\
     85	mov	r4, #0				\n\
     86	mov	r5, #0				\n\
     87	mov	r6, #0				\n\
     88	mov	r7, #0				\n\
     89	mov	ip, #0				\n\
     90	mov	lr, #0				\n\
     911:	stmia	%0, {r2-r7, ip, lr}		\n\
     92	subs	r1, r1, #1			\n\
     93	mcr	p15, 0, %0, c7, c14, 1		@ clean and invalidate D line\n\
     94	add	%0, %0, #32			\n\
     95	bne	1b				\n\
     96	mcr	p15, 0, r1, c7, c10, 4		@ drain WB"
     97	: "=r" (ptr)
     98	: "0" (kaddr), "I" (PAGE_SIZE / 32)
     99	: "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
    100	kunmap_atomic(kaddr);
    101}
    102
    103struct cpu_user_fns feroceon_user_fns __initdata = {
    104	.cpu_clear_user_highpage = feroceon_clear_user_highpage,
    105	.cpu_copy_user_highpage	= feroceon_copy_user_highpage,
    106};
    107