cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

dma-mapping-nommu.c (1347B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  Based on linux/arch/arm/mm/dma-mapping.c
      4 *
      5 *  Copyright (C) 2000-2004 Russell King
      6 */
      7
      8#include <linux/dma-map-ops.h>
      9#include <asm/cachetype.h>
     10#include <asm/cacheflush.h>
     11#include <asm/outercache.h>
     12#include <asm/cp15.h>
     13
     14#include "dma.h"
     15
     16void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
     17		enum dma_data_direction dir)
     18{
     19	dmac_map_area(__va(paddr), size, dir);
     20
     21	if (dir == DMA_FROM_DEVICE)
     22		outer_inv_range(paddr, paddr + size);
     23	else
     24		outer_clean_range(paddr, paddr + size);
     25}
     26
     27void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
     28		enum dma_data_direction dir)
     29{
     30	if (dir != DMA_TO_DEVICE) {
     31		outer_inv_range(paddr, paddr + size);
     32		dmac_unmap_area(__va(paddr), size, dir);
     33	}
     34}
     35
     36void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
     37			const struct iommu_ops *iommu, bool coherent)
     38{
     39	if (IS_ENABLED(CONFIG_CPU_V7M)) {
     40		/*
     41		 * Cache support for v7m is optional, so can be treated as
     42		 * coherent if no cache has been detected. Note that it is not
     43		 * enough to check if MPU is in use or not since in absense of
     44		 * MPU system memory map is used.
     45		 */
     46		dev->dma_coherent = cacheid ? coherent : true;
     47	} else {
     48		/*
     49		 * Assume coherent DMA in case MMU/MPU has not been set up.
     50		 */
     51		dev->dma_coherent = (get_cr() & CR_M) ? coherent : true;
     52	}
     53}