cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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proc-arm7tdmi.S (3046B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  linux/arch/arm/mm/proc-arm7tdmi.S: utility functions for ARM7TDMI
      4 *
      5 *  Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
      6 */
      7#include <linux/linkage.h>
      8#include <linux/init.h>
      9#include <linux/pgtable.h>
     10#include <asm/assembler.h>
     11#include <asm/asm-offsets.h>
     12#include <asm/hwcap.h>
     13#include <asm/pgtable-hwdef.h>
     14#include <asm/ptrace.h>
     15
     16#include "proc-macros.S"
     17
     18	.text
     19/*
     20 * cpu_arm7tdmi_proc_init()
     21 * cpu_arm7tdmi_do_idle()
     22 * cpu_arm7tdmi_dcache_clean_area()
     23 * cpu_arm7tdmi_switch_mm()
     24 *
     25 * These are not required.
     26 */
     27ENTRY(cpu_arm7tdmi_proc_init)
     28ENTRY(cpu_arm7tdmi_do_idle)
     29ENTRY(cpu_arm7tdmi_dcache_clean_area)
     30ENTRY(cpu_arm7tdmi_switch_mm)
     31		ret	lr
     32
     33/*
     34 * cpu_arm7tdmi_proc_fin()
     35 */
     36ENTRY(cpu_arm7tdmi_proc_fin)
     37		ret	lr
     38
     39/*
     40 * Function: cpu_arm7tdmi_reset(loc)
     41 * Params  : loc(r0)	address to jump to
     42 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
     43 */
     44		.pushsection	.idmap.text, "ax"
     45ENTRY(cpu_arm7tdmi_reset)
     46		ret	r0
     47ENDPROC(cpu_arm7tdmi_reset)
     48		.popsection
     49
     50		.type	__arm7tdmi_setup, #function
     51__arm7tdmi_setup:
     52		ret	lr
     53		.size	__arm7tdmi_setup, . - __arm7tdmi_setup
     54
     55		__INITDATA
     56
     57		@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
     58		define_processor_functions arm7tdmi, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1
     59
     60		.section ".rodata"
     61
     62		string	cpu_arch_name, "armv4t"
     63		string	cpu_elf_name, "v4"
     64		string	cpu_arm7tdmi_name, "ARM7TDMI"
     65		string	cpu_triscenda7_name, "Triscend-A7x"
     66		string	cpu_at91_name, "Atmel-AT91M40xxx"
     67		string	cpu_s3c3410_name, "Samsung-S3C3410"
     68		string	cpu_s3c44b0x_name, "Samsung-S3C44B0x"
     69		string	cpu_s3c4510b_name, "Samsung-S3C4510B"
     70		string	cpu_s3c4530_name, "Samsung-S3C4530"
     71		string	cpu_netarm_name, "NETARM"
     72
     73		.align
     74
     75		.section ".proc.info.init", "a"
     76
     77.macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \
     78	extra_hwcaps=0
     79		.type	__\name\()_proc_info, #object
     80__\name\()_proc_info:
     81		.long	\cpu_val
     82		.long	\cpu_mask
     83		.long	0
     84		.long	0
     85		initfn	__arm7tdmi_setup, __\name\()_proc_info
     86		.long	cpu_arch_name
     87		.long	cpu_elf_name
     88		.long	HWCAP_SWP | HWCAP_26BIT | ( \extra_hwcaps )
     89		.long	\cpu_name
     90		.long	arm7tdmi_processor_functions
     91		.long	0
     92		.long	0
     93		.long	v4_cache_fns
     94		.size	__\name\()_proc_info, . - __\name\()_proc_info
     95.endm
     96
     97		arm7tdmi_proc_info arm7tdmi, 0x41007700, 0xfff8ff00, \
     98			cpu_arm7tdmi_name
     99		arm7tdmi_proc_info triscenda7, 0x0001d2ff, 0x0001ffff, \
    100			cpu_triscenda7_name, extra_hwcaps=HWCAP_THUMB
    101		arm7tdmi_proc_info at91, 0x14000040, 0xfff000e0, \
    102			cpu_at91_name, extra_hwcaps=HWCAP_THUMB
    103		arm7tdmi_proc_info s3c4510b, 0x36365000, 0xfffff000, \
    104			cpu_s3c4510b_name, extra_hwcaps=HWCAP_THUMB
    105		arm7tdmi_proc_info s3c4530, 0x4c000000, 0xfff000e0, \
    106			cpu_s3c4530_name, extra_hwcaps=HWCAP_THUMB
    107		arm7tdmi_proc_info s3c3410, 0x34100000, 0xffff0000, \
    108			cpu_s3c3410_name, extra_hwcaps=HWCAP_THUMB
    109		arm7tdmi_proc_info s3c44b0x, 0x44b00000, 0xffff0000, \
    110			cpu_s3c44b0x_name, extra_hwcaps=HWCAP_THUMB