entry.S (3959B)
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 NetWinder Floating Point Emulator 4 (c) Rebel.COM, 1998 5 (c) 1998, 1999 Philip Blundell 6 7 Direct questions, comments to Scott Bambrough <scottb@netwinder.org> 8 9*/ 10#include <asm/assembler.h> 11#include <asm/opcodes.h> 12 13/* This is the kernel's entry point into the floating point emulator. 14It is called from the kernel with code similar to this: 15 16 sub r4, r5, #4 17 ldrt r0, [r4] @ r0 = instruction 18 adrsvc al, r9, ret_from_exception @ r9 = normal FP return 19 adrsvc al, lr, fpundefinstr @ lr = undefined instr return 20 21 get_current_task r10 22 mov r8, #1 23 strb r8, [r10, #TSK_USED_MATH] @ set current->used_math 24 add r10, r10, #TSS_FPESAVE @ r10 = workspace 25 ldr r4, .LC2 26 ldr pc, [r4] @ Call FP emulator entry point 27 28The kernel expects the emulator to return via one of two possible 29points of return it passes to the emulator. The emulator, if 30successful in its emulation, jumps to ret_from_exception (passed in 31r9) and the kernel takes care of returning control from the trap to 32the user code. If the emulator is unable to emulate the instruction, 33it returns via _fpundefinstr (passed via lr) and the kernel halts the 34user program with a core dump. 35 36On entry to the emulator r10 points to an area of private FP workspace 37reserved in the thread structure for this process. This is where the 38emulator saves its registers across calls. The first word of this area 39is used as a flag to detect the first time a process uses floating point, 40so that the emulator startup cost can be avoided for tasks that don't 41want it. 42 43This routine does three things: 44 451) The kernel has created a struct pt_regs on the stack and saved the 46user registers into it. See /usr/include/asm/proc/ptrace.h for details. 47 482) It calls EmulateAll to emulate a floating point instruction. 49EmulateAll returns 1 if the emulation was successful, or 0 if not. 50 513) If an instruction has been emulated successfully, it looks ahead at 52the next instruction. If it is a floating point instruction, it 53executes the instruction, without returning to user space. In this 54way it repeatedly looks ahead and executes floating point instructions 55until it encounters a non floating point instruction, at which time it 56returns via _fpreturn. 57 58This is done to reduce the effect of the trap overhead on each 59floating point instructions. GCC attempts to group floating point 60instructions to allow the emulator to spread the cost of the trap over 61several floating point instructions. */ 62 63#include <asm/asm-offsets.h> 64 65 .globl nwfpe_enter 66nwfpe_enter: 67 mov r4, lr @ save the failure-return addresses 68 mov sl, sp @ we access the registers via 'sl' 69 70 ldr r5, [sp, #S_PC] @ get contents of PC; 71 mov r6, r0 @ save the opcode 72emulate: 73 ldr r1, [sp, #S_PSR] @ fetch the PSR 74 bl arm_check_condition @ check the condition 75 cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed? 76 77 @ if condition code failed to match, next insn 78 bne next @ get the next instruction; 79 80 mov r0, r6 @ prepare for EmulateAll() 81 bl EmulateAll @ emulate the instruction 82 cmp r0, #0 @ was emulation successful 83 reteq r4 @ no, return failure 84 85next: 86 uaccess_enable r3 87.Lx1: ldrt r6, [r5], #4 @ get the next instruction and 88 @ increment PC 89 uaccess_disable r3 90 and r2, r6, #0x0F000000 @ test for FP insns 91 teq r2, #0x0C000000 92 teqne r2, #0x0D000000 93 teqne r2, #0x0E000000 94 retne r9 @ return ok if not a fp insn 95 96 str r5, [sp, #S_PC] @ update PC copy in regs 97 98 mov r0, r6 @ save a copy 99 b emulate @ check condition and emulate 100 101 @ We need to be prepared for the instructions at .Lx1 and .Lx2 102 @ to fault. Emit the appropriate exception gunk to fix things up. 103 @ ??? For some reason, faults can happen at .Lx2 even with a 104 @ plain LDR instruction. Weird, but it seems harmless. 105 .pushsection .text.fixup,"ax" 106 .align 2 107.Lfix: ret r9 @ let the user eat segfaults 108 .popsection 109 110 .pushsection __ex_table,"a" 111 .align 3 112 .long .Lx1, .Lfix 113 .popsection