cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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test-arm.c (62455B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * arch/arm/kernel/kprobes-test-arm.c
      4 *
      5 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
      6 */
      7
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <asm/system_info.h>
     11#include <asm/opcodes.h>
     12#include <asm/probes.h>
     13
     14#include "test-core.h"
     15
     16
     17#define TEST_ISA "32"
     18
     19#define TEST_ARM_TO_THUMB_INTERWORK_R(code1, reg, val, code2)	\
     20	TESTCASE_START(code1 #reg code2)			\
     21	TEST_ARG_REG(reg, val)					\
     22	TEST_ARG_REG(14, 99f)					\
     23	TEST_ARG_END("")					\
     24	"50:	nop			\n\t"			\
     25	"1:	"code1 #reg code2"	\n\t"			\
     26	"	bx	lr		\n\t"			\
     27	".thumb				\n\t"			\
     28	"3:	adr	lr, 2f		\n\t"			\
     29	"	bx	lr		\n\t"			\
     30	".arm				\n\t"			\
     31	"2:	nop			\n\t"			\
     32	TESTCASE_END
     33
     34#define TEST_ARM_TO_THUMB_INTERWORK_P(code1, reg, val, code2)	\
     35	TESTCASE_START(code1 #reg code2)			\
     36	TEST_ARG_PTR(reg, val)					\
     37	TEST_ARG_REG(14, 99f)					\
     38	TEST_ARG_MEM(15, 3f+1)					\
     39	TEST_ARG_END("")					\
     40	"50:	nop			\n\t"			\
     41	"1:	"code1 #reg code2"	\n\t"			\
     42	"	bx	lr		\n\t"			\
     43	".thumb				\n\t"			\
     44	"3:	adr	lr, 2f		\n\t"			\
     45	"	bx	lr		\n\t"			\
     46	".arm				\n\t"			\
     47	"2:	nop			\n\t"			\
     48	TESTCASE_END
     49
     50
     51void kprobe_arm_test_cases(void)
     52{
     53	kprobe_test_flags = 0;
     54
     55	TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)")
     56
     57#define _DATA_PROCESSING_DNM(op,s,val)						\
     58	TEST_RR(  op s "eq	r0,  r",1, VAL1,", r",2, val, "")		\
     59	TEST_RR(  op s "ne	r1,  r",1, VAL1,", r",2, val, ", lsl #3")	\
     60	TEST_RR(  op s "cs	r2,  r",3, VAL1,", r",2, val, ", lsr #4")	\
     61	TEST_RR(  op s "cc	r3,  r",3, VAL1,", r",2, val, ", asr #5")	\
     62	TEST_RR(  op s "mi	r4,  r",5, VAL1,", r",2, N(val),", asr #6")	\
     63	TEST_RR(  op s "pl	r5,  r",5, VAL1,", r",2, val, ", ror #7")	\
     64	TEST_RR(  op s "vs	r6,  r",7, VAL1,", r",2, val, ", rrx")		\
     65	TEST_R(   op s "vc	r6,  r",7, VAL1,", pc, lsl #3")			\
     66	TEST_R(   op s "vc	r6,  r",7, VAL1,", sp, lsr #4")			\
     67	TEST_R(   op s "vc	r6,  pc, r",7, VAL1,", asr #5")			\
     68	TEST_R(   op s "vc	r6,  sp, r",7, VAL1,", ror #6")			\
     69	TEST_RRR( op s "hi	r8,  r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\
     70	TEST_RRR( op s "ls	r9,  r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\
     71	TEST_RRR( op s "ge	r10, r",11,VAL1,", r",14,val, ", asr r",7, 5,"")\
     72	TEST_RRR( op s "lt	r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
     73	TEST_RR(  op s "gt	r12, r13"       ", r",14,val, ", ror r",14,7,"")\
     74	TEST_RR(  op s "le	r14, r",0, val, ", r13"       ", lsl r",14,8,"")\
     75	TEST_R(   op s "eq	r0,  r",11,VAL1,", #0xf5")			\
     76	TEST_R(   op s "ne	r11, r",0, VAL1,", #0xf5000000")		\
     77	TEST_R(   op s "	r7,  r",8, VAL2,", #0x000af000")		\
     78	TEST(     op s "	r4,  pc"        ", #0x00005a00")
     79
     80#define DATA_PROCESSING_DNM(op,val)		\
     81	_DATA_PROCESSING_DNM(op,"",val)		\
     82	_DATA_PROCESSING_DNM(op,"s",val)
     83
     84#define DATA_PROCESSING_NM(op,val)						\
     85	TEST_RR(  op "ne	r",1, VAL1,", r",2, val, "")			\
     86	TEST_RR(  op "eq	r",1, VAL1,", r",2, val, ", lsl #3")		\
     87	TEST_RR(  op "cc	r",3, VAL1,", r",2, val, ", lsr #4")		\
     88	TEST_RR(  op "cs	r",3, VAL1,", r",2, val, ", asr #5")		\
     89	TEST_RR(  op "pl	r",5, VAL1,", r",2, N(val),", asr #6")		\
     90	TEST_RR(  op "mi	r",5, VAL1,", r",2, val, ", ror #7")		\
     91	TEST_RR(  op "vc	r",7, VAL1,", r",2, val, ", rrx")		\
     92	TEST_R (  op "vs	r",7, VAL1,", pc, lsl #3")			\
     93	TEST_R (  op "vs	r",7, VAL1,", sp, lsr #4")			\
     94	TEST_R(   op "vs	pc, r",7, VAL1,", asr #5")			\
     95	TEST_R(   op "vs	sp, r",7, VAL1,", ror #6")			\
     96	TEST_RRR( op "ls	r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")	\
     97	TEST_RRR( op "hi	r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")	\
     98	TEST_RRR( op "lt	r",11,VAL1,", r",14,val, ", asr r",7, 5,"")	\
     99	TEST_RRR( op "ge	r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")	\
    100	TEST_RR(  op "le	r13"       ", r",14,val, ", ror r",14,7,"")	\
    101	TEST_RR(  op "gt	r",0, val, ", r13"       ", lsl r",14,8,"")	\
    102	TEST_R(   op "eq	r",11,VAL1,", #0xf5")				\
    103	TEST_R(   op "ne	r",0, VAL1,", #0xf5000000")			\
    104	TEST_R(   op "	r",8, VAL2,", #0x000af000")
    105
    106#define _DATA_PROCESSING_DM(op,s,val)					\
    107	TEST_R(   op s "eq	r0,  r",1, val, "")			\
    108	TEST_R(   op s "ne	r1,  r",1, val, ", lsl #3")		\
    109	TEST_R(   op s "cs	r2,  r",3, val, ", lsr #4")		\
    110	TEST_R(   op s "cc	r3,  r",3, val, ", asr #5")		\
    111	TEST_R(   op s "mi	r4,  r",5, N(val),", asr #6")		\
    112	TEST_R(   op s "pl	r5,  r",5, val, ", ror #7")		\
    113	TEST_R(   op s "vs	r6,  r",10,val, ", rrx")		\
    114	TEST(     op s "vs	r7,  pc, lsl #3")			\
    115	TEST(     op s "vs	r7,  sp, lsr #4")			\
    116	TEST_RR(  op s "vc	r8,  r",7, val, ", lsl r",0, 3,"")	\
    117	TEST_RR(  op s "hi	r9,  r",9, val, ", lsr r",7, 4,"")	\
    118	TEST_RR(  op s "ls	r10, r",9, val, ", asr r",7, 5,"")	\
    119	TEST_RR(  op s "ge	r11, r",11,N(val),", asr r",7, 6,"")	\
    120	TEST_RR(  op s "lt	r12, r",11,val, ", ror r",14,7,"")	\
    121	TEST_R(   op s "gt	r14, r13"       ", lsl r",14,8,"")	\
    122	TEST(     op s "eq	r0,  #0xf5")				\
    123	TEST(     op s "ne	r11, #0xf5000000")			\
    124	TEST(     op s "	r7,  #0x000af000")			\
    125	TEST(     op s "	r4,  #0x00005a00")
    126
    127#define DATA_PROCESSING_DM(op,val)		\
    128	_DATA_PROCESSING_DM(op,"",val)		\
    129	_DATA_PROCESSING_DM(op,"s",val)
    130
    131	DATA_PROCESSING_DNM("and",0xf00f00ff)
    132	DATA_PROCESSING_DNM("eor",0xf00f00ff)
    133	DATA_PROCESSING_DNM("sub",VAL2)
    134	DATA_PROCESSING_DNM("rsb",VAL2)
    135	DATA_PROCESSING_DNM("add",VAL2)
    136	DATA_PROCESSING_DNM("adc",VAL2)
    137	DATA_PROCESSING_DNM("sbc",VAL2)
    138	DATA_PROCESSING_DNM("rsc",VAL2)
    139	DATA_PROCESSING_NM("tst",0xf00f00ff)
    140	DATA_PROCESSING_NM("teq",0xf00f00ff)
    141	DATA_PROCESSING_NM("cmp",VAL2)
    142	DATA_PROCESSING_NM("cmn",VAL2)
    143	DATA_PROCESSING_DNM("orr",0xf00f00ff)
    144	DATA_PROCESSING_DM("mov",VAL2)
    145	DATA_PROCESSING_DNM("bic",0xf00f00ff)
    146	DATA_PROCESSING_DM("mvn",VAL2)
    147
    148	TEST("mov	ip, sp") /* This has special case emulation code */
    149
    150	TEST_SUPPORTED("mov	pc, #0x1000");
    151	TEST_SUPPORTED("mov	sp, #0x1000");
    152	TEST_SUPPORTED("cmp	pc, #0x1000");
    153	TEST_SUPPORTED("cmp	sp, #0x1000");
    154
    155	/* Data-processing with PC and a shift count in a register */
    156	TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) "	@ cmp	r12, r14, asl pc")
    157	TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) "	@ mov	r12, r14, asl pc")
    158	TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) "	@ add	r10, r12, r14, asl pc")
    159	TEST_UNSUPPORTED(__inst_arm(0xe151021f) "	@ cmp	r1, pc, lsl r2")
    160	TEST_UNSUPPORTED(__inst_arm(0xe17f0211) "	@ cmn	pc, r1, lsl r2")
    161	TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) "	@ mov	r1, pc, lsl r2")
    162	TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) "	@ mov	pc, r1, lsl r2")
    163	TEST_UNSUPPORTED(__inst_arm(0xe042131f) "	@ sub	r1, r2, pc, lsl r3")
    164	TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) "	@ bic	r1, pc, r2, lsl r3")
    165	TEST_UNSUPPORTED(__inst_arm(0xe081f312) "	@ add	pc, r1, r2, lsl r3")
    166
    167	/* Data-processing with PC as a target and status registers updated */
    168	TEST_UNSUPPORTED("movs	pc, r1")
    169	TEST_UNSUPPORTED(__inst_arm(0xe1b0f211) "	@movs	pc, r1, lsl r2")
    170	TEST_UNSUPPORTED("movs	pc, #0x10000")
    171	TEST_UNSUPPORTED("adds	pc, lr, r1")
    172	TEST_UNSUPPORTED(__inst_arm(0xe09ef211) "	@adds	pc, lr, r1, lsl r2")
    173	TEST_UNSUPPORTED("adds	pc, lr, #4")
    174
    175	/* Data-processing with SP as target */
    176	TEST("add	sp, sp, #16")
    177	TEST("sub	sp, sp, #8")
    178	TEST("bic	sp, sp, #0x20")
    179	TEST("orr	sp, sp, #0x20")
    180	TEST_PR( "add	sp, r",10,0,", r",11,4,"")
    181	TEST_PRR("add	sp, r",10,0,", r",11,4,", asl r",12,1,"")
    182	TEST_P(  "mov	sp, r",10,0,"")
    183	TEST_PR( "mov	sp, r",10,0,", asl r",12,0,"")
    184
    185	/* Data-processing with PC as target */
    186	TEST_BF(   "add	pc, pc, #2f-1b-8")
    187	TEST_BF_R ("add	pc, pc, r",14,2f-1f-8,"")
    188	TEST_BF_R ("add	pc, r",14,2f-1f-8,", pc")
    189	TEST_BF_R ("mov	pc, r",0,2f,"")
    190	TEST_BF_R ("add	pc, pc, r",14,(2f-1f-8)*2,", asr #1")
    191	TEST_BB(   "sub	pc, pc, #1b-2b+8")
    192#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
    193	TEST_BB(   "sub	pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
    194#endif
    195	TEST_BB_R( "sub	pc, pc, r",14, 1f-2f+8,"")
    196	TEST_BB_R( "rsb	pc, r",14,1f-2f+8,", pc")
    197	TEST_R(    "add	pc, pc, r",10,-2,", asl #1")
    198#ifdef CONFIG_THUMB2_KERNEL
    199	TEST_ARM_TO_THUMB_INTERWORK_R("add	pc, pc, r",0,3f-1f-8+1,"")
    200	TEST_ARM_TO_THUMB_INTERWORK_R("sub	pc, r",0,3f+8+1,", #8")
    201#endif
    202	TEST_GROUP("Miscellaneous instructions")
    203
    204	TEST_RMASKED("mrs	r",0,~PSR_IGNORE_BITS,", cpsr")
    205	TEST_RMASKED("mrspl	r",7,~PSR_IGNORE_BITS,", cpsr")
    206	TEST_RMASKED("mrs	r",14,~PSR_IGNORE_BITS,", cpsr")
    207	TEST_UNSUPPORTED(__inst_arm(0xe10ff000) "	@ mrs r15, cpsr")
    208	TEST_UNSUPPORTED("mrs	r0, spsr")
    209	TEST_UNSUPPORTED("mrs	lr, spsr")
    210
    211	TEST_UNSUPPORTED("msr	cpsr, r0")
    212	TEST_UNSUPPORTED("msr	cpsr_f, lr")
    213	TEST_UNSUPPORTED("msr	spsr, r0")
    214
    215#if __LINUX_ARM_ARCH__ >= 5 || \
    216    (__LINUX_ARM_ARCH__ == 4 && !defined(CONFIG_CPU_32v4))
    217	TEST_BF_R("bx	r",0,2f,"")
    218	TEST_BB_R("bx	r",7,2f,"")
    219	TEST_BF_R("bxeq	r",14,2f,"")
    220#endif
    221
    222#if __LINUX_ARM_ARCH__ >= 5
    223	TEST_R("clz	r0, r",0, 0x0,"")
    224	TEST_R("clzeq	r7, r",14,0x1,"")
    225	TEST_R("clz	lr, r",7, 0xffffffff,"")
    226	TEST(  "clz	r4, sp")
    227	TEST_UNSUPPORTED(__inst_arm(0x016fff10) "	@ clz pc, r0")
    228	TEST_UNSUPPORTED(__inst_arm(0x016f0f1f) "	@ clz r0, pc")
    229
    230#if __LINUX_ARM_ARCH__ >= 6
    231	TEST_UNSUPPORTED("bxj	r0")
    232#endif
    233
    234	TEST_BF_R("blx	r",0,2f,"")
    235	TEST_BB_R("blx	r",7,2f,"")
    236	TEST_BF_R("blxeq	r",14,2f,"")
    237	TEST_UNSUPPORTED(__inst_arm(0x0120003f) "	@ blx pc")
    238
    239	TEST_RR(   "qadd	r0, r",1, VAL1,", r",2, VAL2,"")
    240	TEST_RR(   "qaddvs	lr, r",9, VAL2,", r",8, VAL1,"")
    241	TEST_R(    "qadd	lr, r",9, VAL2,", r13")
    242	TEST_RR(   "qsub	r0, r",1, VAL1,", r",2, VAL2,"")
    243	TEST_RR(   "qsubvs	lr, r",9, VAL2,", r",8, VAL1,"")
    244	TEST_R(    "qsub	lr, r",9, VAL2,", r13")
    245	TEST_RR(   "qdadd	r0, r",1, VAL1,", r",2, VAL2,"")
    246	TEST_RR(   "qdaddvs	lr, r",9, VAL2,", r",8, VAL1,"")
    247	TEST_R(    "qdadd	lr, r",9, VAL2,", r13")
    248	TEST_RR(   "qdsub	r0, r",1, VAL1,", r",2, VAL2,"")
    249	TEST_RR(   "qdsubvs	lr, r",9, VAL2,", r",8, VAL1,"")
    250	TEST_R(    "qdsub	lr, r",9, VAL2,", r13")
    251	TEST_UNSUPPORTED(__inst_arm(0xe101f050) "	@ qadd pc, r0, r1")
    252	TEST_UNSUPPORTED(__inst_arm(0xe121f050) "	@ qsub pc, r0, r1")
    253	TEST_UNSUPPORTED(__inst_arm(0xe141f050) "	@ qdadd pc, r0, r1")
    254	TEST_UNSUPPORTED(__inst_arm(0xe161f050) "	@ qdsub pc, r0, r1")
    255	TEST_UNSUPPORTED(__inst_arm(0xe16f2050) "	@ qdsub r2, r0, pc")
    256	TEST_UNSUPPORTED(__inst_arm(0xe161205f) "	@ qdsub r2, pc, r1")
    257
    258	TEST_UNSUPPORTED("bkpt	0xffff")
    259	TEST_UNSUPPORTED("bkpt	0x0000")
    260
    261	TEST_UNSUPPORTED(__inst_arm(0xe1600070) " @ smc #0")
    262
    263	TEST_GROUP("Halfword multiply and multiply-accumulate")
    264
    265	TEST_RRR(    "smlabb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    266	TEST_RRR(    "smlabbge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    267	TEST_RR(     "smlabb	lr, r",1, VAL2,", r",2, VAL3,", r13")
    268	TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3")
    269	TEST_RRR(    "smlatb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    270	TEST_RRR(    "smlatbge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    271	TEST_RR(     "smlatb	lr, r",1, VAL2,", r",2, VAL3,", r13")
    272	TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3")
    273	TEST_RRR(    "smlabt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    274	TEST_RRR(    "smlabtge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    275	TEST_RR(     "smlabt	lr, r",1, VAL2,", r",2, VAL3,", r13")
    276	TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3")
    277	TEST_RRR(    "smlatt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    278	TEST_RRR(    "smlattge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    279	TEST_RR(     "smlatt	lr, r",1, VAL2,", r",2, VAL3,", r13")
    280	TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3")
    281
    282	TEST_RRR(    "smlawb	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    283	TEST_RRR(    "smlawbge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    284	TEST_RR(     "smlawb	lr, r",1, VAL2,", r",2, VAL3,", r13")
    285	TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3")
    286	TEST_RRR(    "smlawt	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    287	TEST_RRR(    "smlawtge	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    288	TEST_RR(     "smlawt	lr, r",1, VAL2,", r",2, VAL3,", r13")
    289	TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3")
    290	TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3")
    291	TEST_UNSUPPORTED(__inst_arm(0xe1203fc1) " @ smlawt r0, r1, pc, r3")
    292	TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc")
    293
    294	TEST_RR(    "smulwb	r0, r",1, VAL1,", r",2, VAL2,"")
    295	TEST_RR(    "smulwbge	r7, r",8, VAL3,", r",9, VAL1,"")
    296	TEST_R(     "smulwb	lr, r",1, VAL2,", r13")
    297	TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2")
    298	TEST_RR(    "smulwt	r0, r",1, VAL1,", r",2, VAL2,"")
    299	TEST_RR(    "smulwtge	r7, r",8, VAL3,", r",9, VAL1,"")
    300	TEST_R(     "smulwt	lr, r",1, VAL2,", r13")
    301	TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2")
    302
    303	TEST_RRRR(  "smlalbb	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    304	TEST_RRRR(  "smlalbble	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    305	TEST_RRR(   "smlalbb	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    306	TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3")
    307	TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3")
    308	TEST_RRRR(  "smlaltb	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    309	TEST_RRRR(  "smlaltble	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    310	TEST_RRR(   "smlaltb	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    311	TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3")
    312	TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3")
    313	TEST_RRRR(  "smlalbt	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    314	TEST_RRRR(  "smlalbtle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    315	TEST_RRR(   "smlalbt	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    316	TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3")
    317	TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3")
    318	TEST_RRRR(  "smlaltt	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    319	TEST_RRRR(  "smlalttle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    320	TEST_RRR(   "smlaltt	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    321	TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3")
    322	TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3")
    323	TEST_UNSUPPORTED(__inst_arm(0xe14013ef) " @ smlalbb r0, r1, pc, r3")
    324	TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc")
    325
    326	TEST_RR(    "smulbb	r0, r",1, VAL1,", r",2, VAL2,"")
    327	TEST_RR(    "smulbbge	r7, r",8, VAL3,", r",9, VAL1,"")
    328	TEST_R(     "smulbb	lr, r",1, VAL2,", r13")
    329	TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2")
    330	TEST_RR(    "smultb	r0, r",1, VAL1,", r",2, VAL2,"")
    331	TEST_RR(    "smultbge	r7, r",8, VAL3,", r",9, VAL1,"")
    332	TEST_R(     "smultb	lr, r",1, VAL2,", r13")
    333	TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2")
    334	TEST_RR(    "smulbt	r0, r",1, VAL1,", r",2, VAL2,"")
    335	TEST_RR(    "smulbtge	r7, r",8, VAL3,", r",9, VAL1,"")
    336	TEST_R(     "smulbt	lr, r",1, VAL2,", r13")
    337	TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2")
    338	TEST_RR(    "smultt	r0, r",1, VAL1,", r",2, VAL2,"")
    339	TEST_RR(    "smulttge	r7, r",8, VAL3,", r",9, VAL1,"")
    340	TEST_R(     "smultt	lr, r",1, VAL2,", r13")
    341	TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
    342	TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
    343	TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
    344#endif
    345
    346	TEST_GROUP("Multiply and multiply-accumulate")
    347
    348	TEST_RR(    "mul	r0, r",1, VAL1,", r",2, VAL2,"")
    349	TEST_RR(    "mulls	r7, r",8, VAL2,", r",9, VAL2,"")
    350	TEST_R(     "mul	lr, r",4, VAL3,", r13")
    351	TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2")
    352	TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2")
    353	TEST_UNSUPPORTED(__inst_arm(0xe0000f91) " @ mul r0, r1, pc")
    354	TEST_RR(    "muls	r0, r",1, VAL1,", r",2, VAL2,"")
    355	TEST_RR(    "mulsls	r7, r",8, VAL2,", r",9, VAL2,"")
    356	TEST_R(     "muls	lr, r",4, VAL3,", r13")
    357	TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2")
    358
    359	TEST_RRR(    "mla	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    360	TEST_RRR(    "mlahi	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    361	TEST_RR(     "mla	lr, r",1, VAL2,", r",2, VAL3,", r13")
    362	TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3")
    363	TEST_RRR(    "mlas	r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    364	TEST_RRR(    "mlashi	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    365	TEST_RR(     "mlas	lr, r",1, VAL2,", r",2, VAL3,", r13")
    366	TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3")
    367
    368#if __LINUX_ARM_ARCH__ >= 6
    369	TEST_RR(  "umaal	r0, r1, r",2, VAL1,", r",3, VAL2,"")
    370	TEST_RR(  "umaalls	r7, r8, r",9, VAL2,", r",10, VAL1,"")
    371	TEST_R(   "umaal	lr, r12, r",11,VAL3,", r13")
    372	TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3")
    373	TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3")
    374	TEST_UNSUPPORTED(__inst_arm(0xe0500090) " @ undef")
    375	TEST_UNSUPPORTED(__inst_arm(0xe05fff9f) " @ undef")
    376#endif
    377
    378#if __LINUX_ARM_ARCH__ >= 7
    379	TEST_RRR(  "mls		r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
    380	TEST_RRR(  "mlshi	r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
    381	TEST_RR(   "mls		lr, r",1, VAL2,", r",2, VAL3,", r13")
    382	TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3")
    383	TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3")
    384	TEST_UNSUPPORTED(__inst_arm(0xe0603f91) " @ mls r0, r1, pc, r3")
    385	TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc")
    386#endif
    387
    388	TEST_UNSUPPORTED(__inst_arm(0xe0700090) " @ undef")
    389	TEST_UNSUPPORTED(__inst_arm(0xe07fff9f) " @ undef")
    390
    391	TEST_RR(  "umull	r0, r1, r",2, VAL1,", r",3, VAL2,"")
    392	TEST_RR(  "umullls	r7, r8, r",9, VAL2,", r",10, VAL1,"")
    393	TEST_R(   "umull	lr, r12, r",11,VAL3,", r13")
    394	TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3")
    395	TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3")
    396	TEST_RR(  "umulls	r0, r1, r",2, VAL1,", r",3, VAL2,"")
    397	TEST_RR(  "umullsls	r7, r8, r",9, VAL2,", r",10, VAL1,"")
    398	TEST_R(   "umulls	lr, r12, r",11,VAL3,", r13")
    399	TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3")
    400	TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3")
    401
    402	TEST_RRRR(  "umlal	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    403	TEST_RRRR(  "umlalle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    404	TEST_RRR(   "umlal	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    405	TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3")
    406	TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3")
    407	TEST_RRRR(  "umlals	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    408	TEST_RRRR(  "umlalsle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    409	TEST_RRR(   "umlals	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    410	TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3")
    411	TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3")
    412
    413	TEST_RR(  "smull	r0, r1, r",2, VAL1,", r",3, VAL2,"")
    414	TEST_RR(  "smullls	r7, r8, r",9, VAL2,", r",10, VAL1,"")
    415	TEST_R(   "smull	lr, r12, r",11,VAL3,", r13")
    416	TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3")
    417	TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3")
    418	TEST_RR(  "smulls	r0, r1, r",2, VAL1,", r",3, VAL2,"")
    419	TEST_RR(  "smullsls	r7, r8, r",9, VAL2,", r",10, VAL1,"")
    420	TEST_R(   "smulls	lr, r12, r",11,VAL3,", r13")
    421	TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3")
    422	TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3")
    423
    424	TEST_RRRR(  "smlal	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    425	TEST_RRRR(  "smlalle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    426	TEST_RRR(   "smlal	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    427	TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3")
    428	TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3")
    429	TEST_RRRR(  "smlals	r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
    430	TEST_RRRR(  "smlalsle	r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
    431	TEST_RRR(   "smlals	r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
    432	TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3")
    433	TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3")
    434	TEST_UNSUPPORTED(__inst_arm(0xe0f0139f) " @ smlals r0, r1, pc, r3")
    435	TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc")
    436
    437	TEST_GROUP("Synchronization primitives")
    438
    439#if __LINUX_ARM_ARCH__ < 6
    440	TEST_RP("swp	lr, r",7,VAL2,", [r",8,0,"]")
    441	TEST_R( "swpvs	r0, r",1,VAL1,", [sp]")
    442	TEST_RP("swp	sp, r",14,VAL2,", [r",12,13*4,"]")
    443#else
    444	TEST_UNSUPPORTED(__inst_arm(0xe108e097) " @ swp	lr, r7, [r8]")
    445	TEST_UNSUPPORTED(__inst_arm(0x610d0091) " @ swpvs	r0, r1, [sp]")
    446	TEST_UNSUPPORTED(__inst_arm(0xe10cd09e) " @ swp	sp, r14 [r12]")
    447#endif
    448	TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]")
    449	TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]")
    450	TEST_UNSUPPORTED(__inst_arm(0xe10f0091) " @ swp r0, r1, [pc]")
    451#if __LINUX_ARM_ARCH__ < 6
    452	TEST_RP("swpb	lr, r",7,VAL2,", [r",8,0,"]")
    453	TEST_R( "swpbvs	r0, r",1,VAL1,", [sp]")
    454#else
    455	TEST_UNSUPPORTED(__inst_arm(0xe148e097) " @ swpb	lr, r7, [r8]")
    456	TEST_UNSUPPORTED(__inst_arm(0x614d0091) " @ swpvsb	r0, r1, [sp]")
    457#endif
    458	TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]")
    459
    460	TEST_UNSUPPORTED(__inst_arm(0xe1100090)) /* Unallocated space */
    461	TEST_UNSUPPORTED(__inst_arm(0xe1200090)) /* Unallocated space */
    462	TEST_UNSUPPORTED(__inst_arm(0xe1300090)) /* Unallocated space */
    463	TEST_UNSUPPORTED(__inst_arm(0xe1500090)) /* Unallocated space */
    464	TEST_UNSUPPORTED(__inst_arm(0xe1600090)) /* Unallocated space */
    465	TEST_UNSUPPORTED(__inst_arm(0xe1700090)) /* Unallocated space */
    466#if __LINUX_ARM_ARCH__ >= 6
    467	TEST_UNSUPPORTED("ldrex	r2, [sp]")
    468#endif
    469#if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
    470	TEST_UNSUPPORTED("strexd	r0, r2, r3, [sp]")
    471	TEST_UNSUPPORTED("ldrexd	r2, r3, [sp]")
    472	TEST_UNSUPPORTED("strexb	r0, r2, [sp]")
    473	TEST_UNSUPPORTED("ldrexb	r2, [sp]")
    474	TEST_UNSUPPORTED("strexh	r0, r2, [sp]")
    475	TEST_UNSUPPORTED("ldrexh	r2, [sp]")
    476#endif
    477	TEST_GROUP("Extra load/store instructions")
    478
    479	TEST_RPR(  "strh	r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")
    480	TEST_RPR(  "strheq	r",14,VAL2,", [r",11,0, ", r",12, 48,"]")
    481	TEST_UNSUPPORTED(  "strheq	r14, [r13, r12]")
    482	TEST_UNSUPPORTED(  "strheq	r14, [r12, r13]")
    483	TEST_RPR(  "strh	r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")
    484	TEST_RPR(  "strhne	r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
    485	TEST_RPR(  "strh	r",2, VAL1,", [r",3, 24,"], r",4, 48,"")
    486	TEST_RPR(  "strh	r",10,VAL2,", [r",9, 48,"], -r",11,24,"")
    487	TEST_UNSUPPORTED(__inst_arm(0xe1afc0ba) "	@ strh r12, [pc, r10]!")
    488	TEST_UNSUPPORTED(__inst_arm(0xe089f0bb) "	@ strh pc, [r9], r11")
    489	TEST_UNSUPPORTED(__inst_arm(0xe089a0bf) "	@ strh r10, [r9], pc")
    490
    491	TEST_PR(   "ldrh	r0, [r",0,  48,", -r",2, 24,"]")
    492	TEST_PR(   "ldrhcs	r14, [r",13,0, ", r",12, 48,"]")
    493	TEST_PR(   "ldrh	r1, [r",2,  24,", r",3,  48,"]!")
    494	TEST_PR(   "ldrhcc	r12, [r",11,48,", -r",10,24,"]!")
    495	TEST_PR(   "ldrh	r2, [r",3,  24,"], r",4, 48,"")
    496	TEST_PR(   "ldrh	r10, [r",9, 48,"], -r",11,24,"")
    497	TEST_UNSUPPORTED(__inst_arm(0xe1bfc0ba) "	@ ldrh r12, [pc, r10]!")
    498	TEST_UNSUPPORTED(__inst_arm(0xe099f0bb) "	@ ldrh pc, [r9], r11")
    499	TEST_UNSUPPORTED(__inst_arm(0xe099a0bf) "	@ ldrh r10, [r9], pc")
    500
    501	TEST_RP(   "strh	r",0, VAL1,", [r",1, 24,", #-2]")
    502	TEST_RP(   "strhmi	r",14,VAL2,", [r",13,0, ", #2]")
    503	TEST_RP(   "strh	r",1, VAL1,", [r",2, 24,", #4]!")
    504	TEST_RP(   "strhpl	r",12,VAL2,", [r",11,24,", #-4]!")
    505	TEST_RP(   "strh	r",2, VAL1,", [r",3, 24,"], #48")
    506	TEST_RP(   "strh	r",10,VAL2,", [r",9, 64,"], #-48")
    507	TEST_RP(   "strh	r",3, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
    508	TEST_UNSUPPORTED("strh r3, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
    509	TEST_RP(   "strh	r",4, VAL1,", [r",14,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
    510	TEST_UNSUPPORTED(__inst_arm(0xe1efc3b0) "	@ strh r12, [pc, #48]!")
    511	TEST_UNSUPPORTED(__inst_arm(0xe0c9f3b0) "	@ strh pc, [r9], #48")
    512
    513	TEST_P(	   "ldrh	r0, [r",0,  24,", #-2]")
    514	TEST_P(	   "ldrhvs	r14, [r",13,0, ", #2]")
    515	TEST_P(	   "ldrh	r1, [r",2,  24,", #4]!")
    516	TEST_P(	   "ldrhvc	r12, [r",11,24,", #-4]!")
    517	TEST_P(	   "ldrh	r2, [r",3,  24,"], #48")
    518	TEST_P(	   "ldrh	r10, [r",9, 64,"], #-48")
    519	TEST(      "ldrh	r0, [pc, #0]")
    520	TEST_UNSUPPORTED(__inst_arm(0xe1ffc3b0) "	@ ldrh r12, [pc, #48]!")
    521	TEST_UNSUPPORTED(__inst_arm(0xe0d9f3b0) "	@ ldrh pc, [r9], #48")
    522
    523	TEST_PR(   "ldrsb	r0, [r",0,  48,", -r",2, 24,"]")
    524	TEST_PR(   "ldrsbhi	r14, [r",13,0,", r",12,  48,"]")
    525	TEST_PR(   "ldrsb	r1, [r",2,  24,", r",3,  48,"]!")
    526	TEST_PR(   "ldrsbls	r12, [r",11,48,", -r",10,24,"]!")
    527	TEST_PR(   "ldrsb	r2, [r",3,  24,"], r",4, 48,"")
    528	TEST_PR(   "ldrsb	r10, [r",9, 48,"], -r",11,24,"")
    529	TEST_UNSUPPORTED(__inst_arm(0xe1bfc0da) "	@ ldrsb r12, [pc, r10]!")
    530	TEST_UNSUPPORTED(__inst_arm(0xe099f0db) "	@ ldrsb pc, [r9], r11")
    531
    532	TEST_P(	   "ldrsb	r0, [r",0,  24,", #-1]")
    533	TEST_P(	   "ldrsbge	r14, [r",13,0, ", #1]")
    534	TEST_P(	   "ldrsb	r1, [r",2,  24,", #4]!")
    535	TEST_P(	   "ldrsblt	r12, [r",11,24,", #-4]!")
    536	TEST_P(	   "ldrsb	r2, [r",3,  24,"], #48")
    537	TEST_P(	   "ldrsb	r10, [r",9, 64,"], #-48")
    538	TEST(      "ldrsb	r0, [pc, #0]")
    539	TEST_UNSUPPORTED(__inst_arm(0xe1ffc3d0) "	@ ldrsb r12, [pc, #48]!")
    540	TEST_UNSUPPORTED(__inst_arm(0xe0d9f3d0) "	@ ldrsb pc, [r9], #48")
    541
    542	TEST_PR(   "ldrsh	r0, [r",0,  48,", -r",2, 24,"]")
    543	TEST_PR(   "ldrshgt	r14, [r",13,0, ", r",12, 48,"]")
    544	TEST_PR(   "ldrsh	r1, [r",2,  24,", r",3,  48,"]!")
    545	TEST_PR(   "ldrshle	r12, [r",11,48,", -r",10,24,"]!")
    546	TEST_PR(   "ldrsh	r2, [r",3,  24,"], r",4, 48,"")
    547	TEST_PR(   "ldrsh	r10, [r",9, 48,"], -r",11,24,"")
    548	TEST_UNSUPPORTED(__inst_arm(0xe1bfc0fa) "	@ ldrsh r12, [pc, r10]!")
    549	TEST_UNSUPPORTED(__inst_arm(0xe099f0fb) "	@ ldrsh pc, [r9], r11")
    550
    551	TEST_P(	   "ldrsh	r0, [r",0,  24,", #-1]")
    552	TEST_P(	   "ldrsheq	r14, [r",13,0 ,", #1]")
    553	TEST_P(	   "ldrsh	r1, [r",2,  24,", #4]!")
    554	TEST_P(	   "ldrshne	r12, [r",11,24,", #-4]!")
    555	TEST_P(	   "ldrsh	r2, [r",3,  24,"], #48")
    556	TEST_P(	   "ldrsh	r10, [r",9, 64,"], #-48")
    557	TEST(      "ldrsh	r0, [pc, #0]")
    558	TEST_UNSUPPORTED(__inst_arm(0xe1ffc3f0) "	@ ldrsh r12, [pc, #48]!")
    559	TEST_UNSUPPORTED(__inst_arm(0xe0d9f3f0) "	@ ldrsh pc, [r9], #48")
    560
    561#if __LINUX_ARM_ARCH__ >= 7
    562	TEST_UNSUPPORTED("strht	r1, [r2], r3")
    563	TEST_UNSUPPORTED("ldrht	r1, [r2], r3")
    564	TEST_UNSUPPORTED("strht	r1, [r2], #48")
    565	TEST_UNSUPPORTED("ldrht	r1, [r2], #48")
    566	TEST_UNSUPPORTED("ldrsbt	r1, [r2], r3")
    567	TEST_UNSUPPORTED("ldrsbt	r1, [r2], #48")
    568	TEST_UNSUPPORTED("ldrsht	r1, [r2], r3")
    569	TEST_UNSUPPORTED("ldrsht	r1, [r2], #48")
    570#endif
    571
    572#if __LINUX_ARM_ARCH__ >= 5
    573	TEST_RPR(  "strd	r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
    574	TEST_RPR(  "strdcc	r",8, VAL2,", [r",11,0, ", r",12,48,"]")
    575	TEST_UNSUPPORTED(  "strdcc r8, [r13, r12]")
    576	TEST_UNSUPPORTED(  "strdcc r8, [r12, r13]")
    577	TEST_RPR(  "strd	r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
    578	TEST_RPR(  "strdcs	r",12,VAL2,", r13, [r",11,48,", -r",10,24,"]!")
    579	TEST_RPR(  "strd	r",2, VAL1,", r3, [r",5, 24,"], r",4,48,"")
    580	TEST_RPR(  "strd	r",10,VAL2,", r11, [r",9, 48,"], -r",7,24,"")
    581	TEST_UNSUPPORTED(__inst_arm(0xe1afc0fa) "	@ strd r12, [pc, r10]!")
    582
    583	TEST_PR(   "ldrd	r0, [r",0, 48,", -r",2,24,"]")
    584	TEST_PR(   "ldrdmi	r8, [r",13,0, ", r",12,48,"]")
    585	TEST_PR(   "ldrd	r4, [r",2, 24,", r",3, 48,"]!")
    586	TEST_PR(   "ldrdpl	r6, [r",11,48,", -r",10,24,"]!")
    587	TEST_PR(   "ldrd	r2, r3, [r",5, 24,"], r",4,48,"")
    588	TEST_PR(   "ldrd	r10, r11, [r",9,48,"], -r",7,24,"")
    589	TEST_UNSUPPORTED(__inst_arm(0xe1afc0da) "	@ ldrd r12, [pc, r10]!")
    590	TEST_UNSUPPORTED(__inst_arm(0xe089f0db) "	@ ldrd pc, [r9], r11")
    591	TEST_UNSUPPORTED(__inst_arm(0xe089e0db) "	@ ldrd lr, [r9], r11")
    592	TEST_UNSUPPORTED(__inst_arm(0xe089c0df) "	@ ldrd r12, [r9], pc")
    593
    594	TEST_RP(   "strd	r",0, VAL1,", [r",1, 24,", #-8]")
    595	TEST_RP(   "strdvs	r",8, VAL2,", [r",13,0, ", #8]")
    596	TEST_RP(   "strd	r",4, VAL1,", [r",2, 24,", #16]!")
    597	TEST_RP(   "strdvc	r",12,VAL2,", r13, [r",11,24,", #-16]!")
    598	TEST_RP(   "strd	r",2, VAL1,", [r",4, 24,"], #48")
    599	TEST_RP(   "strd	r",10,VAL2,", [r",9, 64,"], #-48")
    600	TEST_RP(   "strd	r",6, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
    601	TEST_UNSUPPORTED("strd r6, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
    602	TEST_RP(   "strd	r",4, VAL1,", [r",12,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
    603	TEST_UNSUPPORTED(__inst_arm(0xe1efc3f0) "	@ strd r12, [pc, #48]!")
    604
    605	TEST_P(	   "ldrd	r0, [r",0, 24,", #-8]")
    606	TEST_P(	   "ldrdhi	r8, [r",13,0, ", #8]")
    607	TEST_P(	   "ldrd	r4, [r",2, 24,", #16]!")
    608	TEST_P(	   "ldrdls	r6, [r",11,24,", #-16]!")
    609	TEST_P(	   "ldrd	r2, [r",5, 24,"], #48")
    610	TEST_P(	   "ldrd	r10, [r",9,6,"], #-48")
    611	TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) "	@ ldrd r12, [pc, #48]!")
    612	TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) "	@ ldrd pc, [r9], #48")
    613	TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) "	@ ldrd lr, [r9], #48")
    614#endif
    615
    616	TEST_GROUP("Miscellaneous")
    617
    618#if __LINUX_ARM_ARCH__ >= 7
    619	TEST("movw	r0, #0")
    620	TEST("movw	r0, #0xffff")
    621	TEST("movw	lr, #0xffff")
    622	TEST_UNSUPPORTED(__inst_arm(0xe300f000) "	@ movw pc, #0")
    623	TEST_R("movt	r",0, VAL1,", #0")
    624	TEST_R("movt	r",0, VAL2,", #0xffff")
    625	TEST_R("movt	r",14,VAL1,", #0xffff")
    626	TEST_UNSUPPORTED(__inst_arm(0xe340f000) "	@ movt pc, #0")
    627#endif
    628
    629	TEST_UNSUPPORTED("msr	cpsr, 0x13")
    630	TEST_UNSUPPORTED("msr	cpsr_f, 0xf0000000")
    631	TEST_UNSUPPORTED("msr	spsr, 0x13")
    632
    633#if __LINUX_ARM_ARCH__ >= 7
    634	TEST_SUPPORTED("yield")
    635	TEST("sev")
    636	TEST("nop")
    637	TEST("wfi")
    638	TEST_SUPPORTED("wfe")
    639	TEST_UNSUPPORTED("dbg #0")
    640#endif
    641
    642	TEST_GROUP("Load/store word and unsigned byte")
    643
    644#define LOAD_STORE(byte)							\
    645	TEST_RP( "str"byte"	r",0, VAL1,", [r",1, 24,", #-2]")		\
    646	TEST_RP( "str"byte"	r",14,VAL2,", [r",13,0, ", #2]")		\
    647	TEST_RP( "str"byte"	r",1, VAL1,", [r",2, 24,", #4]!")		\
    648	TEST_RP( "str"byte"	r",12,VAL2,", [r",11,24,", #-4]!")		\
    649	TEST_RP( "str"byte"	r",2, VAL1,", [r",3, 24,"], #48")		\
    650	TEST_RP( "str"byte"	r",10,VAL2,", [r",9, 64,"], #-48")		\
    651	TEST_RP( "str"byte"	r",3, VAL1,", [r",13,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!") \
    652	TEST_UNSUPPORTED("str"byte" r3, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")				\
    653	TEST_RP( "str"byte"	r",4, VAL1,", [r",10,TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!") \
    654	TEST_RPR("str"byte"	r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")	\
    655	TEST_RPR("str"byte"	r",14,VAL2,", [r",11,0, ", r",12, 48,"]")	\
    656	TEST_UNSUPPORTED("str"byte" r14, [r13, r12]")				\
    657	TEST_UNSUPPORTED("str"byte" r14, [r12, r13]")				\
    658	TEST_RPR("str"byte"	r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")	\
    659	TEST_RPR("str"byte"	r",12,VAL2,", [r",11,48,", -r",10,24,"]!")	\
    660	TEST_RPR("str"byte"	r",2, VAL1,", [r",3, 24,"], r",4, 48,"")	\
    661	TEST_RPR("str"byte"	r",10,VAL2,", [r",9, 48,"], -r",11,24,"")	\
    662	TEST_RPR("str"byte"	r",0, VAL1,", [r",1, 24,", r",2,  32,", asl #1]")\
    663	TEST_RPR("str"byte"	r",14,VAL2,", [r",11,0, ", r",12, 32,", lsr #2]")\
    664	TEST_UNSUPPORTED("str"byte"	r14, [r13, r12, lsr #2]")		\
    665	TEST_RPR("str"byte"	r",1, VAL1,", [r",2, 24,", r",3,  32,", asr #3]!")\
    666	TEST_RPR("str"byte"	r",12,VAL2,", [r",11,24,", r",10, 4,", ror #31]!")\
    667	TEST_P(  "ldr"byte"	r0, [r",0,  24,", #-2]")			\
    668	TEST_P(  "ldr"byte"	r14, [r",13,0, ", #2]")				\
    669	TEST_P(  "ldr"byte"	r1, [r",2,  24,", #4]!")			\
    670	TEST_P(  "ldr"byte"	r12, [r",11,24,", #-4]!")			\
    671	TEST_P(  "ldr"byte"	r2, [r",3,  24,"], #48")			\
    672	TEST_P(  "ldr"byte"	r10, [r",9, 64,"], #-48")			\
    673	TEST_PR( "ldr"byte"	r0, [r",0,  48,", -r",2, 24,"]")		\
    674	TEST_PR( "ldr"byte"	r14, [r",13,0, ", r",12, 48,"]")		\
    675	TEST_PR( "ldr"byte"	r1, [r",2,  24,", r",3, 48,"]!")		\
    676	TEST_PR( "ldr"byte"	r12, [r",11,48,", -r",10,24,"]!")		\
    677	TEST_PR( "ldr"byte"	r2, [r",3,  24,"], r",4, 48,"")			\
    678	TEST_PR( "ldr"byte"	r10, [r",9, 48,"], -r",11,24,"")		\
    679	TEST_PR( "ldr"byte"	r0, [r",0,  24,", r",2,  32,", asl #1]")	\
    680	TEST_PR( "ldr"byte"	r14, [r",13,0, ", r",12, 32,", lsr #2]")	\
    681	TEST_PR( "ldr"byte"	r1, [r",2,  24,", r",3,  32,", asr #3]!")	\
    682	TEST_PR( "ldr"byte"	r12, [r",11,24,", r",10, 4,", ror #31]!")	\
    683	TEST(    "ldr"byte"	r0, [pc, #0]")					\
    684	TEST_R(  "ldr"byte"	r12, [pc, r",14,0,"]")
    685
    686	LOAD_STORE("")
    687	TEST_P(   "str	pc, [r",0,0,", #15*4]")
    688	TEST_UNSUPPORTED(   "str	pc, [sp, r2]")
    689	TEST_BF(  "ldr	pc, [sp, #15*4]")
    690	TEST_BF_R("ldr	pc, [sp, r",2,15*4,"]")
    691
    692	TEST_P(   "str	sp, [r",0,0,", #13*4]")
    693	TEST_UNSUPPORTED(   "str	sp, [sp, r2]")
    694	TEST_BF(  "ldr	sp, [sp, #13*4]")
    695	TEST_BF_R("ldr	sp, [sp, r",2,13*4,"]")
    696
    697#ifdef CONFIG_THUMB2_KERNEL
    698	TEST_ARM_TO_THUMB_INTERWORK_P("ldr	pc, [r",0,0,", #15*4]")
    699#endif
    700	TEST_UNSUPPORTED(__inst_arm(0xe5af6008) "	@ str r6, [pc, #8]!")
    701	TEST_UNSUPPORTED(__inst_arm(0xe7af6008) "	@ str r6, [pc, r8]!")
    702	TEST_UNSUPPORTED(__inst_arm(0xe5bf6008) "	@ ldr r6, [pc, #8]!")
    703	TEST_UNSUPPORTED(__inst_arm(0xe7bf6008) "	@ ldr r6, [pc, r8]!")
    704	TEST_UNSUPPORTED(__inst_arm(0xe788600f) "	@ str r6, [r8, pc]")
    705	TEST_UNSUPPORTED(__inst_arm(0xe798600f) "	@ ldr r6, [r8, pc]")
    706
    707	LOAD_STORE("b")
    708	TEST_UNSUPPORTED(__inst_arm(0xe5f7f008) "	@ ldrb pc, [r7, #8]!")
    709	TEST_UNSUPPORTED(__inst_arm(0xe7f7f008) "	@ ldrb pc, [r7, r8]!")
    710	TEST_UNSUPPORTED(__inst_arm(0xe5ef6008) "	@ strb r6, [pc, #8]!")
    711	TEST_UNSUPPORTED(__inst_arm(0xe7ef6008) "	@ strb r6, [pc, r3]!")
    712	TEST_UNSUPPORTED(__inst_arm(0xe5ff6008) "	@ ldrb r6, [pc, #8]!")
    713	TEST_UNSUPPORTED(__inst_arm(0xe7ff6008) "	@ ldrb r6, [pc, r3]!")
    714
    715	TEST_UNSUPPORTED("ldrt	r0, [r1], #4")
    716	TEST_UNSUPPORTED("ldrt	r1, [r2], r3")
    717	TEST_UNSUPPORTED("strt	r2, [r3], #4")
    718	TEST_UNSUPPORTED("strt	r3, [r4], r5")
    719	TEST_UNSUPPORTED("ldrbt	r4, [r5], #4")
    720	TEST_UNSUPPORTED("ldrbt	r5, [r6], r7")
    721	TEST_UNSUPPORTED("strbt	r6, [r7], #4")
    722	TEST_UNSUPPORTED("strbt	r7, [r8], r9")
    723
    724#if __LINUX_ARM_ARCH__ >= 7
    725	TEST_GROUP("Parallel addition and subtraction, signed")
    726
    727	TEST_UNSUPPORTED(__inst_arm(0xe6000010) "") /* Unallocated space */
    728	TEST_UNSUPPORTED(__inst_arm(0xe60fffff) "") /* Unallocated space */
    729
    730	TEST_RR(    "sadd16	r0, r",0,  HH1,", r",1, HH2,"")
    731	TEST_RR(    "sadd16	r14, r",12,HH2,", r",10,HH1,"")
    732	TEST_UNSUPPORTED(__inst_arm(0xe61cff1a) "	@ sadd16	pc, r12, r10")
    733	TEST_RR(    "sasx	r0, r",0,  HH1,", r",1, HH2,"")
    734	TEST_RR(    "sasx	r14, r",12,HH2,", r",10,HH1,"")
    735	TEST_UNSUPPORTED(__inst_arm(0xe61cff3a) "	@ sasx	pc, r12, r10")
    736	TEST_RR(    "ssax	r0, r",0,  HH1,", r",1, HH2,"")
    737	TEST_RR(    "ssax	r14, r",12,HH2,", r",10,HH1,"")
    738	TEST_UNSUPPORTED(__inst_arm(0xe61cff5a) "	@ ssax	pc, r12, r10")
    739	TEST_RR(    "ssub16	r0, r",0,  HH1,", r",1, HH2,"")
    740	TEST_RR(    "ssub16	r14, r",12,HH2,", r",10,HH1,"")
    741	TEST_UNSUPPORTED(__inst_arm(0xe61cff7a) "	@ ssub16	pc, r12, r10")
    742	TEST_RR(    "sadd8	r0, r",0,  HH1,", r",1, HH2,"")
    743	TEST_RR(    "sadd8	r14, r",12,HH2,", r",10,HH1,"")
    744	TEST_UNSUPPORTED(__inst_arm(0xe61cff9a) "	@ sadd8	pc, r12, r10")
    745	TEST_UNSUPPORTED(__inst_arm(0xe61000b0) "") /* Unallocated space */
    746	TEST_UNSUPPORTED(__inst_arm(0xe61fffbf) "") /* Unallocated space */
    747	TEST_UNSUPPORTED(__inst_arm(0xe61000d0) "") /* Unallocated space */
    748	TEST_UNSUPPORTED(__inst_arm(0xe61fffdf) "") /* Unallocated space */
    749	TEST_RR(    "ssub8	r0, r",0,  HH1,", r",1, HH2,"")
    750	TEST_RR(    "ssub8	r14, r",12,HH2,", r",10,HH1,"")
    751	TEST_UNSUPPORTED(__inst_arm(0xe61cfffa) "	@ ssub8	pc, r12, r10")
    752
    753	TEST_RR(    "qadd16	r0, r",0,  HH1,", r",1, HH2,"")
    754	TEST_RR(    "qadd16	r14, r",12,HH2,", r",10,HH1,"")
    755	TEST_UNSUPPORTED(__inst_arm(0xe62cff1a) "	@ qadd16	pc, r12, r10")
    756	TEST_RR(    "qasx	r0, r",0,  HH1,", r",1, HH2,"")
    757	TEST_RR(    "qasx	r14, r",12,HH2,", r",10,HH1,"")
    758	TEST_UNSUPPORTED(__inst_arm(0xe62cff3a) "	@ qasx	pc, r12, r10")
    759	TEST_RR(    "qsax	r0, r",0,  HH1,", r",1, HH2,"")
    760	TEST_RR(    "qsax	r14, r",12,HH2,", r",10,HH1,"")
    761	TEST_UNSUPPORTED(__inst_arm(0xe62cff5a) "	@ qsax	pc, r12, r10")
    762	TEST_RR(    "qsub16	r0, r",0,  HH1,", r",1, HH2,"")
    763	TEST_RR(    "qsub16	r14, r",12,HH2,", r",10,HH1,"")
    764	TEST_UNSUPPORTED(__inst_arm(0xe62cff7a) "	@ qsub16	pc, r12, r10")
    765	TEST_RR(    "qadd8	r0, r",0,  HH1,", r",1, HH2,"")
    766	TEST_RR(    "qadd8	r14, r",12,HH2,", r",10,HH1,"")
    767	TEST_UNSUPPORTED(__inst_arm(0xe62cff9a) "	@ qadd8	pc, r12, r10")
    768	TEST_UNSUPPORTED(__inst_arm(0xe62000b0) "") /* Unallocated space */
    769	TEST_UNSUPPORTED(__inst_arm(0xe62fffbf) "") /* Unallocated space */
    770	TEST_UNSUPPORTED(__inst_arm(0xe62000d0) "") /* Unallocated space */
    771	TEST_UNSUPPORTED(__inst_arm(0xe62fffdf) "") /* Unallocated space */
    772	TEST_RR(    "qsub8	r0, r",0,  HH1,", r",1, HH2,"")
    773	TEST_RR(    "qsub8	r14, r",12,HH2,", r",10,HH1,"")
    774	TEST_UNSUPPORTED(__inst_arm(0xe62cfffa) "	@ qsub8	pc, r12, r10")
    775
    776	TEST_RR(    "shadd16	r0, r",0,  HH1,", r",1, HH2,"")
    777	TEST_RR(    "shadd16	r14, r",12,HH2,", r",10,HH1,"")
    778	TEST_UNSUPPORTED(__inst_arm(0xe63cff1a) "	@ shadd16	pc, r12, r10")
    779	TEST_RR(    "shasx	r0, r",0,  HH1,", r",1, HH2,"")
    780	TEST_RR(    "shasx	r14, r",12,HH2,", r",10,HH1,"")
    781	TEST_UNSUPPORTED(__inst_arm(0xe63cff3a) "	@ shasx	pc, r12, r10")
    782	TEST_RR(    "shsax	r0, r",0,  HH1,", r",1, HH2,"")
    783	TEST_RR(    "shsax	r14, r",12,HH2,", r",10,HH1,"")
    784	TEST_UNSUPPORTED(__inst_arm(0xe63cff5a) "	@ shsax	pc, r12, r10")
    785	TEST_RR(    "shsub16	r0, r",0,  HH1,", r",1, HH2,"")
    786	TEST_RR(    "shsub16	r14, r",12,HH2,", r",10,HH1,"")
    787	TEST_UNSUPPORTED(__inst_arm(0xe63cff7a) "	@ shsub16	pc, r12, r10")
    788	TEST_RR(    "shadd8	r0, r",0,  HH1,", r",1, HH2,"")
    789	TEST_RR(    "shadd8	r14, r",12,HH2,", r",10,HH1,"")
    790	TEST_UNSUPPORTED(__inst_arm(0xe63cff9a) "	@ shadd8	pc, r12, r10")
    791	TEST_UNSUPPORTED(__inst_arm(0xe63000b0) "") /* Unallocated space */
    792	TEST_UNSUPPORTED(__inst_arm(0xe63fffbf) "") /* Unallocated space */
    793	TEST_UNSUPPORTED(__inst_arm(0xe63000d0) "") /* Unallocated space */
    794	TEST_UNSUPPORTED(__inst_arm(0xe63fffdf) "") /* Unallocated space */
    795	TEST_RR(    "shsub8	r0, r",0,  HH1,", r",1, HH2,"")
    796	TEST_RR(    "shsub8	r14, r",12,HH2,", r",10,HH1,"")
    797	TEST_UNSUPPORTED(__inst_arm(0xe63cfffa) "	@ shsub8	pc, r12, r10")
    798
    799	TEST_GROUP("Parallel addition and subtraction, unsigned")
    800
    801	TEST_UNSUPPORTED(__inst_arm(0xe6400010) "") /* Unallocated space */
    802	TEST_UNSUPPORTED(__inst_arm(0xe64fffff) "") /* Unallocated space */
    803
    804	TEST_RR(    "uadd16	r0, r",0,  HH1,", r",1, HH2,"")
    805	TEST_RR(    "uadd16	r14, r",12,HH2,", r",10,HH1,"")
    806	TEST_UNSUPPORTED(__inst_arm(0xe65cff1a) "	@ uadd16	pc, r12, r10")
    807	TEST_RR(    "uasx	r0, r",0,  HH1,", r",1, HH2,"")
    808	TEST_RR(    "uasx	r14, r",12,HH2,", r",10,HH1,"")
    809	TEST_UNSUPPORTED(__inst_arm(0xe65cff3a) "	@ uasx	pc, r12, r10")
    810	TEST_RR(    "usax	r0, r",0,  HH1,", r",1, HH2,"")
    811	TEST_RR(    "usax	r14, r",12,HH2,", r",10,HH1,"")
    812	TEST_UNSUPPORTED(__inst_arm(0xe65cff5a) "	@ usax	pc, r12, r10")
    813	TEST_RR(    "usub16	r0, r",0,  HH1,", r",1, HH2,"")
    814	TEST_RR(    "usub16	r14, r",12,HH2,", r",10,HH1,"")
    815	TEST_UNSUPPORTED(__inst_arm(0xe65cff7a) "	@ usub16	pc, r12, r10")
    816	TEST_RR(    "uadd8	r0, r",0,  HH1,", r",1, HH2,"")
    817	TEST_RR(    "uadd8	r14, r",12,HH2,", r",10,HH1,"")
    818	TEST_UNSUPPORTED(__inst_arm(0xe65cff9a) "	@ uadd8	pc, r12, r10")
    819	TEST_UNSUPPORTED(__inst_arm(0xe65000b0) "") /* Unallocated space */
    820	TEST_UNSUPPORTED(__inst_arm(0xe65fffbf) "") /* Unallocated space */
    821	TEST_UNSUPPORTED(__inst_arm(0xe65000d0) "") /* Unallocated space */
    822	TEST_UNSUPPORTED(__inst_arm(0xe65fffdf) "") /* Unallocated space */
    823	TEST_RR(    "usub8	r0, r",0,  HH1,", r",1, HH2,"")
    824	TEST_RR(    "usub8	r14, r",12,HH2,", r",10,HH1,"")
    825	TEST_UNSUPPORTED(__inst_arm(0xe65cfffa) "	@ usub8	pc, r12, r10")
    826
    827	TEST_RR(    "uqadd16	r0, r",0,  HH1,", r",1, HH2,"")
    828	TEST_RR(    "uqadd16	r14, r",12,HH2,", r",10,HH1,"")
    829	TEST_UNSUPPORTED(__inst_arm(0xe66cff1a) "	@ uqadd16	pc, r12, r10")
    830	TEST_RR(    "uqasx	r0, r",0,  HH1,", r",1, HH2,"")
    831	TEST_RR(    "uqasx	r14, r",12,HH2,", r",10,HH1,"")
    832	TEST_UNSUPPORTED(__inst_arm(0xe66cff3a) "	@ uqasx	pc, r12, r10")
    833	TEST_RR(    "uqsax	r0, r",0,  HH1,", r",1, HH2,"")
    834	TEST_RR(    "uqsax	r14, r",12,HH2,", r",10,HH1,"")
    835	TEST_UNSUPPORTED(__inst_arm(0xe66cff5a) "	@ uqsax	pc, r12, r10")
    836	TEST_RR(    "uqsub16	r0, r",0,  HH1,", r",1, HH2,"")
    837	TEST_RR(    "uqsub16	r14, r",12,HH2,", r",10,HH1,"")
    838	TEST_UNSUPPORTED(__inst_arm(0xe66cff7a) "	@ uqsub16	pc, r12, r10")
    839	TEST_RR(    "uqadd8	r0, r",0,  HH1,", r",1, HH2,"")
    840	TEST_RR(    "uqadd8	r14, r",12,HH2,", r",10,HH1,"")
    841	TEST_UNSUPPORTED(__inst_arm(0xe66cff9a) "	@ uqadd8	pc, r12, r10")
    842	TEST_UNSUPPORTED(__inst_arm(0xe66000b0) "") /* Unallocated space */
    843	TEST_UNSUPPORTED(__inst_arm(0xe66fffbf) "") /* Unallocated space */
    844	TEST_UNSUPPORTED(__inst_arm(0xe66000d0) "") /* Unallocated space */
    845	TEST_UNSUPPORTED(__inst_arm(0xe66fffdf) "") /* Unallocated space */
    846	TEST_RR(    "uqsub8	r0, r",0,  HH1,", r",1, HH2,"")
    847	TEST_RR(    "uqsub8	r14, r",12,HH2,", r",10,HH1,"")
    848	TEST_UNSUPPORTED(__inst_arm(0xe66cfffa) "	@ uqsub8	pc, r12, r10")
    849
    850	TEST_RR(    "uhadd16	r0, r",0,  HH1,", r",1, HH2,"")
    851	TEST_RR(    "uhadd16	r14, r",12,HH2,", r",10,HH1,"")
    852	TEST_UNSUPPORTED(__inst_arm(0xe67cff1a) "	@ uhadd16	pc, r12, r10")
    853	TEST_RR(    "uhasx	r0, r",0,  HH1,", r",1, HH2,"")
    854	TEST_RR(    "uhasx	r14, r",12,HH2,", r",10,HH1,"")
    855	TEST_UNSUPPORTED(__inst_arm(0xe67cff3a) "	@ uhasx	pc, r12, r10")
    856	TEST_RR(    "uhsax	r0, r",0,  HH1,", r",1, HH2,"")
    857	TEST_RR(    "uhsax	r14, r",12,HH2,", r",10,HH1,"")
    858	TEST_UNSUPPORTED(__inst_arm(0xe67cff5a) "	@ uhsax	pc, r12, r10")
    859	TEST_RR(    "uhsub16	r0, r",0,  HH1,", r",1, HH2,"")
    860	TEST_RR(    "uhsub16	r14, r",12,HH2,", r",10,HH1,"")
    861	TEST_UNSUPPORTED(__inst_arm(0xe67cff7a) "	@ uhsub16	pc, r12, r10")
    862	TEST_RR(    "uhadd8	r0, r",0,  HH1,", r",1, HH2,"")
    863	TEST_RR(    "uhadd8	r14, r",12,HH2,", r",10,HH1,"")
    864	TEST_UNSUPPORTED(__inst_arm(0xe67cff9a) "	@ uhadd8	pc, r12, r10")
    865	TEST_UNSUPPORTED(__inst_arm(0xe67000b0) "") /* Unallocated space */
    866	TEST_UNSUPPORTED(__inst_arm(0xe67fffbf) "") /* Unallocated space */
    867	TEST_UNSUPPORTED(__inst_arm(0xe67000d0) "") /* Unallocated space */
    868	TEST_UNSUPPORTED(__inst_arm(0xe67fffdf) "") /* Unallocated space */
    869	TEST_RR(    "uhsub8	r0, r",0,  HH1,", r",1, HH2,"")
    870	TEST_RR(    "uhsub8	r14, r",12,HH2,", r",10,HH1,"")
    871	TEST_UNSUPPORTED(__inst_arm(0xe67cfffa) "	@ uhsub8	pc, r12, r10")
    872	TEST_UNSUPPORTED(__inst_arm(0xe67feffa) "	@ uhsub8	r14, pc, r10")
    873	TEST_UNSUPPORTED(__inst_arm(0xe67cefff) "	@ uhsub8	r14, r12, pc")
    874#endif /* __LINUX_ARM_ARCH__ >= 7 */
    875
    876#if __LINUX_ARM_ARCH__ >= 6
    877	TEST_GROUP("Packing, unpacking, saturation, and reversal")
    878
    879	TEST_RR(    "pkhbt	r0, r",0,  HH1,", r",1, HH2,"")
    880	TEST_RR(    "pkhbt	r14,r",12, HH1,", r",10,HH2,", lsl #2")
    881	TEST_UNSUPPORTED(__inst_arm(0xe68cf11a) "	@ pkhbt	pc, r12, r10, lsl #2")
    882	TEST_RR(    "pkhtb	r0, r",0,  HH1,", r",1, HH2,"")
    883	TEST_RR(    "pkhtb	r14,r",12, HH1,", r",10,HH2,", asr #2")
    884	TEST_UNSUPPORTED(__inst_arm(0xe68cf15a) "	@ pkhtb	pc, r12, r10, asr #2")
    885	TEST_UNSUPPORTED(__inst_arm(0xe68fe15a) "	@ pkhtb	r14, pc, r10, asr #2")
    886	TEST_UNSUPPORTED(__inst_arm(0xe68ce15f) "	@ pkhtb	r14, r12, pc, asr #2")
    887	TEST_UNSUPPORTED(__inst_arm(0xe6900010) "") /* Unallocated space */
    888	TEST_UNSUPPORTED(__inst_arm(0xe69fffdf) "") /* Unallocated space */
    889
    890	TEST_R(     "ssat	r0, #24, r",0,   VAL1,"")
    891	TEST_R(     "ssat	r14, #24, r",12, VAL2,"")
    892	TEST_R(     "ssat	r0, #24, r",0,   VAL1,", lsl #8")
    893	TEST_R(     "ssat	r14, #24, r",12, VAL2,", asr #8")
    894	TEST_UNSUPPORTED(__inst_arm(0xe6b7f01c) "	@ ssat	pc, #24, r12")
    895
    896	TEST_R(     "usat	r0, #24, r",0,   VAL1,"")
    897	TEST_R(     "usat	r14, #24, r",12, VAL2,"")
    898	TEST_R(     "usat	r0, #24, r",0,   VAL1,", lsl #8")
    899	TEST_R(     "usat	r14, #24, r",12, VAL2,", asr #8")
    900	TEST_UNSUPPORTED(__inst_arm(0xe6f7f01c) "	@ usat	pc, #24, r12")
    901
    902	TEST_RR(    "sxtab16	r0, r",0,  HH1,", r",1, HH2,"")
    903	TEST_RR(    "sxtab16	r14,r",12, HH2,", r",10,HH1,", ror #8")
    904	TEST_R(     "sxtb16	r8, r",7,  HH1,"")
    905	TEST_UNSUPPORTED(__inst_arm(0xe68cf47a) "	@ sxtab16	pc,r12, r10, ror #8")
    906
    907	TEST_RR(    "sel	r0, r",0,  VAL1,", r",1, VAL2,"")
    908	TEST_RR(    "sel	r14, r",12,VAL1,", r",10, VAL2,"")
    909	TEST_UNSUPPORTED(__inst_arm(0xe68cffba) "	@ sel	pc, r12, r10")
    910	TEST_UNSUPPORTED(__inst_arm(0xe68fefba) "	@ sel	r14, pc, r10")
    911	TEST_UNSUPPORTED(__inst_arm(0xe68cefbf) "	@ sel	r14, r12, pc")
    912
    913	TEST_R(     "ssat16	r0, #12, r",0,   HH1,"")
    914	TEST_R(     "ssat16	r14, #12, r",12, HH2,"")
    915	TEST_UNSUPPORTED(__inst_arm(0xe6abff3c) "	@ ssat16	pc, #12, r12")
    916
    917	TEST_RR(    "sxtab	r0, r",0,  HH1,", r",1, HH2,"")
    918	TEST_RR(    "sxtab	r14,r",12, HH2,", r",10,HH1,", ror #8")
    919	TEST_R(     "sxtb	r8, r",7,  HH1,"")
    920	TEST_UNSUPPORTED(__inst_arm(0xe6acf47a) "	@ sxtab	pc,r12, r10, ror #8")
    921
    922	TEST_R(     "rev	r0, r",0,   VAL1,"")
    923	TEST_R(     "rev	r14, r",12, VAL2,"")
    924	TEST_UNSUPPORTED(__inst_arm(0xe6bfff3c) "	@ rev	pc, r12")
    925
    926	TEST_RR(    "sxtah	r0, r",0,  HH1,", r",1, HH2,"")
    927	TEST_RR(    "sxtah	r14,r",12, HH2,", r",10,HH1,", ror #8")
    928	TEST_R(     "sxth	r8, r",7,  HH1,"")
    929	TEST_UNSUPPORTED(__inst_arm(0xe6bcf47a) "	@ sxtah	pc,r12, r10, ror #8")
    930
    931	TEST_R(     "rev16	r0, r",0,   VAL1,"")
    932	TEST_R(     "rev16	r14, r",12, VAL2,"")
    933	TEST_UNSUPPORTED(__inst_arm(0xe6bfffbc) "	@ rev16	pc, r12")
    934
    935	TEST_RR(    "uxtab16	r0, r",0,  HH1,", r",1, HH2,"")
    936	TEST_RR(    "uxtab16	r14,r",12, HH2,", r",10,HH1,", ror #8")
    937	TEST_R(     "uxtb16	r8, r",7,  HH1,"")
    938	TEST_UNSUPPORTED(__inst_arm(0xe6ccf47a) "	@ uxtab16	pc,r12, r10, ror #8")
    939
    940	TEST_R(     "usat16	r0, #12, r",0,   HH1,"")
    941	TEST_R(     "usat16	r14, #12, r",12, HH2,"")
    942	TEST_UNSUPPORTED(__inst_arm(0xe6ecff3c) "	@ usat16	pc, #12, r12")
    943	TEST_UNSUPPORTED(__inst_arm(0xe6ecef3f) "	@ usat16	r14, #12, pc")
    944
    945	TEST_RR(    "uxtab	r0, r",0,  HH1,", r",1, HH2,"")
    946	TEST_RR(    "uxtab	r14,r",12, HH2,", r",10,HH1,", ror #8")
    947	TEST_R(     "uxtb	r8, r",7,  HH1,"")
    948	TEST_UNSUPPORTED(__inst_arm(0xe6ecf47a) "	@ uxtab	pc,r12, r10, ror #8")
    949
    950#if __LINUX_ARM_ARCH__ >= 7
    951	TEST_R(     "rbit	r0, r",0,   VAL1,"")
    952	TEST_R(     "rbit	r14, r",12, VAL2,"")
    953	TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "	@ rbit	pc, r12")
    954#endif
    955
    956	TEST_RR(    "uxtah	r0, r",0,  HH1,", r",1, HH2,"")
    957	TEST_RR(    "uxtah	r14,r",12, HH2,", r",10,HH1,", ror #8")
    958	TEST_R(     "uxth	r8, r",7,  HH1,"")
    959	TEST_UNSUPPORTED(__inst_arm(0xe6fff077) "	@ uxth	pc, r7")
    960	TEST_UNSUPPORTED(__inst_arm(0xe6ff807f) "	@ uxth	r8, pc")
    961	TEST_UNSUPPORTED(__inst_arm(0xe6fcf47a) "	@ uxtah	pc, r12, r10, ror #8")
    962	TEST_UNSUPPORTED(__inst_arm(0xe6fce47f) "	@ uxtah	r14, r12, pc, ror #8")
    963
    964	TEST_R(     "revsh	r0, r",0,   VAL1,"")
    965	TEST_R(     "revsh	r14, r",12, VAL2,"")
    966	TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "	@ revsh	pc, r12")
    967	TEST_UNSUPPORTED(__inst_arm(0xe6ffef3f) "	@ revsh	r14, pc")
    968
    969	TEST_UNSUPPORTED(__inst_arm(0xe6900070) "") /* Unallocated space */
    970	TEST_UNSUPPORTED(__inst_arm(0xe69fff7f) "") /* Unallocated space */
    971
    972	TEST_UNSUPPORTED(__inst_arm(0xe6d00070) "") /* Unallocated space */
    973	TEST_UNSUPPORTED(__inst_arm(0xe6dfff7f) "") /* Unallocated space */
    974#endif /* __LINUX_ARM_ARCH__ >= 6 */
    975
    976#if __LINUX_ARM_ARCH__ >= 6
    977	TEST_GROUP("Signed multiplies")
    978
    979	TEST_RRR(   "smlad	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
    980	TEST_RRR(   "smlad	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
    981	TEST_UNSUPPORTED(__inst_arm(0xe70f8a1c) "	@ smlad	pc, r12, r10, r8")
    982	TEST_RRR(   "smladx	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
    983	TEST_RRR(   "smladx	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
    984	TEST_UNSUPPORTED(__inst_arm(0xe70f8a3c) "	@ smladx	pc, r12, r10, r8")
    985
    986	TEST_RR(   "smuad	r0, r",0,  HH1,", r",1, HH2,"")
    987	TEST_RR(   "smuad	r14, r",12,HH2,", r",10,HH1,"")
    988	TEST_UNSUPPORTED(__inst_arm(0xe70ffa1c) "	@ smuad	pc, r12, r10")
    989	TEST_RR(   "smuadx	r0, r",0,  HH1,", r",1, HH2,"")
    990	TEST_RR(   "smuadx	r14, r",12,HH2,", r",10,HH1,"")
    991	TEST_UNSUPPORTED(__inst_arm(0xe70ffa3c) "	@ smuadx	pc, r12, r10")
    992
    993	TEST_RRR(   "smlsd	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
    994	TEST_RRR(   "smlsd	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
    995	TEST_UNSUPPORTED(__inst_arm(0xe70f8a5c) "	@ smlsd	pc, r12, r10, r8")
    996	TEST_RRR(   "smlsdx	r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
    997	TEST_RRR(   "smlsdx	r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
    998	TEST_UNSUPPORTED(__inst_arm(0xe70f8a7c) "	@ smlsdx	pc, r12, r10, r8")
    999
   1000	TEST_RR(   "smusd	r0, r",0,  HH1,", r",1, HH2,"")
   1001	TEST_RR(   "smusd	r14, r",12,HH2,", r",10,HH1,"")
   1002	TEST_UNSUPPORTED(__inst_arm(0xe70ffa5c) "	@ smusd	pc, r12, r10")
   1003	TEST_RR(   "smusdx	r0, r",0,  HH1,", r",1, HH2,"")
   1004	TEST_RR(   "smusdx	r14, r",12,HH2,", r",10,HH1,"")
   1005	TEST_UNSUPPORTED(__inst_arm(0xe70ffa7c) "	@ smusdx	pc, r12, r10")
   1006
   1007	TEST_RRRR( "smlald	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
   1008	TEST_RRRR( "smlald	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
   1009	TEST_UNSUPPORTED(__inst_arm(0xe74af819) "	@ smlald	pc, r10, r9, r8")
   1010	TEST_UNSUPPORTED(__inst_arm(0xe74fb819) "	@ smlald	r11, pc, r9, r8")
   1011	TEST_UNSUPPORTED(__inst_arm(0xe74ab81f) "	@ smlald	r11, r10, pc, r8")
   1012	TEST_UNSUPPORTED(__inst_arm(0xe74abf19) "	@ smlald	r11, r10, r9, pc")
   1013
   1014	TEST_RRRR( "smlaldx	r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
   1015	TEST_RRRR( "smlaldx	r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
   1016	TEST_UNSUPPORTED(__inst_arm(0xe74af839) "	@ smlaldx	pc, r10, r9, r8")
   1017	TEST_UNSUPPORTED(__inst_arm(0xe74fb839) "	@ smlaldx	r11, pc, r9, r8")
   1018
   1019	TEST_RRR(  "smmla	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
   1020	TEST_RRR(  "smmla	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
   1021	TEST_UNSUPPORTED(__inst_arm(0xe75f8a1c) "	@ smmla	pc, r12, r10, r8")
   1022	TEST_RRR(  "smmlar	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
   1023	TEST_RRR(  "smmlar	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
   1024	TEST_UNSUPPORTED(__inst_arm(0xe75f8a3c) "	@ smmlar	pc, r12, r10, r8")
   1025
   1026	TEST_RR(   "smmul	r0, r",0,  VAL1,", r",1, VAL2,"")
   1027	TEST_RR(   "smmul	r14, r",12,VAL2,", r",10,VAL1,"")
   1028	TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "	@ smmul	pc, r12, r10")
   1029	TEST_RR(   "smmulr	r0, r",0,  VAL1,", r",1, VAL2,"")
   1030	TEST_RR(   "smmulr	r14, r",12,VAL2,", r",10,VAL1,"")
   1031	TEST_UNSUPPORTED(__inst_arm(0xe75ffa3c) "	@ smmulr	pc, r12, r10")
   1032
   1033	TEST_RRR(  "smmls	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
   1034	TEST_RRR(  "smmls	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
   1035	TEST_UNSUPPORTED(__inst_arm(0xe75f8adc) "	@ smmls	pc, r12, r10, r8")
   1036	TEST_RRR(  "smmlsr	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
   1037	TEST_RRR(  "smmlsr	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
   1038	TEST_UNSUPPORTED(__inst_arm(0xe75f8afc) "	@ smmlsr	pc, r12, r10, r8")
   1039	TEST_UNSUPPORTED(__inst_arm(0xe75e8aff) "	@ smmlsr	r14, pc, r10, r8")
   1040	TEST_UNSUPPORTED(__inst_arm(0xe75e8ffc) "	@ smmlsr	r14, r12, pc, r8")
   1041	TEST_UNSUPPORTED(__inst_arm(0xe75efafc) "	@ smmlsr	r14, r12, r10, pc")
   1042
   1043	TEST_RR(   "usad8	r0, r",0,  VAL1,", r",1, VAL2,"")
   1044	TEST_RR(   "usad8	r14, r",12,VAL2,", r",10,VAL1,"")
   1045	TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "	@ usad8	pc, r12, r10")
   1046	TEST_UNSUPPORTED(__inst_arm(0xe75efa1f) "	@ usad8	r14, pc, r10")
   1047	TEST_UNSUPPORTED(__inst_arm(0xe75eff1c) "	@ usad8	r14, r12, pc")
   1048
   1049	TEST_RRR(  "usada8	r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL3,"")
   1050	TEST_RRR(  "usada8	r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
   1051	TEST_UNSUPPORTED(__inst_arm(0xe78f8a1c) "	@ usada8	pc, r12, r10, r8")
   1052	TEST_UNSUPPORTED(__inst_arm(0xe78e8a1f) "	@ usada8	r14, pc, r10, r8")
   1053	TEST_UNSUPPORTED(__inst_arm(0xe78e8f1c) "	@ usada8	r14, r12, pc, r8")
   1054#endif /* __LINUX_ARM_ARCH__ >= 6 */
   1055
   1056#if __LINUX_ARM_ARCH__ >= 7
   1057	TEST_GROUP("Bit Field")
   1058
   1059	TEST_R(     "sbfx	r0, r",0  , VAL1,", #0, #31")
   1060	TEST_R(     "sbfxeq	r14, r",12, VAL2,", #8, #16")
   1061	TEST_R(     "sbfx	r4, r",10,  VAL1,", #16, #15")
   1062	TEST_UNSUPPORTED(__inst_arm(0xe7aff45c) "	@ sbfx	pc, r12, #8, #16")
   1063
   1064	TEST_R(     "ubfx	r0, r",0  , VAL1,", #0, #31")
   1065	TEST_R(     "ubfxcs	r14, r",12, VAL2,", #8, #16")
   1066	TEST_R(     "ubfx	r4, r",10,  VAL1,", #16, #15")
   1067	TEST_UNSUPPORTED(__inst_arm(0xe7eff45c) "	@ ubfx	pc, r12, #8, #16")
   1068	TEST_UNSUPPORTED(__inst_arm(0xe7efc45f) "	@ ubfx	r12, pc, #8, #16")
   1069
   1070	TEST_R(     "bfc	r",0, VAL1,", #4, #20")
   1071	TEST_R(     "bfcvs	r",14,VAL2,", #4, #20")
   1072	TEST_R(     "bfc	r",7, VAL1,", #0, #31")
   1073	TEST_R(     "bfc	r",8, VAL2,", #0, #31")
   1074	TEST_UNSUPPORTED(__inst_arm(0xe7def01f) "	@ bfc	pc, #0, #31");
   1075
   1076	TEST_RR(    "bfi	r",0, VAL1,", r",0  , VAL2,", #0, #31")
   1077	TEST_RR(    "bfipl	r",12,VAL1,", r",14 , VAL2,", #4, #20")
   1078	TEST_UNSUPPORTED(__inst_arm(0xe7d7f21e) "	@ bfi	pc, r14, #4, #20")
   1079
   1080	TEST_UNSUPPORTED(__inst_arm(0x07f000f0) "")  /* Permanently UNDEFINED */
   1081	TEST_UNSUPPORTED(__inst_arm(0x07ffffff) "")  /* Permanently UNDEFINED */
   1082#endif /* __LINUX_ARM_ARCH__ >= 6 */
   1083
   1084	TEST_GROUP("Branch, branch with link, and block data transfer")
   1085
   1086	TEST_P(   "stmda	r",0, 16*4,", {r0}")
   1087	TEST_P(   "stmdaeq	r",4, 16*4,", {r0-r15}")
   1088	TEST_P(   "stmdane	r",8, 16*4,"!, {r8-r15}")
   1089	TEST_P(   "stmda	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1090	TEST_P(   "stmda	r",13,0,   "!, {pc}")
   1091
   1092	TEST_P(   "ldmda	r",0, 16*4,", {r0}")
   1093	TEST_BF_P("ldmdacs	r",4, 15*4,", {r0-r15}")
   1094	TEST_BF_P("ldmdacc	r",7, 15*4,"!, {r8-r15}")
   1095	TEST_P(   "ldmda	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1096	TEST_BF_P("ldmda	r",14,15*4,"!, {pc}")
   1097
   1098	TEST_P(   "stmia	r",0, 16*4,", {r0}")
   1099	TEST_P(   "stmiami	r",4, 16*4,", {r0-r15}")
   1100	TEST_P(   "stmiapl	r",8, 16*4,"!, {r8-r15}")
   1101	TEST_P(   "stmia	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1102	TEST_P(   "stmia	r",14,0,   "!, {pc}")
   1103
   1104	TEST_P(   "ldmia	r",0, 16*4,", {r0}")
   1105	TEST_BF_P("ldmiavs	r",4, 0,   ", {r0-r15}")
   1106	TEST_BF_P("ldmiavc	r",7, 8*4, "!, {r8-r15}")
   1107	TEST_P(   "ldmia	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1108	TEST_BF_P("ldmia	r",14,15*4,"!, {pc}")
   1109
   1110	TEST_P(   "stmdb	r",0, 16*4,", {r0}")
   1111	TEST_P(   "stmdbhi	r",4, 16*4,", {r0-r15}")
   1112	TEST_P(   "stmdbls	r",8, 16*4,"!, {r8-r15}")
   1113	TEST_P(   "stmdb	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1114	TEST_P(   "stmdb	r",13,4,   "!, {pc}")
   1115
   1116	TEST_P(   "ldmdb	r",0, 16*4,", {r0}")
   1117	TEST_BF_P("ldmdbge	r",4, 16*4,", {r0-r15}")
   1118	TEST_BF_P("ldmdblt	r",7, 16*4,"!, {r8-r15}")
   1119	TEST_P(   "ldmdb	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1120	TEST_BF_P("ldmdb	r",14,16*4,"!, {pc}")
   1121
   1122	TEST_P(   "stmib	r",0, 16*4,", {r0}")
   1123	TEST_P(   "stmibgt	r",4, 16*4,", {r0-r15}")
   1124	TEST_P(   "stmible	r",8, 16*4,"!, {r8-r15}")
   1125	TEST_P(   "stmib	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1126	TEST_P(   "stmib	r",13,-4,  "!, {pc}")
   1127
   1128	TEST_P(   "ldmib	r",0, 16*4,", {r0}")
   1129	TEST_BF_P("ldmibeq	r",4, -4,", {r0-r15}")
   1130	TEST_BF_P("ldmibne	r",7, 7*4,"!, {r8-r15}")
   1131	TEST_P(   "ldmib	r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
   1132	TEST_BF_P("ldmib	r",14,14*4,"!, {pc}")
   1133
   1134	TEST_P(   "stmdb	r",13,16*4,"!, {r3-r12,lr}")
   1135	TEST_P(	  "stmdbeq	r",13,16*4,"!, {r3-r12}")
   1136	TEST_P(   "stmdbne	r",2, 16*4,", {r3-r12,lr}")
   1137	TEST_P(   "stmdb	r",13,16*4,"!, {r2-r12,lr}")
   1138	TEST_P(   "stmdb	r",0, 16*4,", {r0-r12}")
   1139	TEST_P(   "stmdb	r",0, 16*4,", {r0-r12,lr}")
   1140
   1141	TEST_BF_P("ldmia	r",13,5*4, "!, {r3-r12,pc}")
   1142	TEST_P(	  "ldmiacc	r",13,5*4, "!, {r3-r12}")
   1143	TEST_BF_P("ldmiacs	r",2, 5*4, "!, {r3-r12,pc}")
   1144	TEST_BF_P("ldmia	r",13,4*4, "!, {r2-r12,pc}")
   1145	TEST_P(   "ldmia	r",0, 16*4,", {r0-r12}")
   1146	TEST_P(   "ldmia	r",0, 16*4,", {r0-r12,lr}")
   1147
   1148#ifdef CONFIG_THUMB2_KERNEL
   1149	TEST_ARM_TO_THUMB_INTERWORK_P("ldmplia	r",0,15*4,", {pc}")
   1150	TEST_ARM_TO_THUMB_INTERWORK_P("ldmmiia	r",13,0,", {r0-r15}")
   1151#endif
   1152	TEST_BF("b	2f")
   1153	TEST_BF("bl	2f")
   1154	TEST_BB("b	2b")
   1155	TEST_BB("bl	2b")
   1156
   1157	TEST_BF("beq	2f")
   1158	TEST_BF("bleq	2f")
   1159	TEST_BB("bne	2b")
   1160	TEST_BB("blne	2b")
   1161
   1162	TEST_BF("bgt	2f")
   1163	TEST_BF("blgt	2f")
   1164	TEST_BB("blt	2b")
   1165	TEST_BB("bllt	2b")
   1166
   1167	TEST_GROUP("Supervisor Call, and coprocessor instructions")
   1168
   1169	/*
   1170	 * We can't really test these by executing them, so all
   1171	 * we can do is check that probes are, or are not allowed.
   1172	 * At the moment none are allowed...
   1173	 */
   1174#define TEST_COPROCESSOR(code) TEST_UNSUPPORTED(code)
   1175
   1176#define COPROCESSOR_INSTRUCTIONS_ST_LD(two,cc)					\
   1177	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13, #4]")			\
   1178	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13, #-4]")			\
   1179	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13, #4]!")			\
   1180	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13, #-4]!")			\
   1181	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13], #4")			\
   1182	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13], #-4")			\
   1183	TEST_COPROCESSOR("stc"two"	p0, cr0, [r13], {1}")			\
   1184	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13, #4]")			\
   1185	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13, #-4]")			\
   1186	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13, #4]!")			\
   1187	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13, #-4]!")			\
   1188	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13], #4")			\
   1189	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13], #-4")			\
   1190	TEST_COPROCESSOR("stc"two"l	p0, cr0, [r13], {1}")			\
   1191	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13, #4]")			\
   1192	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13, #-4]")			\
   1193	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13, #4]!")			\
   1194	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13, #-4]!")			\
   1195	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13], #4")			\
   1196	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13], #-4")			\
   1197	TEST_COPROCESSOR("ldc"two"	p0, cr0, [r13], {1}")			\
   1198	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13, #4]")			\
   1199	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13, #-4]")			\
   1200	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13, #4]!")			\
   1201	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13, #-4]!")			\
   1202	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13], #4")			\
   1203	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13], #-4")			\
   1204	TEST_COPROCESSOR("ldc"two"l	p0, cr0, [r13], {1}")			\
   1205										\
   1206	TEST_COPROCESSOR( "stc"two"	p0, cr0, [r15, #4]")			\
   1207	TEST_COPROCESSOR( "stc"two"	p0, cr0, [r15, #-4]")			\
   1208	TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) "	@ stc"two"	0, cr0, [r15, #4]!")	\
   1209	TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) "	@ stc"two"	0, cr0, [r15, #-4]!")	\
   1210	TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) "	@ stc"two"	0, cr0, [r15], #4")	\
   1211	TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) "	@ stc"two"	0, cr0, [r15], #-4")	\
   1212	TEST_COPROCESSOR( "stc"two"	p0, cr0, [r15], {1}")			\
   1213	TEST_COPROCESSOR( "stc"two"l	p0, cr0, [r15, #4]")			\
   1214	TEST_COPROCESSOR( "stc"two"l	p0, cr0, [r15, #-4]")			\
   1215	TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) "	@ stc"two"l	0, cr0, [r15, #4]!")	\
   1216	TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) "	@ stc"two"l	0, cr0, [r15, #-4]!")	\
   1217	TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) "	@ stc"two"l	0, cr0, [r15], #4")	\
   1218	TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) "	@ stc"two"l	0, cr0, [r15], #-4")	\
   1219	TEST_COPROCESSOR( "stc"two"l	p0, cr0, [r15], {1}")			\
   1220	TEST_COPROCESSOR( "ldc"two"	p0, cr0, [r15, #4]")			\
   1221	TEST_COPROCESSOR( "ldc"two"	p0, cr0, [r15, #-4]")			\
   1222	TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) "	@ ldc"two"	0, cr0, [r15, #4]!")	\
   1223	TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) "	@ ldc"two"	0, cr0, [r15, #-4]!")	\
   1224	TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) "	@ ldc"two"	0, cr0, [r15], #4")	\
   1225	TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) "	@ ldc"two"	0, cr0, [r15], #-4")	\
   1226	TEST_COPROCESSOR( "ldc"two"	p0, cr0, [r15], {1}")			\
   1227	TEST_COPROCESSOR( "ldc"two"l	p0, cr0, [r15, #4]")			\
   1228	TEST_COPROCESSOR( "ldc"two"l	p0, cr0, [r15, #-4]")			\
   1229	TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) "	@ ldc"two"l	0, cr0, [r15, #4]!")	\
   1230	TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) "	@ ldc"two"l	0, cr0, [r15, #-4]!")	\
   1231	TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) "	@ ldc"two"l	0, cr0, [r15], #4")	\
   1232	TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) "	@ ldc"two"l	0, cr0, [r15], #-4")	\
   1233	TEST_COPROCESSOR( "ldc"two"l	p0, cr0, [r15], {1}")
   1234
   1235#define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc)					\
   1236										\
   1237	TEST_COPROCESSOR( "mcrr"two"	p0, 15, r0, r14, cr0")			\
   1238	TEST_COPROCESSOR( "mcrr"two"	p15, 0, r14, r0, cr15")			\
   1239	TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) "	@ mcrr"two"	0, 15, r0, r15, cr0")	\
   1240	TEST_UNSUPPORTED(__inst_arm(0x##cc##c40ff0f) "	@ mcrr"two"	15, 0, r15, r0, cr15")	\
   1241	TEST_COPROCESSOR( "mrrc"two"	p0, 15, r0, r14, cr0")			\
   1242	TEST_COPROCESSOR( "mrrc"two"	p15, 0, r14, r0, cr15")			\
   1243	TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) "	@ mrrc"two"	0, 15, r0, r15, cr0")	\
   1244	TEST_UNSUPPORTED(__inst_arm(0x##cc##c50ff0f) "	@ mrrc"two"	15, 0, r15, r0, cr15")	\
   1245	TEST_COPROCESSOR( "cdp"two"	p15, 15, cr15, cr15, cr15, 7")		\
   1246	TEST_COPROCESSOR( "cdp"two"	p0, 0, cr0, cr0, cr0, 0")		\
   1247	TEST_COPROCESSOR( "mcr"two"	p15, 7, r15, cr15, cr15, 7")		\
   1248	TEST_COPROCESSOR( "mcr"two"	p0, 0, r0, cr0, cr0, 0")		\
   1249	TEST_COPROCESSOR( "mrc"two"	p15, 7, r14, cr15, cr15, 7")		\
   1250	TEST_COPROCESSOR( "mrc"two"	p0, 0, r0, cr0, cr0, 0")
   1251
   1252	COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
   1253#if __LINUX_ARM_ARCH__ >= 5
   1254	COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
   1255#endif
   1256	TEST_UNSUPPORTED("svc	0")
   1257	TEST_UNSUPPORTED("svc	0xffffff")
   1258
   1259	TEST_UNSUPPORTED("svc	0")
   1260
   1261	TEST_GROUP("Unconditional instruction")
   1262
   1263#if __LINUX_ARM_ARCH__ >= 6
   1264	TEST_UNSUPPORTED("srsda	sp, 0x13")
   1265	TEST_UNSUPPORTED("srsdb	sp, 0x13")
   1266	TEST_UNSUPPORTED("srsia	sp, 0x13")
   1267	TEST_UNSUPPORTED("srsib	sp, 0x13")
   1268	TEST_UNSUPPORTED("srsda	sp!, 0x13")
   1269	TEST_UNSUPPORTED("srsdb	sp!, 0x13")
   1270	TEST_UNSUPPORTED("srsia	sp!, 0x13")
   1271	TEST_UNSUPPORTED("srsib	sp!, 0x13")
   1272
   1273	TEST_UNSUPPORTED("rfeda	sp")
   1274	TEST_UNSUPPORTED("rfedb	sp")
   1275	TEST_UNSUPPORTED("rfeia	sp")
   1276	TEST_UNSUPPORTED("rfeib	sp")
   1277	TEST_UNSUPPORTED("rfeda	sp!")
   1278	TEST_UNSUPPORTED("rfedb	sp!")
   1279	TEST_UNSUPPORTED("rfeia	sp!")
   1280	TEST_UNSUPPORTED("rfeib	sp!")
   1281	TEST_UNSUPPORTED(__inst_arm(0xf81d0a00) "	@ rfeda	pc")
   1282	TEST_UNSUPPORTED(__inst_arm(0xf91d0a00) "	@ rfedb	pc")
   1283	TEST_UNSUPPORTED(__inst_arm(0xf89d0a00) "	@ rfeia	pc")
   1284	TEST_UNSUPPORTED(__inst_arm(0xf99d0a00) "	@ rfeib	pc")
   1285	TEST_UNSUPPORTED(__inst_arm(0xf83d0a00) "	@ rfeda	pc!")
   1286	TEST_UNSUPPORTED(__inst_arm(0xf93d0a00) "	@ rfedb	pc!")
   1287	TEST_UNSUPPORTED(__inst_arm(0xf8bd0a00) "	@ rfeia	pc!")
   1288	TEST_UNSUPPORTED(__inst_arm(0xf9bd0a00) "	@ rfeib	pc!")
   1289#endif /* __LINUX_ARM_ARCH__ >= 6 */
   1290
   1291#if __LINUX_ARM_ARCH__ >= 6
   1292	TEST_X(	"blx	__dummy_thumb_subroutine_even",
   1293		".thumb				\n\t"
   1294		".space 4			\n\t"
   1295		".type __dummy_thumb_subroutine_even, %%function \n\t"
   1296		"__dummy_thumb_subroutine_even:	\n\t"
   1297		"mov	r0, pc			\n\t"
   1298		"bx	lr			\n\t"
   1299		".arm				\n\t"
   1300	)
   1301	TEST(	"blx	__dummy_thumb_subroutine_even")
   1302
   1303	TEST_X(	"blx	__dummy_thumb_subroutine_odd",
   1304		".thumb				\n\t"
   1305		".space 2			\n\t"
   1306		".type __dummy_thumb_subroutine_odd, %%function	\n\t"
   1307		"__dummy_thumb_subroutine_odd:	\n\t"
   1308		"mov	r0, pc			\n\t"
   1309		"bx	lr			\n\t"
   1310		".arm				\n\t"
   1311	)
   1312	TEST(	"blx	__dummy_thumb_subroutine_odd")
   1313#endif /* __LINUX_ARM_ARCH__ >= 6 */
   1314
   1315#if __LINUX_ARM_ARCH__ >= 5
   1316	COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
   1317#endif
   1318#if __LINUX_ARM_ARCH__ >= 6
   1319	COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
   1320#endif
   1321
   1322	TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions")
   1323
   1324#if __LINUX_ARM_ARCH__ >= 6
   1325	TEST_UNSUPPORTED("cps	0x13")
   1326	TEST_UNSUPPORTED("cpsie	i")
   1327	TEST_UNSUPPORTED("cpsid	i")
   1328	TEST_UNSUPPORTED("cpsie	i,0x13")
   1329	TEST_UNSUPPORTED("cpsid	i,0x13")
   1330	TEST_UNSUPPORTED("setend	le")
   1331	TEST_UNSUPPORTED("setend	be")
   1332#endif
   1333
   1334#if __LINUX_ARM_ARCH__ >= 7
   1335	TEST_P("pli	[r",0,0b,", #16]")
   1336	TEST(  "pli	[pc, #0]")
   1337	TEST_RR("pli	[r",12,0b,", r",0, 16,"]")
   1338	TEST_RR("pli	[r",0, 0b,", -r",12,16,", lsl #4]")
   1339#endif
   1340
   1341#if __LINUX_ARM_ARCH__ >= 5
   1342	TEST_P("pld	[r",0,32,", #-16]")
   1343	TEST(  "pld	[pc, #0]")
   1344	TEST_PR("pld	[r",7, 24, ", r",0, 16,"]")
   1345	TEST_PR("pld	[r",8, 24, ", -r",12,16,", lsl #4]")
   1346#endif
   1347
   1348#if __LINUX_ARM_ARCH__ >= 7
   1349	TEST_SUPPORTED(  __inst_arm(0xf590f000) "	@ pldw [r0, #0]")
   1350	TEST_SUPPORTED(  __inst_arm(0xf797f000) "	@ pldw	[r7, r0]")
   1351	TEST_SUPPORTED(  __inst_arm(0xf798f18c) "	@ pldw	[r8, r12, lsl #3]");
   1352#endif
   1353
   1354#if __LINUX_ARM_ARCH__ >= 7
   1355	TEST_UNSUPPORTED("clrex")
   1356	TEST_UNSUPPORTED("dsb")
   1357	TEST_UNSUPPORTED("dmb")
   1358	TEST_UNSUPPORTED("isb")
   1359#endif
   1360
   1361	verbose("\n");
   1362}
   1363