cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun50i-a64-sopine-baseboard.dts (3400B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
      3// Based on sun50i-a64-pine64.dts, which is:
      4//   Copyright (c) 2016 ARM Ltd.
      5
      6/dts-v1/;
      7
      8#include "sun50i-a64-sopine.dtsi"
      9
     10/ {
     11	model = "SoPine with baseboard";
     12	compatible = "pine64,sopine-baseboard", "pine64,sopine",
     13		     "allwinner,sun50i-a64";
     14
     15	aliases {
     16		ethernet0 = &emac;
     17		serial0 = &uart0;
     18		serial1 = &uart1;
     19		serial2 = &uart2;
     20		serial3 = &uart3;
     21		serial4 = &uart4;
     22	};
     23
     24	chosen {
     25		stdout-path = "serial0:115200n8";
     26	};
     27
     28	hdmi-connector {
     29		compatible = "hdmi-connector";
     30		type = "a";
     31
     32		port {
     33			hdmi_con_in: endpoint {
     34				remote-endpoint = <&hdmi_out_con>;
     35			};
     36		};
     37	};
     38
     39	reg_vcc1v8: vcc1v8 {
     40		compatible = "regulator-fixed";
     41		regulator-name = "vcc1v8";
     42		regulator-min-microvolt = <1800000>;
     43		regulator-max-microvolt = <1800000>;
     44	};
     45};
     46
     47&ac_power_supply {
     48	status = "okay";
     49};
     50
     51&battery_power_supply {
     52	status = "okay";
     53};
     54
     55&codec {
     56	status = "okay";
     57};
     58
     59&codec_analog {
     60	status = "okay";
     61};
     62
     63&dai {
     64	status = "okay";
     65};
     66
     67&de {
     68	status = "okay";
     69};
     70
     71&ehci0 {
     72	status = "okay";
     73};
     74
     75&ehci1 {
     76	status = "okay";
     77};
     78
     79&emac {
     80	pinctrl-names = "default";
     81	pinctrl-0 = <&rgmii_pins>;
     82	phy-mode = "rgmii-txid";
     83	phy-handle = <&ext_rgmii_phy>;
     84	phy-supply = <&reg_dc1sw>;
     85	status = "okay";
     86};
     87
     88&hdmi {
     89	hvcc-supply = <&reg_dldo1>;
     90	status = "okay";
     91};
     92
     93&hdmi_out {
     94	hdmi_out_con: endpoint {
     95		remote-endpoint = <&hdmi_con_in>;
     96	};
     97};
     98
     99&mdio {
    100	ext_rgmii_phy: ethernet-phy@1 {
    101		compatible = "ethernet-phy-ieee802.3-c22";
    102		reg = <1>;
    103	};
    104};
    105
    106&mmc2 {
    107	pinctrl-names = "default";
    108	pinctrl-0 = <&mmc2_pins>;
    109	vmmc-supply = <&reg_dcdc1>;
    110	vqmmc-supply = <&reg_vcc1v8>;
    111	bus-width = <8>;
    112	non-removable;
    113	cap-mmc-hw-reset;
    114	mmc-hs200-1_8v;
    115	status = "okay";
    116};
    117
    118&ohci0 {
    119	status = "okay";
    120};
    121
    122&ohci1 {
    123	status = "okay";
    124};
    125
    126&reg_dc1sw {
    127	/*
    128	 * Ethernet PHY needs 30ms to properly power up and some more
    129	 * to initialize. 100ms should be plenty of time to finish
    130	 * whole process.
    131	 */
    132	regulator-enable-ramp-delay = <100000>;
    133	regulator-name = "vcc-phy";
    134};
    135
    136&reg_dldo1 {
    137	regulator-min-microvolt = <3300000>;
    138	regulator-max-microvolt = <3300000>;
    139	regulator-name = "vcc-hdmi";
    140};
    141
    142&reg_dldo2 {
    143	regulator-min-microvolt = <3300000>;
    144	regulator-max-microvolt = <3300000>;
    145	regulator-name = "vcc-mipi";
    146};
    147
    148&reg_dldo4 {
    149	regulator-min-microvolt = <3300000>;
    150	regulator-max-microvolt = <3300000>;
    151	regulator-name = "vcc-wifi";
    152};
    153
    154&simplefb_hdmi {
    155	vcc-hdmi-supply = <&reg_dldo1>;
    156};
    157
    158&sound {
    159	simple-audio-card,aux-devs = <&codec_analog>;
    160	simple-audio-card,widgets = "Microphone", "Microphone Jack",
    161				    "Headphone", "Headphone Jack";
    162	simple-audio-card,routing =
    163			"Left DAC", "DACL",
    164			"Right DAC", "DACR",
    165			"Headphone Jack", "HP",
    166			"ADCL", "Left ADC",
    167			"ADCR", "Right ADC",
    168			"MIC2", "Microphone Jack";
    169	status = "okay";
    170};
    171
    172&uart0 {
    173	pinctrl-names = "default";
    174	pinctrl-0 = <&uart0_pb_pins>;
    175	status = "okay";
    176};
    177
    178/* On Pi-2 connector */
    179&uart2 {
    180	pinctrl-names = "default";
    181	pinctrl-0 = <&uart2_pins>;
    182	status = "disabled";
    183};
    184
    185/* On Euler connector */
    186&uart3 {
    187	pinctrl-names = "default";
    188	pinctrl-0 = <&uart3_pins>;
    189	status = "disabled";
    190};
    191
    192/* On Euler connector, RTS/CTS optional */
    193&uart4 {
    194	pinctrl-names = "default";
    195	pinctrl-0 = <&uart4_pins>;
    196	status = "disabled";
    197};
    198
    199&usb_otg {
    200	dr_mode = "host";
    201	status = "okay";
    202};
    203
    204&usbphy {
    205	status = "okay";
    206};