cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun50i-h5-orangepi-zero-plus.dts (2554B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2// Copyright (C) 2016 ARM Ltd.
      3// Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
      4
      5/dts-v1/;
      6#include "sun50i-h5.dtsi"
      7
      8#include <dt-bindings/gpio/gpio.h>
      9#include <dt-bindings/input/input.h>
     10#include <dt-bindings/pinctrl/sun4i-a10.h>
     11
     12/ {
     13	model = "Xunlong Orange Pi Zero Plus";
     14	compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
     15
     16	reg_vcc3v3: vcc3v3 {
     17		compatible = "regulator-fixed";
     18		regulator-name = "vcc3v3";
     19		regulator-min-microvolt = <3300000>;
     20		regulator-max-microvolt = <3300000>;
     21	};
     22
     23	aliases {
     24		ethernet0 = &emac;
     25		ethernet1 = &rtl8189ftv;
     26		serial0 = &uart0;
     27	};
     28
     29	chosen {
     30		stdout-path = "serial0:115200n8";
     31	};
     32
     33	leds {
     34		compatible = "gpio-leds";
     35
     36		led-0 {
     37			label = "orangepi:green:pwr";
     38			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
     39			default-state = "on";
     40		};
     41
     42		led-1 {
     43			label = "orangepi:red:status";
     44			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
     45		};
     46	};
     47
     48	reg_gmac_3v3: gmac-3v3 {
     49		compatible = "regulator-fixed";
     50		regulator-name = "gmac-3v3";
     51		regulator-min-microvolt = <3300000>;
     52		regulator-max-microvolt = <3300000>;
     53		startup-delay-us = <100000>;
     54		enable-active-high;
     55		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
     56	};
     57};
     58
     59&ehci0 {
     60	status = "okay";
     61};
     62
     63&ehci1 {
     64	status = "okay";
     65};
     66
     67&emac {
     68	pinctrl-names = "default";
     69	pinctrl-0 = <&emac_rgmii_pins>;
     70	phy-supply = <&reg_gmac_3v3>;
     71	phy-handle = <&ext_rgmii_phy>;
     72	phy-mode = "rgmii-id";
     73	status = "okay";
     74};
     75
     76&external_mdio {
     77	ext_rgmii_phy: ethernet-phy@1 {
     78		compatible = "ethernet-phy-ieee802.3-c22";
     79		reg = <1>;
     80	};
     81};
     82
     83&mmc0 {
     84	vmmc-supply = <&reg_vcc3v3>;
     85	bus-width = <4>;
     86	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
     87	status = "okay";
     88};
     89
     90&mmc1 {
     91	vmmc-supply = <&reg_vcc3v3>;
     92	bus-width = <4>;
     93	non-removable;
     94	status = "okay";
     95
     96	/*
     97	 * Explicitly define the sdio device, so that we can add an ethernet
     98	 * alias for it (which e.g. makes u-boot set a mac-address).
     99	 */
    100	rtl8189ftv: sdio_wifi@1 {
    101		reg = <1>;
    102	};
    103};
    104
    105&spi0  {
    106	status = "okay";
    107
    108	flash@0 {
    109		#address-cells = <1>;
    110		#size-cells = <1>;
    111		compatible = "mxicy,mx25l1606e", "winbond,w25q128";
    112		reg = <0>;
    113		spi-max-frequency = <40000000>;
    114	};
    115};
    116
    117&ohci0 {
    118	status = "okay";
    119};
    120
    121&ohci1 {
    122	status = "okay";
    123};
    124
    125&uart0 {
    126	pinctrl-names = "default";
    127	pinctrl-0 = <&uart0_pa_pins>;
    128	status = "okay";
    129};
    130
    131&usb_otg {
    132	dr_mode = "peripheral";
    133	status = "okay";
    134};
    135
    136&usbphy {
    137	/* USB Type-A ports' VBUS is always on */
    138	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
    139	status = "okay";
    140};