cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun50i-h5-orangepi-zero-plus2.dts (2502B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
      3
      4/dts-v1/;
      5
      6#include "sun50i-h5.dtsi"
      7
      8#include <dt-bindings/gpio/gpio.h>
      9
     10/ {
     11	model = "OrangePi Zero Plus2";
     12	compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
     13
     14	aliases {
     15		serial0 = &uart0;
     16	};
     17
     18	chosen {
     19		stdout-path = "serial0:115200n8";
     20	};
     21
     22	connector {
     23		compatible = "hdmi-connector";
     24		type = "a";
     25
     26		port {
     27			hdmi_con_in: endpoint {
     28				remote-endpoint = <&hdmi_out_con>;
     29			};
     30		};
     31	};
     32
     33	leds {
     34		compatible = "gpio-leds";
     35
     36		led-0 {
     37			label = "orangepi:green:pwr";
     38			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
     39			default-state = "on";
     40		};
     41
     42		led-1 {
     43			label = "orangepi:red:status";
     44			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
     45		};
     46	};
     47
     48	reg_vcc3v3: vcc3v3 {
     49		compatible = "regulator-fixed";
     50		regulator-name = "vcc3v3";
     51		regulator-min-microvolt = <3300000>;
     52		regulator-max-microvolt = <3300000>;
     53	};
     54
     55	wifi_pwrseq: wifi_pwrseq {
     56		compatible = "mmc-pwrseq-simple";
     57		reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
     58		post-power-on-delay-ms = <200>;
     59	};
     60};
     61
     62&de {
     63	status = "okay";
     64};
     65
     66&ehci0 {
     67	status = "okay";
     68};
     69
     70&hdmi {
     71	status = "okay";
     72};
     73
     74&hdmi_out {
     75	hdmi_out_con: endpoint {
     76		remote-endpoint = <&hdmi_con_in>;
     77	};
     78};
     79
     80&mmc0 {
     81	vmmc-supply = <&reg_vcc3v3>;
     82	bus-width = <4>;
     83	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
     84	status = "okay";
     85};
     86
     87&mmc1 {
     88	vmmc-supply = <&reg_vcc3v3>;
     89	vqmmc-supply = <&reg_vcc3v3>;
     90	mmc-pwrseq = <&wifi_pwrseq>;
     91	bus-width = <4>;
     92	non-removable;
     93	status = "okay";
     94
     95	brcmf: wifi@1 {
     96		reg = <1>;
     97		compatible = "brcm,bcm4329-fmac";
     98		interrupt-parent = <&r_pio>;
     99		interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>;	/* PL7 */
    100		interrupt-names = "host-wake";
    101	};
    102};
    103
    104&mmc2 {
    105	pinctrl-names = "default";
    106	pinctrl-0 = <&mmc2_8bit_pins>;
    107	vmmc-supply = <&reg_vcc3v3>;
    108	bus-width = <8>;
    109	non-removable;
    110	cap-mmc-hw-reset;
    111	status = "okay";
    112};
    113
    114&ohci0 {
    115	status = "okay";
    116};
    117
    118&uart0 {
    119	pinctrl-names = "default";
    120	pinctrl-0 = <&uart0_pa_pins>;
    121	status = "okay";
    122};
    123
    124&uart1 {
    125	pinctrl-names = "default";
    126	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
    127	status = "okay";
    128};
    129
    130&usb_otg {
    131	/*
    132	 * According to schematics CN1 MicroUSB port can be used to take
    133	 * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
    134	 * port cannot provide power externally even if the board is powered
    135	 * via GPIO pins. It thus makes sense to force peripheral mode.
    136	 */
    137	dr_mode = "peripheral";
    138	status = "okay";
    139};
    140
    141&usbphy {
    142	status = "okay";
    143};