cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson-gxl-s805x-libretech-ac.dts (6621B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2018 BayLibre, SAS.
      4 * Author: Neil Armstrong <narmstrong@baylibre.com>
      5 * Author: Jerome Brunet <jbrunet@baylibre.com>
      6 */
      7
      8/dts-v1/;
      9
     10#include <dt-bindings/input/input.h>
     11#include <dt-bindings/sound/meson-aiu.h>
     12
     13#include "meson-gxl-s805x.dtsi"
     14
     15/ {
     16	compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
     17		     "amlogic,meson-gxl";
     18	model = "Libre Computer AML-S805X-AC";
     19
     20	aliases {
     21		serial0 = &uart_AO;
     22		ethernet0 = &ethmac;
     23		spi0 = &spifc;
     24	};
     25
     26	chosen {
     27		stdout-path = "serial0:115200n8";
     28	};
     29
     30	cvbs-connector {
     31		/*
     32		 * The pads are present but no connector is soldered on
     33		 * 2J2, so keep this off by default.
     34		 */
     35		status = "disabled";
     36		compatible = "composite-video-connector";
     37
     38		port {
     39			cvbs_connector_in: endpoint {
     40				remote-endpoint = <&cvbs_vdac_out>;
     41			};
     42		};
     43	};
     44
     45	dc_5v: regulator-dc_5v {
     46		compatible = "regulator-fixed";
     47		regulator-name = "DC_5V";
     48		regulator-min-microvolt = <5000000>;
     49		regulator-max-microvolt = <5000000>;
     50		regulator-always-on;
     51	};
     52
     53	emmc_pwrseq: emmc-pwrseq {
     54		compatible = "mmc-pwrseq-emmc";
     55		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
     56	};
     57
     58	hdmi-connector {
     59		compatible = "hdmi-connector";
     60		type = "a";
     61
     62		port {
     63			hdmi_connector_in: endpoint {
     64				remote-endpoint = <&hdmi_tx_tmds_out>;
     65			};
     66		};
     67	};
     68
     69	memory@0 {
     70		device_type = "memory";
     71		reg = <0x0 0x0 0x0 0x20000000>;
     72	};
     73
     74	vcck: regulator-vcck {
     75		compatible = "regulator-fixed";
     76		regulator-name = "VCCK";
     77		regulator-min-microvolt = <3300000>;
     78		regulator-max-microvolt = <3300000>;
     79		vin-supply = <&dc_5v>;
     80
     81		/*
     82		 * This is controlled by GPIOAO_9 we reserve this but
     83		 * claiming it as done below reset the board anyway
     84		 * Need to investigate this
     85		 *
     86		 * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
     87		 * enable-active-high;
     88		 */
     89		regulator-always-on;
     90	};
     91
     92	vcc_3v3: regulator-vcc_3v3 {
     93		compatible = "regulator-fixed";
     94		regulator-name = "VCC_3V3";
     95		regulator-min-microvolt = <3300000>;
     96		regulator-max-microvolt = <3300000>;
     97		vin-supply = <&dc_5v>;
     98		regulator-always-on;
     99	};
    100
    101	vddio_ao18: regulator-vddio_ao18 {
    102		compatible = "regulator-fixed";
    103		regulator-name = "VDDIO_AO18";
    104		regulator-min-microvolt = <1800000>;
    105		regulator-max-microvolt = <1800000>;
    106		vin-supply = <&vcc_3v3>;
    107		regulator-always-on;
    108	};
    109
    110	vddio_boot: regulator-vddio_boot {
    111		compatible = "regulator-fixed";
    112		regulator-name = "VDDIO_BOOT";
    113		regulator-min-microvolt = <1800000>;
    114		regulator-max-microvolt = <1800000>;
    115		vin-supply = <&vcc_3v3>;
    116		regulator-always-on;
    117	};
    118
    119	sound {
    120		compatible = "amlogic,gx-sound-card";
    121		model = "LIBRETECH-AC";
    122		audio-widgets = "Speaker", "9J5-3 LEFT",
    123				"Speaker", "9J5-2 RIGHT";
    124		audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
    125				"9J5-2 RIGHT", "ACODEC LORN";
    126		assigned-clocks = <&clkc CLKID_MPLL0>,
    127				  <&clkc CLKID_MPLL1>,
    128				  <&clkc CLKID_MPLL2>;
    129		assigned-clock-parents = <0>, <0>, <0>;
    130		assigned-clock-rates = <294912000>,
    131				       <270950400>,
    132				       <393216000>;
    133		status = "okay";
    134
    135		dai-link-0 {
    136			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
    137		};
    138
    139		dai-link-1 {
    140			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
    141			dai-format = "i2s";
    142			mclk-fs = <256>;
    143
    144			codec-0 {
    145				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
    146			};
    147
    148			codec-1 {
    149				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
    150			};
    151		};
    152
    153		dai-link-2 {
    154			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
    155
    156			codec-0 {
    157				sound-dai = <&hdmi_tx>;
    158			};
    159		};
    160
    161		dai-link-3 {
    162			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
    163
    164			codec-0 {
    165				sound-dai = <&acodec>;
    166			};
    167		};
    168	};
    169};
    170
    171&acodec {
    172	AVDD-supply = <&vddio_ao18>;
    173	status = "okay";
    174};
    175
    176&aiu {
    177	status = "okay";
    178};
    179
    180&cec_AO {
    181	status = "okay";
    182	pinctrl-0 = <&ao_cec_pins>;
    183	pinctrl-names = "default";
    184	hdmi-phandle = <&hdmi_tx>;
    185};
    186
    187&cvbs_vdac_port {
    188	cvbs_vdac_out: endpoint {
    189		remote-endpoint = <&cvbs_connector_in>;
    190	};
    191};
    192
    193&ethmac {
    194	status = "okay";
    195};
    196
    197&internal_phy {
    198	pinctrl-0 = <&eth_link_led_pins>, <&eth_act_led_pins>;
    199	pinctrl-names = "default";
    200};
    201
    202&ir {
    203	status = "okay";
    204	pinctrl-0 = <&remote_input_ao_pins>;
    205	pinctrl-names = "default";
    206};
    207
    208&hdmi_tx {
    209	status = "okay";
    210	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
    211	pinctrl-names = "default";
    212};
    213
    214&hdmi_tx_tmds_port {
    215	hdmi_tx_tmds_out: endpoint {
    216		remote-endpoint = <&hdmi_connector_in>;
    217	};
    218};
    219
    220&gpio_ao {
    221	gpio-line-names = "UART TX",
    222			  "UART RX",
    223			  "7J1 Header Pin31",
    224			  "", "", "", "",
    225			  "IR In",
    226			  "HDMI CEC",
    227			  "5V VCCK Regulator",
    228			  /* GPIO_TEST_N */
    229			  "";
    230};
    231
    232&gpio {
    233	gpio-line-names = /* Bank GPIOZ */
    234			  "", "", "", "", "", "", "",
    235			  "", "", "", "", "", "", "",
    236			  "Eth Link LED", "Eth Activity LED",
    237			  /* Bank GPIOH */
    238			  "HDMI HPD", "HDMI SDA", "HDMI SCL",
    239			  "", "7J1 Header Pin13",
    240			  "7J1 Header Pin15",
    241			  "7J1 Header Pin7",
    242			  "7J1 Header Pin12",
    243			  "7J1 Header Pin16",
    244			  "7J1 Header Pin18",
    245			  /* Bank BOOT */
    246			  "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
    247			  "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
    248			  "eMMC Clk", "eMMC Reset", "eMMC CMD",
    249			  "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
    250			  "", "SPI NOR Chip Select",
    251			  /* Bank CARD */
    252			  "", "", "", "", "", "", "",
    253			  /* Bank GPIODV */
    254			  "", "", "", "", "", "", "", "", "", "", "", "",
    255			  "", "", "", "", "", "", "", "", "", "", "", "",
    256			  "7J1 Header Pin27", "7J1 Header Pin28", "",
    257			  "7J1 Header Pin29",
    258			  "VCCK Regulator", "VDDEE Regulator",
    259			  /* Bank GPIOX */
    260			  "7J1 Header Pin22", "7J1 Header Pin26",
    261			  "7J1 Header Pin36", "7J1 Header Pin38",
    262			  "7J1 Header Pin40", "7J1 Header Pin37",
    263			  "7J1 Header Pin33", "7J1 Header Pin35",
    264			  "7J1 Header Pin19", "7J1 Header Pin21",
    265			  "7J1 Header Pin24", "7J1 Header Pin23",
    266			  "7J1 Header Pin8", "7J1 Header Pin10",
    267			  "", "", "7J1 Header Pin32", "", "",
    268			  /* Bank GPIOCLK */
    269			  "", "";
    270};
    271
    272&saradc {
    273	status = "okay";
    274	vref-supply = <&vddio_boot>;
    275};
    276
    277/* eMMC */
    278&sd_emmc_c {
    279	status = "okay";
    280	pinctrl-0 = <&emmc_pins>;
    281	pinctrl-1 = <&emmc_clk_gate_pins>;
    282	pinctrl-names = "default", "clk-gate";
    283
    284	bus-width = <8>;
    285	cap-mmc-highspeed;
    286	mmc-ddr-1_8v;
    287	mmc-hs200-1_8v;
    288	max-frequency = <200000000>;
    289	disable-wp;
    290
    291	mmc-pwrseq = <&emmc_pwrseq>;
    292	vmmc-supply = <&vcc_3v3>;
    293	vqmmc-supply = <&vddio_boot>;
    294};
    295
    296&spifc {
    297	status = "okay";
    298	pinctrl-0 = <&nor_pins>;
    299	pinctrl-names = "default";
    300
    301	w25q32: flash@0 {
    302		#address-cells = <1>;
    303		#size-cells = <1>;
    304		compatible = "jedec,spi-nor";
    305		reg = <0>;
    306		spi-max-frequency = <3000000>;
    307	};
    308};
    309
    310&uart_AO {
    311	status = "okay";
    312	pinctrl-0 = <&uart_ao_a_pins>;
    313	pinctrl-names = "default";
    314};
    315
    316&usb {
    317	status = "okay";
    318	dr_mode = "host";
    319};