cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson-gxl-s805x-p241.dts (5878B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2018 BayLibre, SAS.
      4 * Author: Neil Armstrong <narmstrong@baylibre.com>
      5 * Author: Jerome Brunet <jbrunet@baylibre.com>
      6 */
      7
      8/dts-v1/;
      9
     10#include <dt-bindings/input/input.h>
     11#include <dt-bindings/sound/meson-aiu.h>
     12
     13#include "meson-gxl-s805x.dtsi"
     14
     15/ {
     16	compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";
     17	model = "Amlogic Meson GXL (S805X) P241 Development Board";
     18
     19	aliases {
     20		serial0 = &uart_AO;
     21		serial1 = &uart_A;
     22		ethernet0 = &ethmac;
     23	};
     24
     25	au2: analog-amplifier {
     26		compatible = "simple-audio-amplifier";
     27		sound-name-prefix = "AU2";
     28		VCC-supply = <&vcc_5v>;
     29		enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
     30	};
     31
     32	chosen {
     33		stdout-path = "serial0:115200n8";
     34	};
     35
     36	cvbs-connector {
     37		compatible = "composite-video-connector";
     38
     39		port {
     40			cvbs_connector_in: endpoint {
     41				remote-endpoint = <&cvbs_vdac_out>;
     42			};
     43		};
     44	};
     45
     46	emmc_pwrseq: emmc-pwrseq {
     47		compatible = "mmc-pwrseq-emmc";
     48		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
     49	};
     50
     51	hdmi-connector {
     52		compatible = "hdmi-connector";
     53		type = "a";
     54
     55		port {
     56			hdmi_connector_in: endpoint {
     57				remote-endpoint = <&hdmi_tx_tmds_out>;
     58			};
     59		};
     60	};
     61
     62	memory@0 {
     63		device_type = "memory";
     64		reg = <0x0 0x0 0x0 0x20000000>;
     65	};
     66
     67	vddio_boot: regulator-vddio_boot {
     68		compatible = "regulator-fixed";
     69		regulator-name = "VDDIO_BOOT";
     70		regulator-min-microvolt = <1800000>;
     71		regulator-max-microvolt = <1800000>;
     72	};
     73
     74	vddao_3v3: regulator-vddao_3v3 {
     75		compatible = "regulator-fixed";
     76		regulator-name = "VDDAO_3V3";
     77		regulator-min-microvolt = <3300000>;
     78		regulator-max-microvolt = <3300000>;
     79	};
     80
     81	vddio_ao18: regulator-vddio_ao18 {
     82		compatible = "regulator-fixed";
     83		regulator-name = "VDDIO_AO18";
     84		regulator-min-microvolt = <1800000>;
     85		regulator-max-microvolt = <1800000>;
     86	};
     87
     88	vcc_3v3: regulator-vcc_3v3 {
     89		compatible = "regulator-fixed";
     90		regulator-name = "VCC_3V3";
     91		regulator-min-microvolt = <3300000>;
     92		regulator-max-microvolt = <3300000>;
     93	};
     94
     95	vcc_5v: regulator-vcc-5v {
     96		compatible = "regulator-fixed";
     97		regulator-name = "VCC_5V";
     98		regulator-min-microvolt = <5000000>;
     99		regulator-max-microvolt = <5000000>;
    100	};
    101
    102
    103	emmc_pwrseq: emmc-pwrseq {
    104		compatible = "mmc-pwrseq-emmc";
    105		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
    106	};
    107
    108	wifi32k: wifi32k {
    109		compatible = "pwm-clock";
    110		#clock-cells = <0>;
    111		clock-frequency = <32768>;
    112		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
    113	};
    114
    115	sdio_pwrseq: sdio-pwrseq {
    116		compatible = "mmc-pwrseq-simple";
    117		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
    118		clocks = <&wifi32k>;
    119		clock-names = "ext_clock";
    120	};
    121
    122	sound {
    123		compatible = "amlogic,gx-sound-card";
    124		model = "GXL-P241";
    125		audio-aux-devs = <&au2>;
    126		audio-widgets = "Line", "Lineout";
    127		audio-routing = "AU2 INL", "ACODEC LOLN",
    128				"AU2 INR", "ACODEC LORN",
    129				"Lineout", "AU2 OUTL",
    130				"Lineout", "AU2 OUTR";
    131		assigned-clocks = <&clkc CLKID_MPLL0>,
    132				  <&clkc CLKID_MPLL1>,
    133				  <&clkc CLKID_MPLL2>;
    134		assigned-clock-parents = <0>, <0>, <0>;
    135		assigned-clock-rates = <294912000>,
    136				       <270950400>,
    137				       <393216000>;
    138		status = "okay";
    139
    140		dai-link-0 {
    141			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
    142		};
    143
    144		dai-link-1 {
    145			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
    146			dai-format = "i2s";
    147			mclk-fs = <256>;
    148
    149			codec-0 {
    150				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
    151			};
    152
    153			codec-1 {
    154				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
    155			};
    156		};
    157
    158		dai-link-2 {
    159			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
    160
    161			codec-0 {
    162				sound-dai = <&hdmi_tx>;
    163			};
    164		};
    165
    166		dai-link-3 {
    167			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
    168
    169			codec-0 {
    170				sound-dai = <&acodec>;
    171			};
    172		};
    173	};
    174};
    175
    176&acodec {
    177	AVDD-supply = <&vddio_ao18>;
    178	status = "okay";
    179};
    180
    181&aiu {
    182	status = "okay";
    183};
    184
    185&cec_AO {
    186	status = "okay";
    187	pinctrl-0 = <&ao_cec_pins>;
    188	pinctrl-names = "default";
    189	hdmi-phandle = <&hdmi_tx>;
    190};
    191
    192&cvbs_vdac_port {
    193	cvbs_vdac_out: endpoint {
    194		remote-endpoint = <&cvbs_connector_in>;
    195	};
    196};
    197
    198&ethmac {
    199	status = "okay";
    200};
    201
    202&internal_phy {
    203	pinctrl-0 = <&eth_link_led_pins>, <&eth_act_led_pins>;
    204	pinctrl-names = "default";
    205};
    206
    207&ir {
    208	status = "okay";
    209	pinctrl-0 = <&remote_input_ao_pins>;
    210	pinctrl-names = "default";
    211};
    212
    213&hdmi_tx {
    214	status = "okay";
    215	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
    216	pinctrl-names = "default";
    217	hdmi-supply = <&vcc_5v>;
    218};
    219
    220&hdmi_tx_tmds_port {
    221	hdmi_tx_tmds_out: endpoint {
    222		remote-endpoint = <&hdmi_connector_in>;
    223	};
    224};
    225
    226&saradc {
    227	status = "okay";
    228	vref-supply = <&vddio_ao18>;
    229};
    230
    231/* Wireless SDIO Module */
    232&sd_emmc_a {
    233	status = "okay";
    234	pinctrl-0 = <&sdio_pins>;
    235	pinctrl-1 = <&sdio_clk_gate_pins>;
    236	pinctrl-names = "default", "clk-gate";
    237	#address-cells = <1>;
    238	#size-cells = <0>;
    239
    240	bus-width = <4>;
    241	cap-sd-highspeed;
    242	max-frequency = <50000000>;
    243
    244	non-removable;
    245	disable-wp;
    246
    247	/* WiFi firmware requires power to be kept while in suspend */
    248	keep-power-in-suspend;
    249
    250	mmc-pwrseq = <&sdio_pwrseq>;
    251
    252	vmmc-supply = <&vddao_3v3>;
    253	vqmmc-supply = <&vddio_boot>;
    254};
    255
    256/* eMMC */
    257&sd_emmc_c {
    258	status = "okay";
    259	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
    260	pinctrl-1 = <&emmc_clk_gate_pins>;
    261	pinctrl-names = "default", "clk-gate";
    262
    263	bus-width = <8>;
    264	cap-mmc-highspeed;
    265	max-frequency = <200000000>;
    266	non-removable;
    267	disable-wp;
    268	mmc-ddr-1_8v;
    269	mmc-hs200-1_8v;
    270
    271	mmc-pwrseq = <&emmc_pwrseq>;
    272	vmmc-supply = <&vcc_3v3>;
    273	vqmmc-supply = <&vddio_boot>;
    274};
    275
    276&pwm_ef {
    277	status = "okay";
    278	pinctrl-0 = <&pwm_e_pins>;
    279	pinctrl-names = "default";
    280	clocks = <&clkc CLKID_FCLK_DIV4>;
    281	clock-names = "clkin0";
    282};
    283
    284/* This is connected to the Bluetooth module: */
    285&uart_A {
    286	status = "okay";
    287	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
    288	pinctrl-names = "default";
    289	uart-has-rtscts;
    290};
    291
    292&uart_AO {
    293	status = "okay";
    294	pinctrl-0 = <&uart_ao_a_pins>;
    295	pinctrl-names = "default";
    296};
    297
    298&usb {
    299	status = "okay";
    300	dr_mode = "host";
    301};
    302
    303&usb2_phy0 {
    304	phy-supply = <&vcc_5v>;
    305};