cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

bcm958742-base.dtsi (3030B)

      1/*
      2 *  BSD LICENSE
      3 *
      4 *  Copyright(c) 2016-2017 Broadcom.  All rights reserved.
      5 *
      6 *  Redistribution and use in source and binary forms, with or without
      7 *  modification, are permitted provided that the following conditions
      8 *  are met:
      9 *
     10 *    * Redistributions of source code must retain the above copyright
     11 *      notice, this list of conditions and the following disclaimer.
     12 *    * Redistributions in binary form must reproduce the above copyright
     13 *      notice, this list of conditions and the following disclaimer in
     14 *      the documentation and/or other materials provided with the
     15 *      distribution.
     16 *    * Neither the name of Broadcom nor the names of its
     17 *      contributors may be used to endorse or promote products derived
     18 *      from this software without specific prior written permission.
     19 *
     20 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     21 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     22 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     23 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     24 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     25 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     26 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     30 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31 */
     32
     33#include "stingray-board-base.dtsi"
     34
     35/ {
     36	sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
     37		compatible = "regulator-gpio";
     38		regulator-name = "sdio0_vddo_ctrl_reg";
     39		regulator-type = "voltage";
     40		regulator-min-microvolt = <1800000>;
     41		regulator-max-microvolt = <3300000>;
     42		gpios = <&pca9505 18 0>;
     43		states = <3300000 0x0
     44			  1800000 0x1>;
     45	};
     46
     47	sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl {
     48		compatible = "regulator-gpio";
     49		regulator-name = "sdio1_vddo_ctrl_reg";
     50		regulator-type = "voltage";
     51		regulator-min-microvolt = <1800000>;
     52		regulator-max-microvolt = <3300000>;
     53		gpios = <&pca9505 19 0>;
     54		states = <3300000 0x0
     55			  1800000 0x1>;
     56	};
     57};
     58
     59&pwm {
     60	status = "okay";
     61};
     62
     63&i2c0 {
     64	status = "okay";
     65
     66	pca9505: pca9505@20 {
     67		compatible = "nxp,pca9505";
     68		gpio-controller;
     69		#gpio-cells = <2>;
     70		reg = <0x20>;
     71	};
     72};
     73
     74&i2c1 {
     75	status = "okay";
     76
     77	pcf8574: pcf8574@27 {
     78		compatible = "nxp,pcf8574a";
     79		gpio-controller;
     80		#gpio-cells = <2>;
     81		reg = <0x27>;
     82	};
     83};
     84
     85&enet {
     86	status = "okay";
     87};
     88
     89&nand {
     90	status = "okay";
     91	nandcs@0 {
     92		compatible = "brcm,nandcs";
     93		reg = <0>;
     94		nand-ecc-mode = "hw";
     95		nand-ecc-strength = <8>;
     96		nand-ecc-step-size = <512>;
     97		nand-bus-width = <16>;
     98		brcm,nand-oob-sector-size = <16>;
     99		#address-cells = <1>;
    100		#size-cells = <1>;
    101	};
    102};
    103
    104&sdio0 {
    105	vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
    106	status = "okay";
    107};
    108
    109&sdio1 {
    110	vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
    111	status = "okay";
    112};