cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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thunder-88xx.dtsi (9795B)


      1/*
      2 * Cavium Thunder DTS file - Thunder SoC description
      3 *
      4 * Copyright (C) 2014, Cavium Inc.
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This library is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This library is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 *     You should have received a copy of the GNU General Public
     22 *     License along with this library; if not, write to the Free
     23 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
     24 *     MA 02110-1301 USA
     25 *
     26 * Or, alternatively,
     27 *
     28 *  b) Permission is hereby granted, free of charge, to any person
     29 *     obtaining a copy of this software and associated documentation
     30 *     files (the "Software"), to deal in the Software without
     31 *     restriction, including without limitation the rights to use,
     32 *     copy, modify, merge, publish, distribute, sublicense, and/or
     33 *     sell copies of the Software, and to permit persons to whom the
     34 *     Software is furnished to do so, subject to the following
     35 *     conditions:
     36 *
     37 *     The above copyright notice and this permission notice shall be
     38 *     included in all copies or substantial portions of the Software.
     39 *
     40 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     41 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     42 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     43 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     44 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     45 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     46 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     47 *     OTHER DEALINGS IN THE SOFTWARE.
     48 */
     49
     50/ {
     51	compatible = "cavium,thunder-88xx";
     52	interrupt-parent = <&gic0>;
     53	#address-cells = <2>;
     54	#size-cells = <2>;
     55
     56	psci {
     57		compatible = "arm,psci-0.2";
     58		method = "smc";
     59	};
     60
     61	cpus {
     62		#address-cells = <2>;
     63		#size-cells = <0>;
     64
     65		cpu@0 {
     66			device_type = "cpu";
     67			compatible = "cavium,thunder";
     68			reg = <0x0 0x000>;
     69			enable-method = "psci";
     70		};
     71		cpu@1 {
     72			device_type = "cpu";
     73			compatible = "cavium,thunder";
     74			reg = <0x0 0x001>;
     75			enable-method = "psci";
     76		};
     77		cpu@2 {
     78			device_type = "cpu";
     79			compatible = "cavium,thunder";
     80			reg = <0x0 0x002>;
     81			enable-method = "psci";
     82		};
     83		cpu@3 {
     84			device_type = "cpu";
     85			compatible = "cavium,thunder";
     86			reg = <0x0 0x003>;
     87			enable-method = "psci";
     88		};
     89		cpu@4 {
     90			device_type = "cpu";
     91			compatible = "cavium,thunder";
     92			reg = <0x0 0x004>;
     93			enable-method = "psci";
     94		};
     95		cpu@5 {
     96			device_type = "cpu";
     97			compatible = "cavium,thunder";
     98			reg = <0x0 0x005>;
     99			enable-method = "psci";
    100		};
    101		cpu@6 {
    102			device_type = "cpu";
    103			compatible = "cavium,thunder";
    104			reg = <0x0 0x006>;
    105			enable-method = "psci";
    106		};
    107		cpu@7 {
    108			device_type = "cpu";
    109			compatible = "cavium,thunder";
    110			reg = <0x0 0x007>;
    111			enable-method = "psci";
    112		};
    113		cpu@8 {
    114			device_type = "cpu";
    115			compatible = "cavium,thunder";
    116			reg = <0x0 0x008>;
    117			enable-method = "psci";
    118		};
    119		cpu@9 {
    120			device_type = "cpu";
    121			compatible = "cavium,thunder";
    122			reg = <0x0 0x009>;
    123			enable-method = "psci";
    124		};
    125		cpu@a {
    126			device_type = "cpu";
    127			compatible = "cavium,thunder";
    128			reg = <0x0 0x00a>;
    129			enable-method = "psci";
    130		};
    131		cpu@b {
    132			device_type = "cpu";
    133			compatible = "cavium,thunder";
    134			reg = <0x0 0x00b>;
    135			enable-method = "psci";
    136		};
    137		cpu@c {
    138			device_type = "cpu";
    139			compatible = "cavium,thunder";
    140			reg = <0x0 0x00c>;
    141			enable-method = "psci";
    142		};
    143		cpu@d {
    144			device_type = "cpu";
    145			compatible = "cavium,thunder";
    146			reg = <0x0 0x00d>;
    147			enable-method = "psci";
    148		};
    149		cpu@e {
    150			device_type = "cpu";
    151			compatible = "cavium,thunder";
    152			reg = <0x0 0x00e>;
    153			enable-method = "psci";
    154		};
    155		cpu@f {
    156			device_type = "cpu";
    157			compatible = "cavium,thunder";
    158			reg = <0x0 0x00f>;
    159			enable-method = "psci";
    160		};
    161		cpu@100 {
    162			device_type = "cpu";
    163			compatible = "cavium,thunder";
    164			reg = <0x0 0x100>;
    165			enable-method = "psci";
    166		};
    167		cpu@101 {
    168			device_type = "cpu";
    169			compatible = "cavium,thunder";
    170			reg = <0x0 0x101>;
    171			enable-method = "psci";
    172		};
    173		cpu@102 {
    174			device_type = "cpu";
    175			compatible = "cavium,thunder";
    176			reg = <0x0 0x102>;
    177			enable-method = "psci";
    178		};
    179		cpu@103 {
    180			device_type = "cpu";
    181			compatible = "cavium,thunder";
    182			reg = <0x0 0x103>;
    183			enable-method = "psci";
    184		};
    185		cpu@104 {
    186			device_type = "cpu";
    187			compatible = "cavium,thunder";
    188			reg = <0x0 0x104>;
    189			enable-method = "psci";
    190		};
    191		cpu@105 {
    192			device_type = "cpu";
    193			compatible = "cavium,thunder";
    194			reg = <0x0 0x105>;
    195			enable-method = "psci";
    196		};
    197		cpu@106 {
    198			device_type = "cpu";
    199			compatible = "cavium,thunder";
    200			reg = <0x0 0x106>;
    201			enable-method = "psci";
    202		};
    203		cpu@107 {
    204			device_type = "cpu";
    205			compatible = "cavium,thunder";
    206			reg = <0x0 0x107>;
    207			enable-method = "psci";
    208		};
    209		cpu@108 {
    210			device_type = "cpu";
    211			compatible = "cavium,thunder";
    212			reg = <0x0 0x108>;
    213			enable-method = "psci";
    214		};
    215		cpu@109 {
    216			device_type = "cpu";
    217			compatible = "cavium,thunder";
    218			reg = <0x0 0x109>;
    219			enable-method = "psci";
    220		};
    221		cpu@10a {
    222			device_type = "cpu";
    223			compatible = "cavium,thunder";
    224			reg = <0x0 0x10a>;
    225			enable-method = "psci";
    226		};
    227		cpu@10b {
    228			device_type = "cpu";
    229			compatible = "cavium,thunder";
    230			reg = <0x0 0x10b>;
    231			enable-method = "psci";
    232		};
    233		cpu@10c {
    234			device_type = "cpu";
    235			compatible = "cavium,thunder";
    236			reg = <0x0 0x10c>;
    237			enable-method = "psci";
    238		};
    239		cpu@10d {
    240			device_type = "cpu";
    241			compatible = "cavium,thunder";
    242			reg = <0x0 0x10d>;
    243			enable-method = "psci";
    244		};
    245		cpu@10e {
    246			device_type = "cpu";
    247			compatible = "cavium,thunder";
    248			reg = <0x0 0x10e>;
    249			enable-method = "psci";
    250		};
    251		cpu@10f {
    252			device_type = "cpu";
    253			compatible = "cavium,thunder";
    254			reg = <0x0 0x10f>;
    255			enable-method = "psci";
    256		};
    257		cpu@200 {
    258			device_type = "cpu";
    259			compatible = "cavium,thunder";
    260			reg = <0x0 0x200>;
    261			enable-method = "psci";
    262		};
    263		cpu@201 {
    264			device_type = "cpu";
    265			compatible = "cavium,thunder";
    266			reg = <0x0 0x201>;
    267			enable-method = "psci";
    268		};
    269		cpu@202 {
    270			device_type = "cpu";
    271			compatible = "cavium,thunder";
    272			reg = <0x0 0x202>;
    273			enable-method = "psci";
    274		};
    275		cpu@203 {
    276			device_type = "cpu";
    277			compatible = "cavium,thunder";
    278			reg = <0x0 0x203>;
    279			enable-method = "psci";
    280		};
    281		cpu@204 {
    282			device_type = "cpu";
    283			compatible = "cavium,thunder";
    284			reg = <0x0 0x204>;
    285			enable-method = "psci";
    286		};
    287		cpu@205 {
    288			device_type = "cpu";
    289			compatible = "cavium,thunder";
    290			reg = <0x0 0x205>;
    291			enable-method = "psci";
    292		};
    293		cpu@206 {
    294			device_type = "cpu";
    295			compatible = "cavium,thunder";
    296			reg = <0x0 0x206>;
    297			enable-method = "psci";
    298		};
    299		cpu@207 {
    300			device_type = "cpu";
    301			compatible = "cavium,thunder";
    302			reg = <0x0 0x207>;
    303			enable-method = "psci";
    304		};
    305		cpu@208 {
    306			device_type = "cpu";
    307			compatible = "cavium,thunder";
    308			reg = <0x0 0x208>;
    309			enable-method = "psci";
    310		};
    311		cpu@209 {
    312			device_type = "cpu";
    313			compatible = "cavium,thunder";
    314			reg = <0x0 0x209>;
    315			enable-method = "psci";
    316		};
    317		cpu@20a {
    318			device_type = "cpu";
    319			compatible = "cavium,thunder";
    320			reg = <0x0 0x20a>;
    321			enable-method = "psci";
    322		};
    323		cpu@20b {
    324			device_type = "cpu";
    325			compatible = "cavium,thunder";
    326			reg = <0x0 0x20b>;
    327			enable-method = "psci";
    328		};
    329		cpu@20c {
    330			device_type = "cpu";
    331			compatible = "cavium,thunder";
    332			reg = <0x0 0x20c>;
    333			enable-method = "psci";
    334		};
    335		cpu@20d {
    336			device_type = "cpu";
    337			compatible = "cavium,thunder";
    338			reg = <0x0 0x20d>;
    339			enable-method = "psci";
    340		};
    341		cpu@20e {
    342			device_type = "cpu";
    343			compatible = "cavium,thunder";
    344			reg = <0x0 0x20e>;
    345			enable-method = "psci";
    346		};
    347		cpu@20f {
    348			device_type = "cpu";
    349			compatible = "cavium,thunder";
    350			reg = <0x0 0x20f>;
    351			enable-method = "psci";
    352		};
    353	};
    354
    355	timer {
    356		compatible = "arm,armv8-timer";
    357		interrupts = <1 13 4>,
    358		             <1 14 4>,
    359		             <1 11 4>,
    360		             <1 10 4>;
    361	};
    362
    363	pmu {
    364		compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
    365		interrupts = <1 7 4>;
    366	};
    367
    368	soc {
    369		compatible = "simple-bus";
    370		#address-cells = <2>;
    371		#size-cells = <2>;
    372		ranges;
    373
    374		refclk50mhz: refclk50mhz {
    375			compatible = "fixed-clock";
    376			#clock-cells = <0>;
    377			clock-frequency = <50000000>;
    378			clock-output-names = "refclk50mhz";
    379		};
    380
    381		gic0: interrupt-controller@8010,00000000 {
    382			compatible = "arm,gic-v3";
    383			#interrupt-cells = <3>;
    384			#address-cells = <2>;
    385			#size-cells = <2>;
    386			ranges;
    387			interrupt-controller;
    388			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
    389			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
    390			interrupts = <1 9 0xf04>;
    391
    392			its: gic-its@8010,00020000 {
    393				compatible = "arm,gic-v3-its";
    394				msi-controller;
    395				reg = <0x8010 0x20000 0x0 0x200000>;
    396			};
    397		};
    398
    399		uaa0: serial@87e0,24000000 {
    400			compatible = "arm,pl011", "arm,primecell";
    401			reg = <0x87e0 0x24000000 0x0 0x1000>;
    402			interrupts = <1 21 4>;
    403			clocks = <&refclk50mhz>;
    404			clock-names = "apb_pclk";
    405		};
    406
    407		uaa1: serial@87e0,25000000 {
    408			compatible = "arm,pl011", "arm,primecell";
    409			reg = <0x87e0 0x25000000 0x0 0x1000>;
    410			interrupts = <1 22 4>;
    411			clocks = <&refclk50mhz>;
    412			clock-names = "apb_pclk";
    413		};
    414	};
    415};