cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-ls1012a-frdm.dts (2237B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree file for Freescale LS1012A Freedom Board.
      4 *
      5 * Copyright 2016 Freescale Semiconductor, Inc.
      6 *
      7 */
      8/dts-v1/;
      9
     10#include <dt-bindings/interrupt-controller/irq.h>
     11#include "fsl-ls1012a.dtsi"
     12
     13/ {
     14	model = "LS1012A Freedom Board";
     15	compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
     16
     17	sys_mclk: clock-mclk {
     18		compatible = "fixed-clock";
     19		#clock-cells = <0>;
     20		clock-frequency = <25000000>;
     21	};
     22
     23	reg_1p8v: regulator-1p8v {
     24		compatible = "regulator-fixed";
     25		regulator-name = "1P8V";
     26		regulator-min-microvolt = <1800000>;
     27		regulator-max-microvolt = <1800000>;
     28		regulator-always-on;
     29	};
     30
     31	sound {
     32		compatible = "simple-audio-card";
     33		simple-audio-card,format = "i2s";
     34		simple-audio-card,widgets =
     35			"Microphone", "Microphone Jack",
     36			"Headphone", "Headphone Jack",
     37			"Speaker", "Speaker Ext",
     38			"Line", "Line In Jack";
     39		simple-audio-card,routing =
     40			"MIC_IN", "Microphone Jack",
     41			"Microphone Jack", "Mic Bias",
     42			"LINE_IN", "Line In Jack",
     43			"Headphone Jack", "HP_OUT",
     44			"Speaker Ext", "LINE_OUT";
     45
     46		simple-audio-card,cpu {
     47			sound-dai = <&sai2>;
     48			frame-master;
     49			bitclock-master;
     50		};
     51
     52		simple-audio-card,codec {
     53			sound-dai = <&codec>;
     54			frame-master;
     55			bitclock-master;
     56			system-clock-frequency = <25000000>;
     57		};
     58	};
     59};
     60
     61&dspi {
     62	bus-num = <0>;
     63	status = "okay";
     64
     65	serial@0 {
     66		compatible = "nxp,sc16is740";
     67		reg = <0>;
     68		spi-max-frequency = <4000000>;
     69		clocks = <&sc16is7xx_clk>;
     70		interrupt-parent = <&gpio1>;
     71		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
     72
     73		sc16is7xx_clk: clock-sc16is7xx {
     74			compatible = "fixed-clock";
     75			#clock-cells = <0>;
     76			clock-frequency = <24000000>;
     77		};
     78	};
     79};
     80
     81&duart0 {
     82	status = "okay";
     83};
     84
     85&i2c0 {
     86	status = "okay";
     87
     88	codec: sgtl5000@a {
     89		#sound-dai-cells = <0>;
     90		compatible = "fsl,sgtl5000";
     91		reg = <0xa>;
     92		VDDA-supply = <&reg_1p8v>;
     93		VDDIO-supply = <&reg_1p8v>;
     94		clocks = <&sys_mclk>;
     95	};
     96};
     97
     98&qspi {
     99	status = "okay";
    100
    101	s25fs512s0: flash@0 {
    102		compatible = "jedec,spi-nor";
    103		#address-cells = <1>;
    104		#size-cells = <1>;
    105		spi-max-frequency = <50000000>;
    106		m25p,fast-read;
    107		reg = <0>;
    108		spi-rx-bus-width = <2>;
    109		spi-tx-bus-width = <2>;
    110	};
    111};
    112
    113&sai2 {
    114	status = "okay";
    115};
    116
    117&sata {
    118	status = "okay";
    119};