cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx8mm-venice-gw72xx-0x-imx219.dts (1561B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright 2022 Gateworks Corporation
      4 */
      5
      6#include <dt-bindings/gpio/gpio.h>
      7
      8#include "imx8mm-pinfunc.h"
      9
     10/dts-v1/;
     11/plugin/;
     12
     13&{/} {
     14	compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
     15
     16	reg_cam: regulator-cam {
     17		pinctrl-names = "default";
     18		pinctrl-0 = <&pinctrl_reg_cam>;
     19		compatible = "regulator-fixed";
     20		regulator-name = "reg_cam";
     21		gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
     22		enable-active-high;
     23		regulator-min-microvolt = <1800000>;
     24		regulator-max-microvolt = <1800000>;
     25	};
     26
     27	cam24m: cam24m {
     28		compatible = "fixed-clock";
     29		#clock-cells = <0>;
     30		clock-frequency = <24000000>;
     31		clock-output-names = "cam24m";
     32	};
     33};
     34
     35&csi {
     36	status = "okay";
     37};
     38
     39&i2c3 {
     40	#address-cells = <1>;
     41	#size-cells = <0>;
     42
     43	imx219: sensor@10 {
     44		compatible = "sony,imx219";
     45		reg = <0x10>;
     46		clocks = <&cam24m>;
     47		VDIG-supply = <&reg_cam>;
     48
     49		port {
     50			/* MIPI CSI-2 bus endpoint */
     51			imx219_to_mipi_csi2: endpoint {
     52				remote-endpoint = <&imx8mm_mipi_csi_in>;
     53				clock-lanes = <0>;
     54				data-lanes = <1 2>;
     55				link-frequencies = /bits/ 64 <456000000>;
     56			};
     57		};
     58	};
     59};
     60
     61&mipi_csi {
     62	status = "okay";
     63
     64	ports {
     65		#address-cells = <1>;
     66		#size-cells = <0>;
     67
     68		port@0 {
     69			reg = <0>;
     70
     71			imx8mm_mipi_csi_in: endpoint {
     72				remote-endpoint = <&imx219_to_mipi_csi2>;
     73				data-lanes = <1 2>;
     74			};
     75		};
     76
     77		port@1 {
     78			reg = <1>;
     79
     80			imx8mm_mipi_csi_out: endpoint {
     81				remote-endpoint = <&csi_in>;
     82			};
     83		};
     84	};
     85};
     86
     87&iomuxc {
     88	pinctrl_reg_cam: regcamgrp {
     89		fsl,pins = <
     90			MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x41
     91		>;
     92	};
     93};