cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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imx8mq-librem5-devkit.dts (23827B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright 2018-2019 Purism SPC
      4 */
      5
      6/dts-v1/;
      7
      8#include "dt-bindings/input/input.h"
      9#include <dt-bindings/interrupt-controller/irq.h>
     10#include "dt-bindings/pwm/pwm.h"
     11#include "dt-bindings/usb/pd.h"
     12#include "imx8mq.dtsi"
     13
     14/ {
     15	model = "Purism Librem 5 devkit";
     16	compatible = "purism,librem5-devkit", "fsl,imx8mq";
     17
     18	backlight_dsi: backlight-dsi {
     19		compatible = "pwm-backlight";
     20		/* 200 Hz for the PAM2841 */
     21		pwms = <&pwm1 0 5000000 0>;
     22		brightness-levels = <0 100>;
     23		num-interpolated-steps = <100>;
     24		/* Default brightness level (index into the array defined by */
     25		/* the "brightness-levels" property) */
     26		default-brightness-level = <0>;
     27		power-supply = <&reg_22v4_p>;
     28	};
     29
     30	chosen {
     31		stdout-path = &uart1;
     32	};
     33
     34	gpio-keys {
     35		compatible = "gpio-keys";
     36		pinctrl-names = "default";
     37		pinctrl-0 = <&pinctrl_gpio_keys>;
     38
     39		btn1 {
     40			label = "VOL_UP";
     41			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
     42			wakeup-source;
     43			linux,code = <KEY_VOLUMEUP>;
     44		};
     45
     46		btn2 {
     47			label = "VOL_DOWN";
     48			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
     49			wakeup-source;
     50			linux,code = <KEY_VOLUMEDOWN>;
     51		};
     52
     53		wwan-wake {
     54			label = "WWAN_WAKE";
     55			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
     56			interrupt-parent = <&gpio3>;
     57			interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
     58			wakeup-source;
     59			linux,code = <KEY_PHONE>;
     60		};
     61	};
     62
     63	leds {
     64		compatible = "gpio-leds";
     65		pinctrl-names = "default";
     66		pinctrl-0 = <&pinctrl_gpio_leds>;
     67
     68		led1 {
     69			label = "LED 1";
     70			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
     71			default-state = "off";
     72		};
     73	};
     74
     75	pmic_osc: clock-pmic {
     76		compatible = "fixed-clock";
     77		#clock-cells = <0>;
     78		clock-frequency = <32768>;
     79		clock-output-names = "pmic_osc";
     80	};
     81
     82	reg_1v8_p: regulator-1v8-p {
     83		compatible = "regulator-fixed";
     84		regulator-name = "1v8_p";
     85		regulator-min-microvolt = <1800000>;
     86		regulator-max-microvolt = <1800000>;
     87		vin-supply = <&reg_pwr_en>;
     88	};
     89
     90	reg_2v8_p: regulator-2v8-p {
     91		compatible = "regulator-fixed";
     92		regulator-name = "2v8_p";
     93		regulator-min-microvolt = <2800000>;
     94		regulator-max-microvolt = <2800000>;
     95		vin-supply = <&reg_pwr_en>;
     96	};
     97
     98	reg_3v3_p: regulator-3v3-p {
     99		compatible = "regulator-fixed";
    100		regulator-name = "3v3_p";
    101		regulator-min-microvolt = <3300000>;
    102		regulator-max-microvolt = <3300000>;
    103		vin-supply = <&reg_pwr_en>;
    104
    105		regulator-state-mem {
    106			regulator-on-in-suspend;
    107		};
    108	};
    109
    110	reg_5v_p: regulator-5v-p {
    111		compatible = "regulator-fixed";
    112		regulator-name = "5v_p";
    113		regulator-min-microvolt = <5000000>;
    114		regulator-max-microvolt = <5000000>;
    115		vin-supply = <&reg_pwr_en>;
    116
    117		regulator-state-mem {
    118			regulator-on-in-suspend;
    119		};
    120	};
    121
    122	reg_22v4_p: regulator-22v4-p  {
    123		compatible = "regulator-fixed";
    124		regulator-name = "22v4_P";
    125		regulator-min-microvolt = <22400000>;
    126		regulator-max-microvolt = <22400000>;
    127		vin-supply = <&reg_pwr_en>;
    128	};
    129
    130	reg_pwr_en: regulator-pwr-en {
    131		compatible = "regulator-fixed";
    132		pinctrl-names = "default";
    133		pinctrl-0 = <&pinctrl_pwr_en>;
    134		regulator-name = "PWR_EN";
    135		regulator-min-microvolt = <3300000>;
    136		regulator-max-microvolt = <3300000>;
    137		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
    138		enable-active-high;
    139		regulator-always-on;
    140	};
    141
    142	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
    143		compatible = "regulator-fixed";
    144		pinctrl-names = "default";
    145		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
    146		regulator-name = "VSD_3V3";
    147		regulator-min-microvolt = <3300000>;
    148		regulator-max-microvolt = <3300000>;
    149		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
    150		enable-active-high;
    151		regulator-always-on;
    152	};
    153
    154	wwan_codec: sound-wwan-codec {
    155		compatible = "option,gtm601";
    156		#sound-dai-cells = <0>;
    157	};
    158
    159	mic_mux: mic-mux {
    160		compatible = "simple-audio-mux";
    161		pinctrl-names = "default";
    162		pinctrl-0 = <&pinctrl_micsel>;
    163		mux-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
    164		sound-name-prefix = "Mic Mux";
    165	};
    166
    167	sound {
    168		compatible = "simple-audio-card";
    169		pinctrl-names = "default";
    170		pinctrl-0 = <&pinctrl_hpdet>;
    171		simple-audio-card,aux-devs = <&speaker_amp>, <&mic_mux>;
    172		simple-audio-card,name = "Librem 5 Devkit";
    173		simple-audio-card,format = "i2s";
    174		simple-audio-card,widgets =
    175			"Microphone", "Builtin Microphone",
    176			"Microphone", "Headset Microphone",
    177			"Headphone", "Headphones",
    178			"Speaker", "Builtin Speaker";
    179		simple-audio-card,routing =
    180			"MIC_IN", "Mic Mux OUT",
    181			"Mic Mux IN1", "Headset Microphone",
    182			"Mic Mux IN2", "Builtin Microphone",
    183			"Mic Mux OUT", "Mic Bias",
    184			"Headphones", "HP_OUT",
    185			"Builtin Speaker", "Speaker Amp OUTR",
    186			"Speaker Amp INR", "LINE_OUT";
    187		simple-audio-card,hp-det-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
    188
    189		simple-audio-card,cpu {
    190			sound-dai = <&sai2>;
    191		};
    192
    193		simple-audio-card,codec {
    194			sound-dai = <&sgtl5000>;
    195			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
    196			frame-master;
    197			bitclock-master;
    198		};
    199	};
    200
    201	sound-wwan {
    202		compatible = "simple-audio-card";
    203		simple-audio-card,name = "SIMCom SIM7100";
    204		simple-audio-card,format = "dsp_a";
    205
    206		simple-audio-card,cpu {
    207			sound-dai = <&sai6>;
    208		};
    209
    210		telephony_link_master: simple-audio-card,codec {
    211			sound-dai = <&wwan_codec>;
    212			frame-master;
    213			bitclock-master;
    214		};
    215	};
    216
    217	speaker_amp: speaker-amp {
    218		compatible = "simple-audio-amplifier";
    219		pinctrl-names = "default";
    220		pinctrl-0 = <&pinctrl_spkamp>;
    221		VCC-supply = <&reg_3v3_p>;
    222		sound-name-prefix = "Speaker Amp";
    223		enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
    224	};
    225
    226	vibrator {
    227		compatible = "gpio-vibrator";
    228		pinctrl-names = "default";
    229		pinctrl-0 = <&pinctrl_haptic>;
    230	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
    231		vcc-supply = <&reg_3v3_p>;
    232	};
    233
    234	wifi_pwr_en: regulator-wifi-en {
    235		compatible = "regulator-fixed";
    236		pinctrl-names = "default";
    237		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
    238		regulator-name = "WIFI_EN";
    239		regulator-min-microvolt = <3300000>;
    240		regulator-max-microvolt = <3300000>;
    241		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
    242		enable-active-high;
    243		regulator-always-on;
    244	};
    245};
    246
    247&A53_0 {
    248	cpu-supply = <&buck2_reg>;
    249};
    250
    251&A53_1 {
    252	cpu-supply = <&buck2_reg>;
    253};
    254
    255&A53_2 {
    256	cpu-supply = <&buck2_reg>;
    257};
    258
    259&A53_3 {
    260	cpu-supply = <&buck2_reg>;
    261};
    262
    263&dphy {
    264	status = "okay";
    265};
    266
    267&fec1 {
    268	pinctrl-names = "default";
    269	pinctrl-0 = <&pinctrl_fec1>;
    270	phy-mode = "rgmii-id";
    271	phy-handle = <&ethphy0>;
    272	fsl,magic-packet;
    273	phy-supply = <&reg_3v3_p>;
    274	status = "okay";
    275
    276	mdio {
    277		#address-cells = <1>;
    278		#size-cells = <0>;
    279
    280		ethphy0: ethernet-phy@1 {
    281			compatible = "ethernet-phy-ieee802.3-c22";
    282			reg = <1>;
    283		};
    284	};
    285};
    286
    287&i2c1 {
    288	clock-frequency = <100000>;
    289	pinctrl-names = "default";
    290	pinctrl-0 = <&pinctrl_i2c1>;
    291	status = "okay";
    292
    293	pmic: pmic@4b {
    294		compatible = "rohm,bd71837";
    295		reg = <0x4b>;
    296		pinctrl-names = "default";
    297		pinctrl-0 = <&pinctrl_pmic>;
    298		clocks = <&pmic_osc>;
    299		clock-names = "osc";
    300		#clock-cells = <0>;
    301		clock-output-names = "pmic_clk";
    302		interrupt-parent = <&gpio1>;
    303		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
    304		rohm,reset-snvs-powered;
    305
    306		regulators {
    307			buck1_reg: BUCK1 {
    308				regulator-name = "buck1";
    309				regulator-min-microvolt = <700000>;
    310				regulator-max-microvolt = <1300000>;
    311				regulator-boot-on;
    312				regulator-always-on;
    313				regulator-ramp-delay = <1250>;
    314				rohm,dvs-run-voltage = <900000>;
    315				rohm,dvs-idle-voltage = <850000>;
    316				rohm,dvs-suspend-voltage = <800000>;
    317			};
    318
    319			buck2_reg: BUCK2 {
    320				regulator-name = "buck2";
    321				regulator-min-microvolt = <700000>;
    322				regulator-max-microvolt = <1300000>;
    323				regulator-boot-on;
    324				regulator-ramp-delay = <1250>;
    325				rohm,dvs-run-voltage = <1000000>;
    326				rohm,dvs-idle-voltage = <900000>;
    327			};
    328
    329			buck3_reg: BUCK3 {
    330				regulator-name = "buck3";
    331				regulator-min-microvolt = <700000>;
    332				regulator-max-microvolt = <1300000>;
    333				regulator-boot-on;
    334				rohm,dvs-run-voltage = <900000>;
    335			};
    336
    337			buck4_reg: BUCK4 {
    338				regulator-name = "buck4";
    339				regulator-min-microvolt = <700000>;
    340				regulator-max-microvolt = <1300000>;
    341				rohm,dvs-run-voltage = <1000000>;
    342			};
    343
    344			buck5_reg: BUCK5 {
    345				regulator-name = "buck5";
    346				regulator-min-microvolt = <700000>;
    347				regulator-max-microvolt = <1350000>;
    348				regulator-boot-on;
    349				regulator-always-on;
    350			};
    351
    352			buck6_reg: BUCK6 {
    353				regulator-name = "buck6";
    354				regulator-min-microvolt = <3000000>;
    355				regulator-max-microvolt = <3300000>;
    356				regulator-boot-on;
    357				regulator-always-on;
    358			};
    359
    360			buck7_reg: BUCK7 {
    361				regulator-name = "buck7";
    362				regulator-min-microvolt = <1605000>;
    363				regulator-max-microvolt = <1995000>;
    364				regulator-boot-on;
    365				regulator-always-on;
    366			};
    367
    368			buck8_reg: BUCK8 {
    369				regulator-name = "buck8";
    370				regulator-min-microvolt = <800000>;
    371				regulator-max-microvolt = <1400000>;
    372				regulator-boot-on;
    373				regulator-always-on;
    374			};
    375
    376			ldo1_reg: LDO1 {
    377				regulator-name = "ldo1";
    378				regulator-min-microvolt = <3000000>;
    379				regulator-max-microvolt = <3300000>;
    380				regulator-boot-on;
    381				/* leave on for snvs power button */
    382				regulator-always-on;
    383			};
    384
    385			ldo2_reg: LDO2 {
    386				regulator-name = "ldo2";
    387				regulator-min-microvolt = <900000>;
    388				regulator-max-microvolt = <900000>;
    389				regulator-boot-on;
    390				/* leave on for snvs power button */
    391				regulator-always-on;
    392			};
    393
    394			ldo3_reg: LDO3 {
    395				regulator-name = "ldo3";
    396				regulator-min-microvolt = <1800000>;
    397				regulator-max-microvolt = <3300000>;
    398				regulator-boot-on;
    399				regulator-always-on;
    400			};
    401
    402			ldo4_reg: LDO4 {
    403				regulator-name = "ldo4";
    404				regulator-min-microvolt = <900000>;
    405				regulator-max-microvolt = <1800000>;
    406				regulator-boot-on;
    407				regulator-always-on;
    408			};
    409
    410			ldo5_reg: LDO5 {
    411				regulator-name = "ldo5";
    412				regulator-min-microvolt = <1800000>;
    413				regulator-max-microvolt = <3300000>;
    414				regulator-always-on;
    415			};
    416
    417			ldo6_reg: LDO6 {
    418				regulator-name = "ldo6";
    419				regulator-min-microvolt = <900000>;
    420				regulator-max-microvolt = <1800000>;
    421				regulator-boot-on;
    422				regulator-always-on;
    423			};
    424
    425			ldo7_reg: LDO7 {
    426				regulator-name = "ldo7";
    427				regulator-min-microvolt = <1800000>;
    428				regulator-max-microvolt = <3300000>;
    429				regulator-boot-on;
    430				regulator-always-on;
    431			};
    432		};
    433	};
    434
    435	typec_ptn5100: usb-typec@52 {
    436		compatible = "nxp,ptn5110";
    437		reg = <0x52>;
    438		pinctrl-names = "default";
    439		pinctrl-0 = <&pinctrl_typec>;
    440		interrupt-parent = <&gpio3>;
    441		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
    442
    443		connector {
    444			compatible = "usb-c-connector";
    445			label = "USB-C";
    446			data-role = "dual";
    447			power-role = "dual";
    448			try-power-role = "sink";
    449			source-pdos = <PDO_FIXED(5000, 2000,
    450				PDO_FIXED_USB_COMM |
    451				PDO_FIXED_DUAL_ROLE |
    452				PDO_FIXED_DATA_SWAP )>;
    453			sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
    454				PDO_FIXED_DUAL_ROLE |
    455				PDO_FIXED_DATA_SWAP )
    456			     PDO_VAR(5000, 5000, 3500)>;
    457			op-sink-microwatt = <10000000>;
    458
    459			ports {
    460				#address-cells = <1>;
    461				#size-cells = <0>;
    462
    463				port@0 {
    464					reg = <0>;
    465
    466					usb_con_hs: endpoint {
    467						remote-endpoint = <&typec_hs>;
    468					};
    469				};
    470
    471				port@1 {
    472					reg = <1>;
    473
    474					usb_con_ss: endpoint {
    475						remote-endpoint = <&typec_ss>;
    476					};
    477				};
    478			};
    479		};
    480	};
    481
    482	rtc@68 {
    483		compatible = "microcrystal,rv4162";
    484		reg = <0x68>;
    485		pinctrl-names = "default";
    486		pinctrl-0 = <&pinctrl_rtc>;
    487		interrupt-parent = <&gpio4>;
    488		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
    489	};
    490
    491	charger@6b { /* bq25896 */
    492		compatible = "ti,bq25890";
    493		reg = <0x6b>;
    494		pinctrl-names = "default";
    495		pinctrl-0 = <&pinctrl_charger>;
    496		interrupt-parent = <&gpio3>;
    497		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
    498		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
    499		ti,charge-current = <1600000>; /* 1.6A */
    500		ti,termination-current = <66000>;  /* 66mA */
    501		ti,precharge-current = <130000>; /* 130mA */
    502		ti,minimum-sys-voltage = <3000000>; /* 3V */
    503		ti,boost-voltage = <5000000>; /* 5V */
    504		ti,boost-max-current = <50000>; /* 50mA */
    505	};
    506};
    507
    508&i2c3 {
    509	clock-frequency = <100000>;
    510	pinctrl-names = "default";
    511	pinctrl-0 = <&pinctrl_i2c3>;
    512	status = "okay";
    513
    514	magnetometer@1e	{
    515		compatible = "st,lsm9ds1-magn";
    516		reg = <0x1e>;
    517		pinctrl-names = "default";
    518		pinctrl-0 = <&pinctrl_imu>;
    519		interrupt-parent = <&gpio3>;
    520		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
    521		vdd-supply = <&reg_3v3_p>;
    522		vddio-supply = <&reg_3v3_p>;
    523	};
    524
    525	sgtl5000: audio-codec@a {
    526		compatible = "fsl,sgtl5000";
    527		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
    528		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
    529		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
    530		assigned-clock-rates = <24576000>;
    531		#sound-dai-cells = <0>;
    532		reg = <0x0a>;
    533		VDDD-supply = <&reg_1v8_p>;
    534		VDDIO-supply = <&reg_3v3_p>;
    535		VDDA-supply = <&reg_3v3_p>;
    536	};
    537
    538	touchscreen@5d {
    539		compatible = "goodix,gt5688";
    540		reg = <0x5d>;
    541		pinctrl-names = "default";
    542		pinctrl-0 = <&pinctrl_ts>;
    543		interrupt-parent = <&gpio3>;
    544		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    545		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
    546		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
    547		touchscreen-size-x = <720>;
    548		touchscreen-size-y = <1440>;
    549		AVDD28-supply = <&reg_2v8_p>;
    550		VDDIO-supply = <&reg_1v8_p>;
    551	};
    552
    553	proximity-sensor@60 {
    554		compatible = "vishay,vcnl4040";
    555		reg = <0x60>;
    556		pinctrl-0 = <&pinctrl_prox>;
    557	};
    558
    559	accel-gyro@6a {
    560		compatible = "st,lsm9ds1-imu";
    561		reg = <0x6a>;
    562		vdd-supply = <&reg_3v3_p>;
    563		vddio-supply = <&reg_3v3_p>;
    564		mount-matrix =  "1",  "0",  "0",
    565				"0",  "1",  "0",
    566				"0",  "0", "-1";
    567	};
    568};
    569
    570&iomuxc {
    571	pinctrl_bl: blgrp {
    572		fsl,pins = <
    573			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
    574		>;
    575	};
    576
    577	pinctrl_bt: btgrp {
    578		fsl,pins = <
    579			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
    580			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
    581		>;
    582	};
    583
    584	pinctrl_charger: chargergrp {
    585		fsl,pins = <
    586			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
    587		>;
    588	};
    589
    590	pinctrl_fec1: fec1grp {
    591		fsl,pins = <
    592			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
    593			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
    594			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
    595			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
    596			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
    597			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
    598			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
    599			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
    600			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
    601			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
    602			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
    603			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
    604			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
    605			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
    606			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
    607			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
    608		>;
    609	};
    610
    611	pinctrl_ts: tsgrp {
    612		fsl,pins = <
    613			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
    614			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
    615		>;
    616	};
    617
    618	pinctrl_gpio_leds: gpioledgrp {
    619		fsl,pins = <
    620			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
    621		>;
    622	};
    623
    624	pinctrl_gpio_keys: gpiokeygrp {
    625		fsl,pins = <
    626			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
    627			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
    628			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80   /* nWoWWAN */
    629		>;
    630	};
    631
    632	pinctrl_haptic: hapticgrp {
    633		fsl,pins = <
    634			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
    635		>;
    636	};
    637
    638	pinctrl_hpdet: hpdetgrp {
    639		fsl,pins = <
    640			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0xC0   /* HP_DET */
    641		>;
    642	};
    643
    644	pinctrl_i2c1: i2c1grp {
    645		fsl,pins = <
    646			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
    647			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
    648		>;
    649	};
    650
    651	pinctrl_i2c3: i2c3grp {
    652		fsl,pins = <
    653			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
    654			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
    655		>;
    656	};
    657
    658	pinctrl_imu: imugrp {
    659		fsl,pins = <
    660			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
    661		>;
    662	};
    663
    664	pinctrl_micsel: micselgrp {
    665		fsl,pins = <
    666			MX8MQ_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0xc6  /* MIC_SEL */
    667		>;
    668	};
    669
    670	pinctrl_spkamp: spkamp {
    671		fsl,pins = <
    672			MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3		0x81  /* MUTE */
    673		>;
    674	};
    675
    676	pinctrl_pmic: pmicgrp {
    677		fsl,pins = <
    678			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
    679		>;
    680	};
    681
    682	pinctrl_prox: proxgrp {
    683		fsl,pins = <
    684			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80  /* prox intr */
    685		>;
    686	};
    687
    688	pinctrl_pwr_en: pwrengrp {
    689		fsl,pins = <
    690			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
    691		>;
    692	};
    693
    694	pinctrl_rtc: rtcgrp {
    695		fsl,pins = <
    696			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
    697		>;
    698	};
    699
    700	pinctrl_sai2: sai2grp {
    701		fsl,pins = <
    702			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
    703			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
    704			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
    705			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
    706			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
    707		>;
    708	};
    709
    710	pinctrl_sai6: sai6grp {
    711		fsl,pins = <
    712			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
    713			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
    714			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
    715			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
    716		>;
    717	};
    718
    719	pinctrl_typec: typecgrp {
    720		fsl,pins = <
    721			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
    722			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
    723		>;
    724	};
    725
    726	pinctrl_uart1: uart1grp {
    727		fsl,pins = <
    728			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
    729			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
    730		>;
    731	};
    732
    733	pinctrl_uart2: uart2grp {
    734		fsl,pins = <
    735			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
    736			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
    737			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
    738			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
    739		>;
    740	};
    741
    742	pinctrl_uart3: uart3grp {
    743		fsl,pins = <
    744			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
    745			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
    746		>;
    747	};
    748
    749	pinctrl_uart4: uart4grp {
    750		fsl,pins = <
    751			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
    752			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
    753			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
    754			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
    755			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
    756		>;
    757	};
    758
    759	pinctrl_usdhc1: usdhc1grp {
    760		fsl,pins = <
    761			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
    762			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
    763			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
    764			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
    765			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
    766			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
    767			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
    768			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
    769			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
    770			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
    771			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
    772			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
    773		>;
    774	};
    775
    776	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
    777		fsl,pins = <
    778			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
    779			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
    780			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
    781			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
    782			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
    783			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
    784			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
    785			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
    786			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
    787			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
    788			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
    789			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
    790		>;
    791	};
    792
    793	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
    794		fsl,pins = <
    795			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
    796			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
    797			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
    798			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
    799			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
    800			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
    801			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
    802			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
    803			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
    804			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
    805			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
    806			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
    807		>;
    808	};
    809
    810	pinctrl_usdhc2_pwr: usdhc2pwrgrp {
    811		fsl,pins = <
    812			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
    813		>;
    814	};
    815
    816	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
    817		fsl,pins = <
    818			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
    819		>;
    820	};
    821
    822	pinctrl_usdhc2: usdhc2grp {
    823		fsl,pins = <
    824			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
    825			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
    826			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
    827			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
    828			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
    829			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
    830		>;
    831	};
    832
    833	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
    834		fsl,pins = <
    835			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
    836			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
    837			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
    838			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
    839			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
    840			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
    841		>;
    842	};
    843
    844	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
    845		fsl,pins = <
    846			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
    847			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
    848			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
    849			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
    850			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
    851			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
    852		>;
    853	};
    854
    855	pinctrl_wdog: wdoggrp {
    856		fsl,pins = <
    857			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
    858		>;
    859	};
    860
    861	pinctrl_wifi_pwr_en: wifipwrengrp {
    862		fsl,pins = <
    863			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
    864		>;
    865	};
    866
    867	pinctrl_wwan: wwangrp {
    868		fsl,pins = <
    869			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
    870			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
    871			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
    872		>;
    873	};
    874};
    875
    876&lcdif {
    877	status = "okay";
    878};
    879
    880&mipi_dsi {
    881	status = "okay";
    882	#address-cells = <1>;
    883	#size-cells = <0>;
    884
    885	panel@0 {
    886		compatible = "rocktech,jh057n00900";
    887		reg = <0>;
    888		backlight = <&backlight_dsi>;
    889		reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
    890		iovcc-supply = <&reg_1v8_p>;
    891		vcc-supply = <&reg_2v8_p>;
    892		port {
    893			panel_in: endpoint {
    894				remote-endpoint = <&mipi_dsi_out>;
    895			};
    896		};
    897	};
    898
    899	ports {
    900		port@1 {
    901			reg = <1>;
    902			mipi_dsi_out: endpoint {
    903				remote-endpoint = <&panel_in>;
    904			};
    905		};
    906	};
    907};
    908
    909&pgc_gpu {
    910	power-supply = <&buck3_reg>;
    911};
    912
    913&pgc_vpu {
    914	power-supply = <&buck4_reg>;
    915};
    916
    917&pwm1 {
    918	pinctrl-names = "default";
    919	pinctrl-0 = <&pinctrl_bl>;
    920	status = "okay";
    921};
    922
    923&snvs_pwrkey {
    924	status = "okay";
    925};
    926
    927&snvs_rtc {
    928	status = "disabled";
    929};
    930
    931&sai2 {
    932	pinctrl-names = "default";
    933	pinctrl-0 = <&pinctrl_sai2>;
    934	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
    935	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
    936	assigned-clock-rates = <24576000>;
    937	status = "okay";
    938};
    939
    940&sai6 {
    941	pinctrl-names = "default";
    942	pinctrl-0 = <&pinctrl_sai6>;
    943	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
    944	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
    945	assigned-clock-rates = <24576000>;
    946	fsl,sai-synchronous-rx;
    947	status = "okay";
    948};
    949
    950&uart1 { /* console */
    951	pinctrl-names = "default";
    952	pinctrl-0 = <&pinctrl_uart1>;
    953	status = "okay";
    954};
    955
    956&uart3 { /* GNSS */
    957	pinctrl-names = "default";
    958	pinctrl-0 = <&pinctrl_uart3>;
    959	status = "okay";
    960};
    961
    962&uart4 { /* BT */
    963	pinctrl-names = "default";
    964	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
    965	uart-has-rtscts;
    966	status = "okay";
    967};
    968
    969&usb3_phy0 {
    970	vbus-supply = <&reg_5v_p>;
    971	status = "okay";
    972};
    973
    974&usb3_phy1 {
    975	vbus-supply = <&reg_5v_p>;
    976	status = "okay";
    977};
    978
    979&usb_dwc3_0 {
    980	#address-cells = <1>;
    981	#size-cells = <0>;
    982	dr_mode = "otg";
    983	status = "okay";
    984
    985	port@0 {
    986		reg = <0>;
    987
    988		typec_hs: endpoint {
    989			remote-endpoint = <&usb_con_hs>;
    990		};
    991	};
    992
    993	port@1 {
    994		reg = <1>;
    995
    996		typec_ss: endpoint {
    997			remote-endpoint = <&usb_con_ss>;
    998		};
    999	};
   1000};
   1001
   1002&usb_dwc3_1 {
   1003	dr_mode = "host";
   1004	status = "okay";
   1005};
   1006
   1007&usdhc1 {
   1008	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
   1009	assigned-clock-rates = <400000000>;
   1010	pinctrl-names = "default", "state_100mhz", "state_200mhz";
   1011	pinctrl-0 = <&pinctrl_usdhc1>;
   1012	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
   1013	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
   1014	bus-width = <8>;
   1015	non-removable;
   1016	status = "okay";
   1017};
   1018
   1019&usdhc2 {
   1020	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
   1021	assigned-clock-rates = <200000000>;
   1022	pinctrl-names = "default", "state_100mhz", "state_200mhz";
   1023	pinctrl-0 = <&pinctrl_usdhc2>;
   1024	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
   1025	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
   1026	bus-width = <4>;
   1027	vmmc-supply = <&reg_usdhc2_vmmc>;
   1028	power-supply = <&wifi_pwr_en>;
   1029	broken-cd;
   1030	disable-wp;
   1031	cap-sdio-irq;
   1032	keep-power-in-suspend;
   1033	wakeup-source;
   1034	status = "okay";
   1035};
   1036
   1037&wdog1 {
   1038	pinctrl-names = "default";
   1039	pinctrl-0 = <&pinctrl_wdog>;
   1040	fsl,ext-reset-output;
   1041	status = "okay";
   1042};