cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

mba8mx.dtsi (6009B)


      1// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
      2/*
      3 * Copyright 2020-2021 TQ-Systems GmbH
      4 */
      5
      6#include <dt-bindings/net/ti-dp83867.h>
      7
      8/* TQ-Systems GmbH MBa8Mx baseboard */
      9
     10/ {
     11	beeper {
     12		compatible = "pwm-beeper";
     13		pwms = <&pwm4 0 250000 0>;
     14		beeper-hz = <4000>;
     15		amp-supply = <&reg_vcc_3v3>;
     16	};
     17
     18	chosen {
     19		// bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
     20		stdout-path = &uart3;
     21	};
     22
     23	gpio-keys {
     24		compatible = "gpio-keys";
     25		pinctrl-names = "default";
     26		pinctrl-0 = <&pinctrl_gpiobutton>;
     27		autorepeat;
     28
     29		switch1 {
     30			label = "switch1";
     31			linux,code = <BTN_0>;
     32			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
     33			wakeup-source;
     34		};
     35
     36		btn2: switch2 {
     37			label = "switch2";
     38			linux,code = <BTN_1>;
     39			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
     40			wakeup-source;
     41		};
     42
     43		switch3 {
     44			label = "switch3";
     45			linux,code = <BTN_2>;
     46			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
     47			wakeup-source;
     48		};
     49	};
     50
     51	gpio_leds: gpio-leds {
     52		compatible = "gpio-leds";
     53		pinctrl-names = "default";
     54		pinctrl-0 = <&pinctrl_gpioled>;
     55
     56		led1 {
     57			label = "led1";
     58			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
     59			linux,default-trigger = "default-on";
     60		};
     61
     62		led2: led2 {
     63			label = "led2";
     64			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
     65			linux,default-trigger = "heartbeat";
     66		};
     67	};
     68
     69	pcie0_refclk: pcie0-refclk {
     70		compatible = "fixed-clock";
     71		#clock-cells = <0>;
     72		clock-frequency = <100000000>;
     73	};
     74
     75	reg_hub_vbus: regulator-hub-vbus {
     76		compatible = "regulator-fixed";
     77		regulator-name = "MBA8MX_HUB_VBUS";
     78		regulator-min-microvolt = <5000000>;
     79		regulator-max-microvolt = <5000000>;
     80	};
     81
     82	reg_sn65dsi83_1v8: regulator-sn65dsi83-1v8 {
     83		compatible = "regulator-fixed";
     84		regulator-name = "SN65DSI83_1V8";
     85		regulator-min-microvolt = <1800000>;
     86		regulator-max-microvolt = <1800000>;
     87		gpio = <&expander0 5 GPIO_ACTIVE_HIGH>;
     88		enable-active-high;
     89	};
     90
     91	reg_vcc_3v3: regulator-3v3 {
     92		compatible = "regulator-fixed";
     93		regulator-name = "MBA8MX_3V3";
     94		regulator-min-microvolt = <3300000>;
     95		regulator-max-microvolt = <3300000>;
     96	};
     97
     98	sound {
     99		compatible = "fsl,imx-audio-tlv320aic32x4";
    100		model = "imx-audio-tlv320aic32x4";
    101		ssi-controller = <&sai3>;
    102		audio-codec = <&tlv320aic3x04>;
    103	};
    104};
    105
    106&ecspi1 {
    107	pinctrl-names = "default";
    108	pinctrl-0 = <&pinctrl_ecspi1>;
    109	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
    110	status = "okay";
    111};
    112
    113&ecspi2 {
    114	pinctrl-names = "default";
    115	pinctrl-0 = <&pinctrl_ecspi2>;
    116	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
    117	status = "okay";
    118};
    119
    120&fec1 {
    121	pinctrl-names = "default";
    122	pinctrl-0 = <&pinctrl_fec1>;
    123	phy-mode = "rgmii-id";
    124	phy-handle = <&ethphy0>;
    125	phy-supply = <&reg_vcc_3v3>;
    126	fsl,magic-packet;
    127	mac-address = [ 00 00 00 00 00 00 ];
    128	status = "okay";
    129
    130	mdio {
    131		#address-cells = <1>;
    132		#size-cells = <0>;
    133
    134		ethphy0: ethernet-phy@e {
    135			compatible = "ethernet-phy-ieee802.3-c22";
    136			reg = <0xe>;
    137			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
    138			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
    139			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    140			ti,dp83867-rxctrl-strap-quirk;
    141			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
    142			enet-phy-lane-no-swap;
    143			reset-gpios = <&expander2 7 GPIO_ACTIVE_LOW>;
    144			reset-assert-us = <500000>;
    145			reset-deassert-us = <500>;
    146		};
    147	};
    148};
    149
    150&i2c1 {
    151	expander0: gpio@23 {
    152		compatible = "nxp,pca9555";
    153		reg = <0x23>;
    154		gpio-controller;
    155		#gpio-cells = <2>;
    156		vcc-supply = <&reg_vcc_3v3>;
    157		interrupt-parent = <&gpio1>;
    158		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
    159		interrupt-controller;
    160		#interrupt-cells = <2>;
    161
    162		sd-mux-oe-hog {
    163			gpio-hog;
    164			gpios = <8 0>;
    165			output-low;
    166			line-name = "SD_MUX_EN#";
    167		};
    168
    169		boot-cfg-oe-hog {
    170			gpio-hog;
    171			gpios = <12 0>;
    172			output-high;
    173			line-name = "BOOT_CFG_OE#";
    174		};
    175
    176		rst-usb-hub-hog {
    177			gpio-hog;
    178			gpios = <13 0>;
    179			output-high;
    180			line-name = "RST_USB_HUB#";
    181		};
    182	};
    183
    184	expander1: gpio@24 {
    185		compatible = "nxp,pca9555";
    186		reg = <0x24>;
    187		gpio-controller;
    188		#gpio-cells = <2>;
    189		vcc-supply = <&reg_vcc_3v3>;
    190	};
    191};
    192
    193&i2c2 {
    194	clock-frequency = <100000>;
    195	pinctrl-names = "default", "gpio";
    196	pinctrl-0 = <&pinctrl_i2c2>;
    197	pinctrl-1 = <&pinctrl_i2c2_gpio>;
    198	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    199	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    200	status = "okay";
    201
    202	tlv320aic3x04: audio-codec@18 {
    203		compatible = "ti,tlv320aic32x4";
    204		reg = <0x18>;
    205		reset-gpios = <&expander2 0 GPIO_ACTIVE_LOW>;
    206		iov-supply = <&reg_vcc_3v3>;
    207		ldoin-supply = <&reg_vcc_3v3>;
    208	};
    209
    210	sensor1: sensor@1f {
    211		compatible = "nxp,se97", "jedec,jc-42.4-temp";
    212		reg = <0x1f>;
    213	};
    214
    215	eeprom3: eeprom@57 {
    216		compatible = "nxp,se97b", "atmel,24c02";
    217		reg = <0x57>;
    218		pagesize = <16>;
    219	};
    220};
    221
    222&i2c3 {
    223	clock-frequency = <100000>;
    224	pinctrl-names = "default", "gpio";
    225	pinctrl-0 = <&pinctrl_i2c3>;
    226	pinctrl-1 = <&pinctrl_i2c3_gpio>;
    227	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    228	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    229	status = "okay";
    230};
    231
    232&pwm3 {
    233	pinctrl-names = "default";
    234	pinctrl-0 = <&pinctrl_pwm3>;
    235	status = "okay";
    236};
    237
    238&pwm4 {
    239	pinctrl-names = "default";
    240	pinctrl-0 = <&pinctrl_pwm4>;
    241	status = "okay";
    242};
    243
    244&sai3 {
    245	pinctrl-names = "default";
    246	pinctrl-0 = <&pinctrl_sai3>;
    247	#sound-dai-cells = <0>;
    248	assigned-clock-rates = <49152000>;
    249	status = "okay";
    250};
    251
    252&snvs_pwrkey {
    253	status = "okay";
    254};
    255
    256&uart1 {
    257	pinctrl-names = "default";
    258	pinctrl-0 = <&pinctrl_uart1>;
    259	status = "okay";
    260};
    261
    262&uart2 {
    263	pinctrl-names = "default";
    264	pinctrl-0 = <&pinctrl_uart2>;
    265	status = "okay";
    266};
    267
    268/* console */
    269&uart3 {
    270	pinctrl-names = "default";
    271	pinctrl-0 = <&pinctrl_uart3>;
    272	status = "okay";
    273};
    274
    275/* UART4 is assigned to Cortex-M4 */
    276&usdhc2 {
    277	pinctrl-names = "default", "state_100mhz", "state_200mhz";
    278	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
    279	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
    280	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
    281	bus-width = <4>;
    282	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
    283	disable-wp;
    284	no-mmc;
    285	no-sdio;
    286	vmmc-supply = <&reg_usdhc2_vmmc>;
    287	status = "okay";
    288};