cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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hi6220-hikey.dts (12313B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * dts file for Hisilicon HiKey Development Board
      4 *
      5 * Copyright (C) 2015, HiSilicon Ltd.
      6 *
      7 */
      8
      9/dts-v1/;
     10#include "hi6220.dtsi"
     11#include "hikey-pinctrl.dtsi"
     12#include <dt-bindings/gpio/gpio.h>
     13
     14/ {
     15	model = "HiKey Development Board";
     16	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
     17
     18	aliases {
     19		serial0 = &uart0; /* On board UART0 */
     20		serial1 = &uart1; /* BT UART */
     21		serial2 = &uart2; /* LS Expansion UART0 */
     22		serial3 = &uart3; /* LS Expansion UART1 */
     23	};
     24
     25	chosen {
     26		stdout-path = "serial3:115200n8";
     27	};
     28
     29	/*
     30	 * Reserve below regions from memory node:
     31	 *
     32	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
     33	 *  0x05f0,1000 - 0x05f0,1fff: Reboot reason
     34	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
     35	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
     36	 *  0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
     37	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
     38	 */
     39	memory@0 {
     40		device_type = "memory";
     41		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
     42		      <0x00000000 0x05f00000 0x00000000 0x00001000>,
     43		      <0x00000000 0x05f02000 0x00000000 0x00efd000>,
     44		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
     45		      <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
     46		      <0x00000000 0x22000000 0x00000000 0x1c000000>;
     47	};
     48
     49	reserved-memory {
     50		#address-cells = <2>;
     51		#size-cells = <2>;
     52		ranges;
     53
     54		ramoops@21f00000 {
     55			compatible = "ramoops";
     56			reg = <0x0 0x21f00000 0x0 0x00100000>;
     57			record-size	= <0x00020000>;
     58			console-size	= <0x00020000>;
     59			ftrace-size	= <0x00020000>;
     60		};
     61
     62		/* global autoconfigured region for contiguous allocations */
     63		linux,cma {
     64			compatible = "shared-dma-pool";
     65			reusable;
     66			size = <0x00000000 0x08000000>;
     67			linux,cma-default;
     68		};
     69	};
     70
     71	reboot-mode-syscon@5f01000 {
     72		compatible = "syscon", "simple-mfd";
     73		reg = <0x0 0x05f01000 0x0 0x00001000>;
     74
     75		reboot-mode {
     76			compatible = "syscon-reboot-mode";
     77			offset = <0x0>;
     78
     79			mode-normal	= <0x77665501>;
     80			mode-bootloader	= <0x77665500>;
     81			mode-recovery	= <0x77665502>;
     82		};
     83	};
     84
     85	reg_sys_5v: regulator@0 {
     86		compatible = "regulator-fixed";
     87		regulator-name = "SYS_5V";
     88		regulator-min-microvolt = <5000000>;
     89		regulator-max-microvolt = <5000000>;
     90		regulator-boot-on;
     91		regulator-always-on;
     92	};
     93
     94	reg_vdd_3v3: regulator@1 {
     95		compatible = "regulator-fixed";
     96		regulator-name = "VDD_3V3";
     97		regulator-min-microvolt = <3300000>;
     98		regulator-max-microvolt = <3300000>;
     99		regulator-boot-on;
    100		regulator-always-on;
    101		vin-supply = <&reg_sys_5v>;
    102	};
    103
    104	reg_5v_hub: regulator@2 {
    105		compatible = "regulator-fixed";
    106		regulator-name = "5V_HUB";
    107		regulator-min-microvolt = <5000000>;
    108		regulator-max-microvolt = <5000000>;
    109		regulator-boot-on;
    110		gpio = <&gpio0 7 0>;
    111		regulator-always-on;
    112		vin-supply = <&reg_sys_5v>;
    113	};
    114
    115	wl1835_pwrseq: wl1835-pwrseq {
    116		compatible = "mmc-pwrseq-simple";
    117		/* WLAN_EN GPIO */
    118		reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
    119		clocks = <&pmic>;
    120		clock-names = "ext_clock";
    121		post-power-on-delay-ms = <10>;
    122		power-off-delay-us = <10>;
    123	};
    124
    125	leds {
    126		compatible = "gpio-leds";
    127
    128		user_led1 {
    129			label = "green:user1";
    130			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
    131			linux,default-trigger = "heartbeat";
    132		};
    133
    134		user_led2 {
    135			label = "green:user2";
    136			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
    137			linux,default-trigger = "mmc0";
    138		};
    139
    140		user_led3 {
    141			label = "green:user3";
    142			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
    143			linux,default-trigger = "mmc1";
    144		};
    145
    146		user_led4 {
    147			label = "green:user4";
    148			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
    149			panic-indicator;
    150			linux,default-trigger = "none";
    151		};
    152
    153		wlan_active_led {
    154			label = "yellow:wlan";
    155			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
    156			linux,default-trigger = "phy0tx";
    157			default-state = "off";
    158		};
    159
    160		bt_active_led {
    161			label = "blue:bt";
    162			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
    163			linux,default-trigger = "hci0-power";
    164			default-state = "off";
    165		};
    166	};
    167
    168	pmic: pmic@f8000000 {
    169		compatible = "hisilicon,hi655x-pmic";
    170		reg = <0x0 0xf8000000 0x0 0x1000>;
    171		#clock-cells = <0>;
    172		interrupt-controller;
    173		#interrupt-cells = <2>;
    174		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
    175
    176		regulators {
    177			ldo2: LDO2 {
    178				regulator-name = "LDO2_2V8";
    179				regulator-min-microvolt = <2500000>;
    180				regulator-max-microvolt = <3200000>;
    181				regulator-enable-ramp-delay = <120>;
    182			};
    183
    184			ldo7: LDO7 {
    185				regulator-name = "LDO7_SDIO";
    186				regulator-min-microvolt = <1800000>;
    187				regulator-max-microvolt = <3300000>;
    188				regulator-enable-ramp-delay = <120>;
    189			};
    190
    191			ldo10: LDO10 {
    192				regulator-name = "LDO10_2V85";
    193				regulator-min-microvolt = <1800000>;
    194				regulator-max-microvolt = <3000000>;
    195				regulator-enable-ramp-delay = <360>;
    196			};
    197
    198			ldo13: LDO13 {
    199				regulator-name = "LDO13_1V8";
    200				regulator-min-microvolt = <1600000>;
    201				regulator-max-microvolt = <1950000>;
    202				regulator-enable-ramp-delay = <120>;
    203			};
    204
    205			ldo14: LDO14 {
    206				regulator-name = "LDO14_2V8";
    207				regulator-min-microvolt = <2500000>;
    208				regulator-max-microvolt = <3200000>;
    209				regulator-enable-ramp-delay = <120>;
    210			};
    211
    212			ldo15: LDO15 {
    213				regulator-name = "LDO15_1V8";
    214				regulator-min-microvolt = <1600000>;
    215				regulator-max-microvolt = <1950000>;
    216				regulator-boot-on;
    217				regulator-always-on;
    218				regulator-enable-ramp-delay = <120>;
    219			};
    220
    221			ldo17: LDO17 {
    222				regulator-name = "LDO17_2V5";
    223				regulator-min-microvolt = <2500000>;
    224				regulator-max-microvolt = <3200000>;
    225				regulator-enable-ramp-delay = <120>;
    226			};
    227
    228			ldo19: LDO19 {
    229				regulator-name = "LDO19_3V0";
    230				regulator-min-microvolt = <1800000>;
    231				regulator-max-microvolt = <3000000>;
    232				regulator-enable-ramp-delay = <360>;
    233			};
    234
    235			ldo21: LDO21 {
    236				regulator-name = "LDO21_1V8";
    237				regulator-min-microvolt = <1650000>;
    238				regulator-max-microvolt = <2000000>;
    239				regulator-always-on;
    240				regulator-enable-ramp-delay = <120>;
    241			};
    242
    243			ldo22: LDO22 {
    244				regulator-name = "LDO22_1V2";
    245				regulator-min-microvolt = <900000>;
    246				regulator-max-microvolt = <1200000>;
    247				regulator-boot-on;
    248				regulator-always-on;
    249				regulator-enable-ramp-delay = <120>;
    250			};
    251		};
    252	};
    253
    254	firmware {
    255		optee {
    256			compatible = "linaro,optee-tz";
    257			method = "smc";
    258		};
    259	};
    260
    261	sound_card {
    262		compatible = "audio-graph-card";
    263		dais = <&i2s0_port0>;
    264	};
    265};
    266
    267&uart1 {
    268	assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
    269	assigned-clock-rates = <150000000>;
    270	status = "okay";
    271
    272	bluetooth {
    273		compatible = "ti,wl1835-st";
    274		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
    275		clocks = <&pmic>;
    276		clock-names = "ext_clock";
    277	};
    278};
    279
    280&uart2 {
    281	status = "okay";
    282	label = "LS-UART0";
    283};
    284
    285&uart3 {
    286	status = "okay";
    287	label = "LS-UART1";
    288};
    289
    290&ade {
    291	status = "okay";
    292};
    293
    294&dsi {
    295	status = "okay";
    296
    297	ports {
    298		/* 1 for output port */
    299		port@1 {
    300			reg = <1>;
    301
    302			dsi_out0: endpoint@0 {
    303				remote-endpoint = <&adv7533_in>;
    304			};
    305		};
    306	};
    307};
    308
    309&dwmmc_0 {
    310	cap-mmc-highspeed;
    311	non-removable;
    312	bus-width = <0x8>;
    313	vmmc-supply = <&ldo19>;
    314};
    315
    316&dwmmc_1 {
    317	card-detect-delay = <200>;
    318	cap-sd-highspeed;
    319	sd-uhs-sdr12;
    320	sd-uhs-sdr25;
    321	sd-uhs-sdr50;
    322	vqmmc-supply = <&ldo7>;
    323	vmmc-supply = <&ldo10>;
    324	bus-width = <0x4>;
    325	disable-wp;
    326	cd-gpios = <&gpio1 0 1>;
    327};
    328
    329&dwmmc_2 {
    330	bus-width = <0x4>;
    331	non-removable;
    332	cap-power-off-card;
    333	vmmc-supply = <&reg_vdd_3v3>;
    334	mmc-pwrseq = <&wl1835_pwrseq>;
    335
    336	#address-cells = <0x1>;
    337	#size-cells = <0x0>;
    338	wlcore: wlcore@2 {
    339		compatible = "ti,wl1835";
    340		reg = <2>;	/* sdio func num */
    341		/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
    342		interrupt-parent = <&gpio1>;
    343		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
    344	};
    345};
    346
    347/*
    348 * Legend: proper name = the GPIO line is used as GPIO
    349 *         NC = not connected (not routed from the SoC)
    350 *         "[PER]" = pin is muxed for peripheral (not GPIO)
    351 *         "" = no idea, schematic doesn't say, could be
    352 *              unrouted (not connected to any external pin)
    353 *         LSEC = Low Speed External Connector
    354 *         HSEC = High Speed External Connector
    355 *
    356 * Pin assignments taken from LeMaker and CircuitCo Schematics
    357 * Rev A1.
    358 *
    359 * For the lines routed to the external connectors the
    360 * lines are named after the 96Boards CE Specification 1.0,
    361 * Appendix "Expansion Connector Signal Description".
    362 *
    363 * When the 96Board naming of a line and the schematic name of
    364 * the same line are in conflict, the 96Board specification
    365 * takes precedence, which means that the external UART on the
    366 * LSEC is named UART0 while the schematic and SoC names this
    367 * UART2. This is only for the informational lines i.e. "[FOO]",
    368 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
    369 * ones actually used for GPIO.
    370 */
    371&gpio0 {
    372	gpio-line-names = "PWR_HOLD", "DSI_SEL",
    373	"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
    374	"PWRON_DET", "5V_HUB_EN";
    375};
    376
    377&gpio1 {
    378	gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
    379	"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
    380};
    381
    382&gpio2 {
    383	gpio-line-names =
    384		"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
    385		"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
    386		"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
    387		"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
    388		"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
    389		"USB_ID_DET", "USB_VBUS_DET",
    390		"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
    391};
    392
    393&gpio3 {
    394	gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
    395	"WLAN_ACTIVE", "NC", "NC";
    396};
    397
    398&gpio4 {
    399	gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
    400	"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
    401};
    402
    403&gpio5 {
    404	gpio-line-names = "NC", "NC",
    405	"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
    406	"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
    407	"[AUX_SSI1]", "NC",
    408	"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
    409	"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
    410};
    411
    412&gpio6 {
    413	gpio-line-names =
    414	"[SPI0_DIN]", /* Pin 10: SPI0_DI */
    415	"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
    416	"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
    417	"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
    418	"NC", "NC", "NC",
    419	"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
    420};
    421
    422&gpio7 {
    423	gpio-line-names = "NC", "NC", "NC", "NC",
    424	"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
    425	"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
    426	"NC", "NC";
    427};
    428
    429&gpio8 {
    430	gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
    431	"", "", "", "", "", "";
    432};
    433
    434&gpio9 {
    435	gpio-line-names = "",
    436	"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
    437	"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
    438	"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
    439};
    440
    441&gpio10 {
    442	gpio-line-names = "BOOT_SEL",
    443	"[ISP_CCLK1]",
    444	"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
    445	"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
    446	"NC", "NC",
    447	"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
    448	"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
    449};
    450
    451&gpio11 {
    452	gpio-line-names =
    453	"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
    454	"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
    455	"", "NC", "NC", "NC", "", "";
    456};
    457
    458&gpio12 {
    459	gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
    460	"[BT_PCM_DO]",
    461	"NC", "NC", "NC", "NC",
    462	"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
    463};
    464
    465&gpio13 {
    466	gpio-line-names = "[UART0_RX]", "[UART0_TX]",
    467	"[BT_UART1_CTS]", "[BT_UART1_RTS]",
    468	"[BT_UART1_RX]", "[BT_UART1_TX]",
    469	"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
    470	"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
    471};
    472
    473&gpio14 {
    474	gpio-line-names =
    475	"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
    476	"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
    477	"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
    478	"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
    479	"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
    480	"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
    481	"[I2C2_SCL]", "[I2C2_SDA]";
    482};
    483
    484&gpio15 {
    485	gpio-line-names = "", "", "", "", "", "", "NC", "";
    486};
    487
    488/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
    489
    490
    491&i2c0 {
    492	status = "okay";
    493};
    494
    495&i2c1 {
    496	status = "okay";
    497};
    498
    499&i2c2 {
    500	#address-cells = <1>;
    501	#size-cells = <0>;
    502	status = "okay";
    503
    504	adv7533: adv7533@39 {
    505		compatible = "adi,adv7533";
    506		reg = <0x39>;
    507		interrupt-parent = <&gpio1>;
    508		interrupts = <1 2>;
    509		pd-gpios = <&gpio0 4 0>;
    510		adi,dsi-lanes = <4>;
    511		#sound-dai-cells = <0>;
    512
    513		ports {
    514			#address-cells = <1>;
    515			#size-cells = <0>;
    516			port@0 {
    517				adv7533_in: endpoint {
    518					remote-endpoint = <&dsi_out0>;
    519				};
    520			};
    521			port@2 {
    522				reg = <2>;
    523				codec_endpoint: endpoint {
    524					remote-endpoint = <&i2s0_cpu_endpoint>;
    525				};
    526			};
    527		};
    528	};
    529};
    530
    531&i2s0 {
    532
    533	ports {
    534		i2s0_port0: port@0 {
    535			i2s0_cpu_endpoint: endpoint {
    536				remote-endpoint = <&codec_endpoint>;
    537				dai-format = "i2s";
    538			};
    539		};
    540	};
    541};
    542
    543&spi0 {
    544	status = "okay";
    545};