cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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socfpga_agilex_n6000.dts (1106B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2021-2022, Intel Corporation
      4 */
      5#include "socfpga_agilex.dtsi"
      6
      7/ {
      8	model = "SoCFPGA Agilex n6000";
      9	compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex";
     10
     11	aliases {
     12		serial0 = &uart1;
     13		serial1 = &uart0;
     14		ethernet0 = &gmac0;
     15		ethernet1 = &gmac1;
     16		ethernet2 = &gmac2;
     17	};
     18
     19	chosen {
     20		stdout-path = "serial0:115200n8";
     21	};
     22
     23	memory@0 {
     24		device_type = "memory";
     25		/* We expect the bootloader to fill in the reg */
     26		reg = <0 0 0 0>;
     27	};
     28
     29	soc {
     30		bus@80000000 {
     31			compatible = "simple-bus";
     32			reg = <0x80000000 0x60000000>,
     33				<0xf9000000 0x00100000>;
     34			reg-names = "axi_h2f", "axi_h2f_lw";
     35			#address-cells = <2>;
     36			#size-cells = <1>;
     37			ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
     38
     39			dma-controller@0 {
     40				compatible = "intel,hps-copy-engine";
     41				reg = <0x00000000 0x00000000 0x00001000>;
     42				#dma-cells = <1>;
     43			};
     44		};
     45	};
     46};
     47
     48&osc1 {
     49	clock-frequency = <25000000>;
     50};
     51
     52&uart0 {
     53	status = "okay";
     54};
     55
     56&uart1 {
     57	status = "okay";
     58};
     59
     60&watchdog0 {
     61	status = "okay";
     62};
     63
     64&fpga_mgr {
     65	status = "disabled";
     66};