cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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socfpga_n5x_socdk.dts (2306B)

      1// SPDX-License-Identifier:     GPL-2.0
      2/*
      3 * Copyright (C) 2021, Intel Corporation
      4 */
      5#include "socfpga_agilex.dtsi"
      6
      7/ {
      8	model = "eASIC N5X SoCDK";
      9	compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
     10
     11	aliases {
     12		serial0 = &uart0;
     13		ethernet0 = &gmac0;
     14		ethernet1 = &gmac1;
     15		ethernet2 = &gmac2;
     16	};
     17
     18	chosen {
     19		stdout-path = "serial0:115200n8";
     20	};
     21
     22	memory {
     23		device_type = "memory";
     24		/* We expect the bootloader to fill in the reg */
     25		reg = <0 0 0 0>;
     26	};
     27
     28	soc {
     29		sdram_edac: memory-controller@f87f8000 {
     30			compatible = "snps,ddrc-3.80a";
     31			reg = <0xf87f8000 0x400>;
     32			interrupts = <0 175 4>;
     33			status = "okay";
     34		};
     35	};
     36};
     37
     38&clkmgr {
     39	compatible = "intel,easic-n5x-clkmgr";
     40};
     41
     42&gmac0 {
     43	status = "okay";
     44	phy-mode = "rgmii";
     45	phy-handle = <&phy0>;
     46
     47	max-frame-size = <9000>;
     48
     49	mdio0 {
     50		#address-cells = <1>;
     51		#size-cells = <0>;
     52		compatible = "snps,dwmac-mdio";
     53		phy0: ethernet-phy@0 {
     54			reg = <4>;
     55
     56			txd0-skew-ps = <0>; /* -420ps */
     57			txd1-skew-ps = <0>; /* -420ps */
     58			txd2-skew-ps = <0>; /* -420ps */
     59			txd3-skew-ps = <0>; /* -420ps */
     60			rxd0-skew-ps = <420>; /* 0ps */
     61			rxd1-skew-ps = <420>; /* 0ps */
     62			rxd2-skew-ps = <420>; /* 0ps */
     63			rxd3-skew-ps = <420>; /* 0ps */
     64			txen-skew-ps = <0>; /* -420ps */
     65			txc-skew-ps = <900>; /* 0ps */
     66			rxdv-skew-ps = <420>; /* 0ps */
     67			rxc-skew-ps = <1680>; /* 780ps */
     68		};
     69	};
     70};
     71
     72&mmc {
     73	status = "okay";
     74	cap-sd-highspeed;
     75	broken-cd;
     76	bus-width = <4>;
     77};
     78
     79&osc1 {
     80	clock-frequency = <25000000>;
     81};
     82
     83&qspi {
     84	status = "okay";
     85	flash@0 {
     86		#address-cells = <1>;
     87		#size-cells = <1>;
     88		compatible = "micron,mt25qu02g", "jedec,spi-nor";
     89		reg = <0>;
     90		spi-max-frequency = <100000000>;
     91
     92		m25p,fast-read;
     93		cdns,page-size = <256>;
     94		cdns,block-size = <16>;
     95		cdns,read-delay = <2>;
     96		cdns,tshsl-ns = <50>;
     97		cdns,tsd2d-ns = <50>;
     98		cdns,tchsh-ns = <4>;
     99		cdns,tslch-ns = <4>;
    100
    101		partitions {
    102			compatible = "fixed-partitions";
    103			#address-cells = <1>;
    104			#size-cells = <1>;
    105
    106			qspi_boot: partition@0 {
    107				label = "Boot and fpga data";
    108				reg = <0x0 0x03FE0000>;
    109			};
    110
    111			qspi_rootfs: partition@3FE0000 {
    112				label = "Root Filesystem - JFFS2";
    113				reg = <0x03FE0000 0x0C020000>;
    114			};
    115		};
    116	};
    117};
    118
    119&uart0 {
    120	status = "okay";
    121};
    122
    123&usb0 {
    124	status = "okay";
    125	disable-over-current;
    126};
    127
    128&watchdog0 {
    129	status = "okay";
    130};