cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-3720-uDPU.dts (3732B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device tree for the uDPU board.
      4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
      5 * Copyright (C) 2016 Marvell
      6 * Copyright (C) 2019 Methode Electronics
      7 * Copyright (C) 2019 Telus
      8 *
      9 * Vladimir Vid <vladimir.vid@sartura.hr>
     10 */
     11
     12/dts-v1/;
     13
     14#include <dt-bindings/gpio/gpio.h>
     15#include "armada-372x.dtsi"
     16
     17/ {
     18	model = "Methode uDPU Board";
     19	compatible = "methode,udpu", "marvell,armada3720";
     20
     21	chosen {
     22		stdout-path = "serial0:115200n8";
     23	};
     24
     25	memory@0 {
     26		device_type = "memory";
     27		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
     28	};
     29
     30	leds {
     31		pinctrl-names = "default";
     32		compatible = "gpio-leds";
     33
     34		power1 {
     35			label = "udpu:green:power";
     36			gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
     37		};
     38
     39		power2 {
     40			label = "udpu:red:power";
     41			gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
     42		};
     43
     44		network1 {
     45			label = "udpu:green:network";
     46			gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
     47		};
     48
     49		network2 {
     50			label = "udpu:red:network";
     51			gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
     52		};
     53
     54		alarm1 {
     55			label = "udpu:green:alarm";
     56			gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
     57		};
     58
     59		alarm2 {
     60			label = "udpu:red:alarm";
     61			gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
     62		};
     63	};
     64
     65	sfp_eth0: sfp-eth0 {
     66		compatible = "sff,sfp";
     67		i2c-bus = <&i2c0>;
     68		los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
     69		mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
     70		tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
     71		tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
     72		maximum-power-milliwatt = <3000>;
     73	};
     74
     75	sfp_eth1: sfp-eth1 {
     76		compatible = "sff,sfp";
     77		i2c-bus = <&i2c1>;
     78		los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
     79		mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
     80		tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
     81		tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
     82		maximum-power-milliwatt = <3000>;
     83	};
     84};
     85
     86&sdhci0 {
     87	status = "okay";
     88	bus-width = <8>;
     89	mmc-ddr-1_8v;
     90	mmc-hs400-1_8v;
     91	marvell,pad-type = "fixed-1-8v";
     92	non-removable;
     93	no-sd;
     94	no-sdio;
     95};
     96
     97&spi0 {
     98	status = "okay";
     99	pinctrl-names = "default";
    100	pinctrl-0 = <&spi_quad_pins>;
    101
    102	flash@0 {
    103		compatible = "jedec,spi-nor";
    104		reg = <0>;
    105		spi-max-frequency = <54000000>;
    106
    107		partitions {
    108			compatible = "fixed-partitions";
    109			#address-cells = <1>;
    110			#size-cells = <1>;
    111
    112			partition@0 {
    113				label = "firmware";
    114				reg = <0x0 0x180000>;
    115			};
    116
    117			partition@180000 {
    118				label = "u-boot-env";
    119				reg = <0x180000 0x10000>;
    120			};
    121		};
    122	};
    123};
    124
    125&pinctrl_nb {
    126	i2c1_recovery_pins: i2c1-recovery-pins {
    127		groups = "i2c1";
    128		function = "gpio";
    129	};
    130
    131	i2c2_recovery_pins: i2c2-recovery-pins {
    132		groups = "i2c2";
    133		function = "gpio";
    134	};
    135};
    136
    137&i2c0 {
    138	status = "okay";
    139	pinctrl-names = "default", "recovery";
    140	pinctrl-0 = <&i2c1_pins>;
    141	pinctrl-1 = <&i2c1_recovery_pins>;
    142	/delete-property/mrvl,i2c-fast-mode;
    143	scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    144	sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    145};
    146
    147&i2c1 {
    148	status = "okay";
    149	pinctrl-names = "default", "recovery";
    150	pinctrl-0 = <&i2c2_pins>;
    151	pinctrl-1 = <&i2c2_recovery_pins>;
    152	/delete-property/mrvl,i2c-fast-mode;
    153	scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    154	sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    155
    156	nct375@48 {
    157		status = "okay";
    158		compatible = "ti,tmp75c";
    159		reg = <0x48>;
    160	};
    161
    162	nct375@49 {
    163		status = "okay";
    164		compatible = "ti,tmp75c";
    165		reg = <0x49>;
    166	};
    167};
    168
    169&eth0 {
    170	phy-mode = "sgmii";
    171	status = "okay";
    172	managed = "in-band-status";
    173	phys = <&comphy1 0>;
    174	sfp = <&sfp_eth0>;
    175};
    176
    177&eth1 {
    178	phy-mode = "sgmii";
    179	status = "okay";
    180	managed = "in-band-status";
    181	phys = <&comphy0 1>;
    182	sfp = <&sfp_eth1>;
    183};
    184
    185&usb3 {
    186	status = "okay";
    187	phys = <&usb2_utmi_otg_phy>;
    188	phy-names = "usb2-utmi-otg-phy";
    189};
    190
    191&uart0 {
    192	status = "okay";
    193};