cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-8040-puzzle-m801.dts (10031B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (C) 2016 Marvell Technology Group Ltd.
      4 * Copyright (C) 2020 Sartura Ltd.
      5 *
      6 * Device Tree file for IEI Puzzle-M801
      7 */
      8
      9#include "armada-8040.dtsi"
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/leds/common.h>
     13
     14/ {
     15	model = "IEI-Puzzle-M801";
     16	compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";
     17
     18	aliases {
     19		ethernet0 = &cp0_eth0;
     20		ethernet1 = &cp1_eth0;
     21		ethernet2 = &cp0_eth1;
     22		ethernet3 = &cp0_eth2;
     23		ethernet4 = &cp1_eth1;
     24		ethernet5 = &cp1_eth2;
     25	};
     26
     27	chosen {
     28		stdout-path = "serial0:115200n8";
     29	};
     30
     31	memory@0 {
     32		device_type = "memory";
     33		reg = <0x0 0x0 0x0 0x80000000>;
     34	};
     35
     36	/* Regulator labels correspond with schematics */
     37	v_3_3: regulator-3-3v {
     38		compatible = "regulator-fixed";
     39		regulator-name = "v_3_3";
     40		regulator-min-microvolt = <3300000>;
     41		regulator-max-microvolt = <3300000>;
     42		regulator-always-on;
     43		status = "okay";
     44	};
     45
     46	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
     47		compatible = "regulator-fixed";
     48		enable-active-high;
     49		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
     50		pinctrl-names = "default";
     51		pinctrl-0 = <&cp0_xhci_vbus_pins>;
     52		regulator-name = "v_5v0_usb3_hst_vbus";
     53		regulator-min-microvolt = <5000000>;
     54		regulator-max-microvolt = <5000000>;
     55		status = "okay";
     56	};
     57
     58	v_vddo_h: regulator-1-8v {
     59		compatible = "regulator-fixed";
     60		regulator-name = "v_vddo_h";
     61		regulator-min-microvolt = <1800000>;
     62		regulator-max-microvolt = <1800000>;
     63		regulator-always-on;
     64		status = "okay";
     65	};
     66
     67	sfp_cp0_eth0: sfp-cp0-eth0 {
     68		compatible = "sff,sfp";
     69		i2c-bus = <&sfpplus0_i2c>;
     70		los-gpio = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>;
     71		mod-def0-gpio = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>;
     72		tx-disable-gpio = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>;
     73		tx-fault-gpio  = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>;
     74		maximum-power-milliwatt = <3000>;
     75	};
     76
     77	sfp_cp1_eth0: sfp-cp1-eth0 {
     78		compatible = "sff,sfp";
     79		i2c-bus = <&sfpplus1_i2c>;
     80		los-gpio = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>;
     81		mod-def0-gpio = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>;
     82		tx-disable-gpio = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>;
     83		tx-fault-gpio  = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>;
     84		maximum-power-milliwatt = <3000>;
     85	};
     86
     87	leds {
     88		compatible = "gpio-leds";
     89		status = "okay";
     90		pinctrl-0 = <&cp0_sfpplus_led_pins &cp1_sfpplus_led_pins>;
     91		pinctrl-names = "default";
     92
     93		led-0 {
     94			/* SFP+ port 2: Activity */
     95			function = LED_FUNCTION_LAN;
     96			function-enumerator = <0>;
     97			gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
     98		};
     99
    100		led-1 {
    101			/* SFP+ port 1: Activity */
    102			function = LED_FUNCTION_LAN;
    103			function-enumerator = <1>;
    104			gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
    105		};
    106
    107		led-2 {
    108			/* SFP+ port 2: 10 Gbps indicator */
    109			function = LED_FUNCTION_LAN;
    110			function-enumerator = <2>;
    111			gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
    112		};
    113
    114		led-3 {
    115			/* SFP+ port 2: 1 Gbps indicator */
    116			function = LED_FUNCTION_LAN;
    117			function-enumerator = <3>;
    118			gpios = <&cp1_gpio1 8 GPIO_ACTIVE_LOW>;
    119		};
    120
    121		led-4 {
    122			/* SFP+ port 1: 10 Gbps indicator */
    123			function = LED_FUNCTION_LAN;
    124			function-enumerator = <4>;
    125			gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>;
    126		};
    127
    128		led-5 {
    129			/* SFP+ port 1: 1 Gbps indicator */
    130			function = LED_FUNCTION_LAN;
    131			function-enumerator = <5>;
    132			gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
    133		};
    134
    135		led-6 {
    136			function = LED_FUNCTION_DISK;
    137			linux,default-trigger = "disk-activity";
    138			gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>;
    139		};
    140
    141	};
    142};
    143
    144&ap_sdhci0 {
    145	bus-width = <8>;
    146	/*
    147	 * Not stable in HS modes - phy needs "more calibration", so add
    148	 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
    149	 */
    150	marvell,xenon-phy-slow-mode;
    151	no-1-8-v;
    152	no-sd;
    153	no-sdio;
    154	non-removable;
    155	status = "okay";
    156	vqmmc-supply = <&v_vddo_h>;
    157};
    158
    159&ap_thermal_cpu1 {
    160	trips {
    161		cpu_active: cpu-active {
    162			temperature = <44000>;
    163			hysteresis = <2000>;
    164			type = "active";
    165		};
    166	};
    167	cooling-maps {
    168		fan-map {
    169			trip = <&cpu_active>;
    170			cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>,
    171					<&chassis_fan_group1 64 THERMAL_NO_LIMIT>;
    172		};
    173	};
    174};
    175
    176&i2c0 {
    177	clock-frequency = <100000>;
    178	status = "okay";
    179
    180	rtc@32 {
    181		compatible = "epson,rx8010";
    182		reg = <0x32>;
    183	};
    184};
    185
    186&spi0 {
    187	status = "okay";
    188	flash@0 {
    189		#address-cells = <0x1>;
    190		#size-cells = <0x1>;
    191		compatible = "jedec,spi-nor";
    192		reg = <0x0>;
    193		spi-max-frequency = <20000000>;
    194		partition@u-boot {
    195			label = "u-boot";
    196			reg = <0x00000000 0x001f0000>;
    197		};
    198		partition@u-boot-env {
    199			label = "u-boot-env";
    200			reg = <0x001f0000 0x00010000>;
    201		};
    202		partition@ubi1 {
    203			label = "ubi1";
    204			reg = <0x00200000 0x03f00000>;
    205		};
    206		partition@ubi2 {
    207			label = "ubi2";
    208			reg = <0x04100000 0x03f00000>;
    209		};
    210	};
    211};
    212
    213&uart0 {
    214	status = "okay";
    215	pinctrl-0 = <&uart0_pins>;
    216	pinctrl-names = "default";
    217};
    218
    219&uart1 {
    220	status = "okay";
    221	/* IEI WT61P803 PUZZLE MCU Controller */
    222	mcu {
    223		compatible = "iei,wt61p803-puzzle";
    224		current-speed = <115200>;
    225		enable-beep;
    226
    227		leds {
    228			compatible = "iei,wt61p803-puzzle-leds";
    229			#address-cells = <1>;
    230			#size-cells = <0>;
    231
    232			led@0 {
    233				reg = <0>;
    234				function = LED_FUNCTION_POWER;
    235				color = <LED_COLOR_ID_BLUE>;
    236			};
    237		};
    238
    239		hwmon {
    240			compatible = "iei,wt61p803-puzzle-hwmon";
    241			#address-cells = <1>;
    242			#size-cells = <0>;
    243
    244			chassis_fan_group0:fan-group@0 {
    245				#cooling-cells = <2>;
    246				reg = <0x00>;
    247				cooling-levels = <64 102 170 230 250>;
    248			};
    249
    250			chassis_fan_group1:fan-group@1 {
    251				#cooling-cells = <2>;
    252				reg = <0x01>;
    253				cooling-levels = <64 102 170 230 250>;
    254			};
    255		};
    256	};
    257};
    258
    259&cp0_rtc {
    260	status = "disabled";
    261};
    262
    263&cp0_i2c0 {
    264	clock-frequency = <100000>;
    265	pinctrl-names = "default";
    266	pinctrl-0 = <&cp0_i2c0_pins>;
    267	status = "okay";
    268
    269	sfpplus_gpio: gpio@21 {
    270		compatible = "nxp,pca9555";
    271		reg = <0x21>;
    272		gpio-controller;
    273		#gpio-cells = <2>;
    274	};
    275
    276	eeprom@54 {
    277		compatible = "atmel,24c04";
    278		reg = <0x54>;
    279	};
    280};
    281
    282&cp0_i2c1 {
    283	clock-frequency = <100000>;
    284	pinctrl-names = "default";
    285	pinctrl-0 = <&cp0_i2c1_pins>;
    286	status = "okay";
    287
    288	i2c-switch@70 {
    289		compatible = "nxp,pca9544";
    290		#address-cells = <1>;
    291		#size-cells = <0>;
    292		reg = <0x70>;
    293
    294		sfpplus0_i2c: i2c@0 {
    295			#address-cells = <1>;
    296			#size-cells = <0>;
    297			reg = <0>;
    298		};
    299
    300		sfpplus1_i2c: i2c@1 {
    301			#address-cells = <1>;
    302			#size-cells = <0>;
    303			reg = <1>;
    304		};
    305	};
    306};
    307
    308&cp0_uart1 {
    309	pinctrl-names = "default";
    310	pinctrl-0 = <&cp0_uart1_pins>;
    311	status = "okay";
    312};
    313
    314&cp0_mdio {
    315	#address-cells = <1>;
    316	#size-cells = <0>;
    317
    318	status = "okay";
    319
    320	ge_phy2: ethernet-phy@0 {
    321		reg = <0>;
    322	};
    323
    324	ge_phy3: ethernet-phy@1 {
    325		reg = <1>;
    326	};
    327};
    328
    329&cp0_pcie0 {
    330	pinctrl-names = "default";
    331	pinctrl-0 = <&cp0_pcie_pins>;
    332	num-lanes = <1>;
    333	num-viewport = <8>;
    334	reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
    335	ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
    336	phys = <&cp0_comphy0 0>;
    337	phy-names = "cp0-pcie0-x1-phy";
    338	status = "okay";
    339};
    340
    341&cp0_pinctrl {
    342	cp0_ge_mdio_pins: ge-mdio-pins {
    343		marvell,pins = "mpp32", "mpp34";
    344		marvell,function = "ge";
    345	};
    346	cp0_i2c1_pins: i2c1-pins {
    347		marvell,pins = "mpp35", "mpp36";
    348		marvell,function = "i2c1";
    349	};
    350	cp0_i2c0_pins: i2c0-pins {
    351		marvell,pins = "mpp37", "mpp38";
    352		marvell,function = "i2c0";
    353	};
    354	cp0_uart1_pins: uart1-pins {
    355		marvell,pins = "mpp40", "mpp41";
    356		marvell,function = "uart1";
    357	};
    358	cp0_xhci_vbus_pins: xhci0-vbus-pins {
    359		marvell,pins = "mpp47";
    360		marvell,function = "gpio";
    361	};
    362	cp0_pcie_pins: pcie-pins {
    363		marvell,pins = "mpp52";
    364		marvell,function = "gpio";
    365	};
    366	cp0_sdhci_pins: sdhci-pins {
    367		marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
    368			       "mpp60", "mpp61";
    369		marvell,function = "sdio";
    370	};
    371	cp0_sfpplus_led_pins: sfpplus-led-pins {
    372		marvell,pins = "mpp54";
    373		marvell,function = "gpio";
    374	};
    375};
    376
    377&cp0_ethernet {
    378	status = "okay";
    379};
    380
    381&cp0_eth0 {
    382	status = "okay";
    383	phy-mode = "10gbase-r";
    384	phys = <&cp0_comphy4 0>;
    385	local-mac-address = [ae 00 00 00 ff 00];
    386	sfp = <&sfp_cp0_eth0>;
    387	managed = "in-band-status";
    388};
    389
    390&cp0_eth1 {
    391	status = "okay";
    392	phy = <&ge_phy2>;
    393	phy-mode = "sgmii";
    394	local-mac-address = [ae 00 00 00 ff 01];
    395	phys = <&cp0_comphy3 1>;
    396};
    397
    398&cp0_eth2 {
    399	status = "okay";
    400	phy-mode = "sgmii";
    401	phys = <&cp0_comphy1 2>;
    402	local-mac-address = [ae 00 00 00 ff 02];
    403	phy = <&ge_phy3>;
    404};
    405
    406&cp0_sata0 {
    407	status = "okay";
    408
    409	sata-port@0 {
    410		phys = <&cp0_comphy2 0>;
    411		phy-names = "cp0-sata0-0-phy";
    412	};
    413
    414	sata-port@1 {
    415		phys = <&cp0_comphy5 1>;
    416		phy-names = "cp0-sata0-1-phy";
    417	};
    418};
    419
    420&cp0_sdhci0 {
    421	broken-cd;
    422	bus-width = <4>;
    423	pinctrl-names = "default";
    424	pinctrl-0 = <&cp0_sdhci_pins>;
    425	status = "okay";
    426	vqmmc-supply = <&v_3_3>;
    427};
    428
    429&cp0_usb3_0 {
    430	status = "okay";
    431};
    432
    433&cp0_usb3_1 {
    434	status = "okay";
    435};
    436
    437&cp1_i2c0 {
    438	clock-frequency = <100000>;
    439	status = "disabled";
    440};
    441
    442&cp1_i2c1 {
    443	clock-frequency = <100000>;
    444	status = "disabled";
    445};
    446
    447&cp1_rtc {
    448	status = "disabled";
    449};
    450
    451&cp1_ethernet {
    452	status = "okay";
    453};
    454
    455&cp1_eth0 {
    456	status = "okay";
    457	phy-mode = "10gbase-r";
    458	phys = <&cp1_comphy4 0>;
    459	local-mac-address = [ae 00 00 00 ff 03];
    460	sfp = <&sfp_cp1_eth0>;
    461	managed = "in-band-status";
    462};
    463
    464&cp1_eth1 {
    465	status = "okay";
    466	phy = <&ge_phy4>;
    467	phy-mode = "sgmii";
    468	local-mac-address = [ae 00 00 00 ff 04];
    469	phys = <&cp1_comphy3 1>;
    470};
    471
    472&cp1_eth2 {
    473	status = "okay";
    474	phy-mode = "sgmii";
    475	local-mac-address = [ae 00 00 00 ff 05];
    476	phys = <&cp1_comphy5 2>;
    477	phy = <&ge_phy5>;
    478};
    479
    480&cp1_pinctrl {
    481	cp1_sfpplus_led_pins: sfpplus-led-pins {
    482		marvell,pins = "mpp6", "mpp7", "mpp8", "mpp10", "mpp14", "mpp31";
    483		marvell,function = "gpio";
    484	};
    485};
    486
    487&cp1_uart0 {
    488	status = "disabled";
    489};
    490
    491&cp1_comphy2 {
    492	cp1_usbh0_con: connector {
    493		compatible = "usb-a-connector";
    494		phy-supply = <&v_5v0_usb3_hst_vbus>;
    495	};
    496};
    497
    498&cp1_usb3_0 {
    499	phys = <&cp1_comphy2 0>;
    500	phy-names = "cp1-usb3h0-comphy";
    501	status = "okay";
    502};
    503
    504&cp1_mdio {
    505	#address-cells = <1>;
    506	#size-cells = <0>;
    507
    508	status = "okay";
    509
    510	ge_phy4: ethernet-phy@1 {
    511		reg = <1>;
    512	};
    513	ge_phy5: ethernet-phy@0 {
    514		reg = <0>;
    515	};
    516};
    517
    518&cp1_pcie0 {
    519	num-lanes = <2>;
    520	phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
    521	phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
    522	status = "okay";
    523};