cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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armada-8040.dtsi (1129B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (C) 2016 Marvell Technology Group Ltd.
      4 *
      5 * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
      6 * two CP110.
      7 */
      8
      9#include "armada-ap806-quad.dtsi"
     10#include "armada-80x0.dtsi"
     11
     12/ {
     13	model = "Marvell Armada 8040";
     14	compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
     15		     "marvell,armada-ap806";
     16};
     17
     18&cp0_pcie0 {
     19	iommu-map =
     20		<0x0   &smmu 0x480 0x20>,
     21		<0x100 &smmu 0x4a0 0x20>,
     22		<0x200 &smmu 0x4c0 0x20>;
     23	iommu-map-mask = <0x031f>;
     24};
     25
     26/* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
     27 * in CP master is not connected (by package) to the oscillator. So
     28 * disable it. However, the RTC clock in CP slave is connected to the
     29 * oscillator so this one is let enabled.
     30 */
     31&cp0_rtc {
     32	status = "disabled";
     33};
     34
     35&cp0_sata0 {
     36	iommus = <&smmu 0x444>;
     37};
     38
     39&cp0_sdhci0 {
     40	iommus = <&smmu 0x445>;
     41};
     42
     43&cp0_usb3_0 {
     44	iommus = <&smmu 0x440>;
     45};
     46
     47&cp0_usb3_1 {
     48	iommus = <&smmu 0x441>;
     49};
     50
     51&cp1_sata0 {
     52	iommus = <&smmu 0x454>;
     53};
     54
     55&cp1_usb3_0 {
     56	iommus = <&smmu 0x450>;
     57};
     58
     59&cp1_usb3_1 {
     60	iommus = <&smmu 0x451>;
     61};