cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pumpkin-common.dtsi (4247B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2019 BayLibre, SAS.
      4 * Author: Fabien Parent <fparent@baylibre.com>
      5 */
      6
      7#include <dt-bindings/gpio/gpio.h>
      8
      9/ {
     10	aliases {
     11		serial0 = &uart0;
     12		ethernet0 = &ethernet;
     13	};
     14
     15	chosen {
     16		stdout-path = "serial0:921600n8";
     17	};
     18
     19	firmware {
     20		optee: optee@4fd00000 {
     21			compatible = "linaro,optee-tz";
     22			method = "smc";
     23		};
     24	};
     25
     26	gpio-keys {
     27		compatible = "gpio-keys";
     28		pinctrl-names = "default";
     29		pinctrl-0 = <&gpio_keys_default>;
     30
     31		volume-up {
     32			gpios = <&pio 42 GPIO_ACTIVE_LOW>;
     33			label = "volume_up";
     34			linux,code = <115>;
     35			wakeup-source;
     36			debounce-interval = <15>;
     37		};
     38
     39		volume-down {
     40			gpios = <&pio 43 GPIO_ACTIVE_LOW>;
     41			label = "volume_down";
     42			linux,code = <114>;
     43			wakeup-source;
     44			debounce-interval = <15>;
     45		};
     46	};
     47};
     48
     49&i2c0 {
     50	clock-div = <2>;
     51	pinctrl-names = "default";
     52	pinctrl-0 = <&i2c0_pins_a>;
     53	status = "okay";
     54
     55	tca6416: gpio@20 {
     56		compatible = "ti,tca6416";
     57		reg = <0x20>;
     58		reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>;
     59		pinctrl-names = "default";
     60		pinctrl-0 = <&tca6416_pins>;
     61
     62		gpio-controller;
     63		#gpio-cells = <2>;
     64
     65		eint20-mux-sel0-hog {
     66			gpio-hog;
     67			gpios = <0 0>;
     68			input;
     69			line-name = "eint20_mux_sel0";
     70		};
     71
     72		expcon-mux-sel1-hog {
     73			gpio-hog;
     74			gpios = <1 0>;
     75			input;
     76			line-name = "expcon_mux_sel1";
     77		};
     78
     79		mrg-di-mux-sel2-hog {
     80			gpio-hog;
     81			gpios = <2 0>;
     82			input;
     83			line-name = "mrg_di_mux_sel2";
     84		};
     85
     86		sd-sdio-mux-sel3-hog {
     87			gpio-hog;
     88			gpios = <3 0>;
     89			input;
     90			line-name = "sd_sdio_mux_sel3";
     91		};
     92
     93		sd-sdio-mux-ctrl7-hog {
     94			gpio-hog;
     95			gpios = <7 0>;
     96			output-low;
     97			line-name = "sd_sdio_mux_ctrl7";
     98		};
     99
    100		hw-id0-hog {
    101			gpio-hog;
    102			gpios = <8 0>;
    103			input;
    104			line-name = "hw_id0";
    105		};
    106
    107		hw-id1-hog {
    108			gpio-hog;
    109			gpios = <9 0>;
    110			input;
    111			line-name = "hw_id1";
    112		};
    113
    114		hw-id2-hog {
    115			gpio-hog;
    116			gpios = <10 0>;
    117			input;
    118			line-name = "hw_id2";
    119		};
    120
    121		fg-int-n-hog {
    122			gpio-hog;
    123			gpios = <11 0>;
    124			input;
    125			line-name = "fg_int_n";
    126		};
    127
    128		usba-pwr-en-hog {
    129			gpio-hog;
    130			gpios = <12 0>;
    131			output-high;
    132			line-name = "usba_pwr_en";
    133		};
    134
    135		wifi-3v3-pg-hog {
    136			gpio-hog;
    137			gpios = <13 0>;
    138			input;
    139			line-name = "wifi_3v3_pg";
    140		};
    141
    142		cam-rst-hog {
    143			gpio-hog;
    144			gpios = <14 0>;
    145			output-low;
    146			line-name = "cam_rst";
    147		};
    148
    149		cam-pwdn-hog {
    150			gpio-hog;
    151			gpios = <15 0>;
    152			output-low;
    153			line-name = "cam_pwdn";
    154		};
    155	};
    156};
    157
    158&i2c2 {
    159	clock-div = <2>;
    160	pinctrl-names = "default";
    161	pinctrl-0 = <&i2c2_pins_a>;
    162	status = "okay";
    163};
    164
    165&uart0 {
    166	status = "okay";
    167};
    168
    169&ethernet {
    170	pinctrl-names = "default";
    171	pinctrl-0 = <&ethernet_pins_default>;
    172	phy-handle = <&eth_phy>;
    173	phy-mode = "rmii";
    174	mac-address = [00 00 00 00 00 00];
    175	status = "okay";
    176
    177	mdio {
    178		#address-cells = <1>;
    179		#size-cells = <0>;
    180
    181		eth_phy: ethernet-phy@0 {
    182			reg = <0>;
    183		};
    184	};
    185};
    186
    187&usb0 {
    188	status = "okay";
    189	dr_mode = "peripheral";
    190	usb-role-switch;
    191
    192	usb_con: connector {
    193		compatible = "usb-c-connector";
    194		label = "USB-C";
    195	};
    196};
    197
    198&usb_phy {
    199	status = "okay";
    200};
    201
    202&pio {
    203	gpio_keys_default: gpiodefault {
    204		pins_cmd_dat {
    205			pinmux = <MT8516_PIN_42_KPCOL0__FUNC_GPIO42>,
    206				 <MT8516_PIN_43_KPCOL1__FUNC_GPIO43>;
    207			bias-pull-up;
    208			input-enable;
    209		};
    210	};
    211
    212	i2c0_pins_a: i2c0@0 {
    213		pins1 {
    214			pinmux = <MT8516_PIN_58_SDA0__FUNC_SDA0_0>,
    215				 <MT8516_PIN_59_SCL0__FUNC_SCL0_0>;
    216			bias-disable;
    217		};
    218	};
    219
    220	i2c2_pins_a: i2c2@0 {
    221		pins1 {
    222			pinmux = <MT8516_PIN_60_SDA2__FUNC_SDA2_0>,
    223				 <MT8516_PIN_61_SCL2__FUNC_SCL2_0>;
    224			bias-disable;
    225		};
    226	};
    227
    228	tca6416_pins: pinmux_tca6416_pins {
    229		gpio_mux_rst_n_pin {
    230			pinmux = <MT8516_PIN_65_UTXD1__FUNC_GPIO65>;
    231			output-high;
    232		};
    233
    234		gpio_mux_int_n_pin {
    235			pinmux = <MT8516_PIN_64_URXD1__FUNC_GPIO64>;
    236			input-enable;
    237			bias-pull-up;
    238		};
    239	};
    240
    241	ethernet_pins_default: ethernet {
    242		pins_ethernet {
    243			pinmux = <MT8516_PIN_0_EINT0__FUNC_EXT_TXD0>,
    244				 <MT8516_PIN_1_EINT1__FUNC_EXT_TXD1>,
    245				 <MT8516_PIN_5_EINT5__FUNC_EXT_RXER>,
    246				 <MT8516_PIN_6_EINT6__FUNC_EXT_RXC>,
    247				 <MT8516_PIN_7_EINT7__FUNC_EXT_RXDV>,
    248				 <MT8516_PIN_8_EINT8__FUNC_EXT_RXD0>,
    249				 <MT8516_PIN_9_EINT9__FUNC_EXT_RXD1>,
    250				 <MT8516_PIN_12_EINT12__FUNC_EXT_TXEN>,
    251				 <MT8516_PIN_38_MRG_DI__FUNC_EXT_MDIO>,
    252				 <MT8516_PIN_39_MRG_DO__FUNC_EXT_MDC>;
    253		};
    254	};
    255};