cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sparx5_nand.dtsi (619B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
      4 */
      5
      6&gpio {
      7	cs14_pins: cs14-pins {
      8		pins = "GPIO_44";
      9		function = "si";
     10	};
     11};
     12
     13&spi0 {
     14	pinctrl-0 = <&si2_pins>;
     15	pinctrl-names = "default";
     16	spi@e {
     17		compatible = "spi-mux";
     18		mux-controls = <&mux>;
     19		#address-cells = <1>;
     20		#size-cells = <0>;
     21		reg = <14>; /* CS14 */
     22		flash@6 {
     23			compatible = "spi-nand";
     24			pinctrl-0 = <&cs14_pins>;
     25			pinctrl-names = "default";
     26			reg = <0x6>; /* SPI2 */
     27			spi-max-frequency = <42000000>;
     28			rx-sample-delay-ns = <7>;  /* Tune for speed */
     29		};
     30	};
     31};