cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra186-p3310.dtsi (8068B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include "tegra186.dtsi"
      3
      4#include <dt-bindings/mfd/max77620.h>
      5
      6/ {
      7	model = "NVIDIA Jetson TX2";
      8	compatible = "nvidia,p3310", "nvidia,tegra186";
      9
     10	aliases {
     11		ethernet0 = "/ethernet@2490000";
     12		i2c0 = "/bpmp/i2c";
     13		i2c1 = "/i2c@3160000";
     14		i2c2 = "/i2c@c240000";
     15		i2c3 = "/i2c@3180000";
     16		i2c4 = "/i2c@3190000";
     17		i2c5 = "/i2c@31c0000";
     18		i2c6 = "/i2c@c250000";
     19		i2c7 = "/i2c@31e0000";
     20		mmc0 = "/mmc@3460000";
     21		mmc1 = "/mmc@3400000";
     22		serial0 = &uarta;
     23	};
     24
     25	chosen {
     26		bootargs = "earlycon console=ttyS0,115200n8 fw_devlink=on";
     27		stdout-path = "serial0:115200n8";
     28	};
     29
     30	memory@80000000 {
     31		device_type = "memory";
     32		reg = <0x0 0x80000000 0x2 0x00000000>;
     33	};
     34
     35	ethernet@2490000 {
     36		status = "okay";
     37
     38		phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
     39					 GPIO_ACTIVE_LOW>;
     40		phy-handle = <&phy>;
     41		phy-mode = "rgmii";
     42
     43		mdio {
     44			#address-cells = <1>;
     45			#size-cells = <0>;
     46
     47			phy: ethernet-phy@0 {
     48				compatible = "ethernet-phy-ieee802.3-c22";
     49				reg = <0x0>;
     50				interrupt-parent = <&gpio>;
     51				interrupts = <TEGRA186_MAIN_GPIO(M, 5)
     52					      IRQ_TYPE_LEVEL_LOW>;
     53
     54				#phy-cells = <0>;
     55			};
     56		};
     57	};
     58
     59	memory-controller@2c00000 {
     60		status = "okay";
     61	};
     62
     63	serial@3100000 {
     64		status = "okay";
     65	};
     66
     67	i2c@3160000 {
     68		status = "okay";
     69
     70		power-monitor@40 {
     71			compatible = "ti,ina3221";
     72			reg = <0x40>;
     73			#address-cells = <1>;
     74			#size-cells = <0>;
     75
     76			input@0 {
     77				reg = <0x0>;
     78				label = "VDD_SYS_GPU";
     79				shunt-resistor-micro-ohms = <10000>;
     80			};
     81
     82			input@1 {
     83				reg = <0x1>;
     84				label = "VDD_SYS_SOC";
     85				shunt-resistor-micro-ohms = <10000>;
     86			};
     87
     88			input@2 {
     89				reg = <0x2>;
     90				label = "VDD_3V8_WIFI";
     91				shunt-resistor-micro-ohms = <10000>;
     92			};
     93		};
     94
     95		power-monitor@41 {
     96			compatible = "ti,ina3221";
     97			reg = <0x41>;
     98			#address-cells = <1>;
     99			#size-cells = <0>;
    100
    101			input@0 {
    102				reg = <0x0>;
    103				label = "VDD_IN";
    104				shunt-resistor-micro-ohms = <5000>;
    105			};
    106
    107			input@1 {
    108				reg = <0x1>;
    109				label = "VDD_SYS_CPU";
    110				shunt-resistor-micro-ohms = <10000>;
    111			};
    112
    113			input@2 {
    114				reg = <0x2>;
    115				label = "VDD_5V0_DDR";
    116				shunt-resistor-micro-ohms = <10000>;
    117			};
    118		};
    119	};
    120
    121	i2c@3180000 {
    122		status = "okay";
    123	};
    124
    125	ddc: i2c@3190000 {
    126		status = "okay";
    127	};
    128
    129	i2c@31c0000 {
    130		status = "okay";
    131	};
    132
    133	i2c@31e0000 {
    134		status = "okay";
    135	};
    136
    137	/* SDMMC1 (SD/MMC) */
    138	mmc@3400000 {
    139		cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
    140		wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
    141
    142		vqmmc-supply = <&vddio_sdmmc1>;
    143	};
    144
    145	/* SDMMC3 (SDIO) */
    146	mmc@3440000 {
    147		status = "okay";
    148	};
    149
    150	/* SDMMC4 (eMMC) */
    151	mmc@3460000 {
    152		status = "okay";
    153		bus-width = <8>;
    154		non-removable;
    155
    156		vqmmc-supply = <&vdd_1v8_ap>;
    157		vmmc-supply = <&vdd_3v3_sys>;
    158	};
    159
    160	hsp@3c00000 {
    161		status = "okay";
    162	};
    163
    164	i2c@c240000 {
    165		status = "okay";
    166	};
    167
    168	i2c@c250000 {
    169		status = "okay";
    170
    171		/* module ID EEPROM */
    172		eeprom@50 {
    173			compatible = "atmel,24c02";
    174			reg = <0x50>;
    175
    176			label = "module";
    177			vcc-supply = <&vdd_1v8>;
    178			address-width = <8>;
    179			pagesize = <8>;
    180			size = <256>;
    181			read-only;
    182		};
    183	};
    184
    185	rtc@c2a0000 {
    186		status = "okay";
    187	};
    188
    189	pmc@c360000 {
    190		nvidia,invert-interrupt;
    191	};
    192
    193	cpus {
    194		cpu@0 {
    195			enable-method = "psci";
    196		};
    197
    198		cpu@1 {
    199			enable-method = "psci";
    200		};
    201
    202		cpu@2 {
    203			enable-method = "psci";
    204		};
    205
    206		cpu@3 {
    207			enable-method = "psci";
    208		};
    209
    210		cpu@4 {
    211			enable-method = "psci";
    212		};
    213
    214		cpu@5 {
    215			enable-method = "psci";
    216		};
    217	};
    218
    219	bpmp {
    220		i2c {
    221			status = "okay";
    222
    223			pmic: pmic@3c {
    224				compatible = "maxim,max77620";
    225				reg = <0x3c>;
    226
    227				interrupt-parent = <&pmc>;
    228				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
    229				#interrupt-cells = <2>;
    230				interrupt-controller;
    231
    232				#gpio-cells = <2>;
    233				gpio-controller;
    234
    235				pinctrl-names = "default";
    236				pinctrl-0 = <&max77620_default>;
    237
    238				max77620_default: pinmux {
    239					gpio0 {
    240						pins = "gpio0";
    241						function = "gpio";
    242					};
    243
    244					gpio1 {
    245						pins = "gpio1";
    246						function = "fps-out";
    247						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
    248					};
    249
    250					gpio2 {
    251						pins = "gpio2";
    252						function = "fps-out";
    253						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
    254					};
    255
    256					gpio3 {
    257						pins = "gpio3";
    258						function = "fps-out";
    259						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
    260					};
    261
    262					gpio4 {
    263						pins = "gpio4";
    264						function = "32k-out1";
    265						drive-push-pull = <1>;
    266					};
    267
    268					gpio5 {
    269						pins = "gpio5";
    270						function = "gpio";
    271						drive-push-pull = <0>;
    272					};
    273
    274					gpio6 {
    275						pins = "gpio6";
    276						function = "gpio";
    277						drive-push-pull = <1>;
    278					};
    279
    280					gpio7 {
    281						pins = "gpio7";
    282						function = "gpio";
    283						drive-push-pull = <0>;
    284					};
    285				};
    286
    287				fps {
    288					fps0 {
    289						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    290						maxim,shutdown-fps-time-period-us = <640>;
    291					};
    292
    293					fps1 {
    294						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
    295						maxim,shutdown-fps-time-period-us = <640>;
    296					};
    297
    298					fps2 {
    299						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    300						maxim,shutdown-fps-time-period-us = <640>;
    301					};
    302				};
    303
    304				regulators {
    305					in-sd0-supply = <&vdd_5v0_sys>;
    306					in-sd1-supply = <&vdd_5v0_sys>;
    307					in-sd2-supply = <&vdd_5v0_sys>;
    308					in-sd3-supply = <&vdd_5v0_sys>;
    309
    310					in-ldo0-1-supply = <&vdd_5v0_sys>;
    311					in-ldo2-supply = <&vdd_5v0_sys>;
    312					in-ldo3-5-supply = <&vdd_5v0_sys>;
    313					in-ldo4-6-supply = <&vdd_1v8>;
    314					in-ldo7-8-supply = <&avdd_dsi_csi>;
    315
    316					sd0 {
    317						regulator-name = "VDD_DDR_1V1_PMIC";
    318						regulator-min-microvolt = <1100000>;
    319						regulator-max-microvolt = <1100000>;
    320						regulator-always-on;
    321						regulator-boot-on;
    322					};
    323
    324					avdd_dsi_csi: sd1 {
    325						regulator-name = "AVDD_DSI_CSI_1V2";
    326						regulator-min-microvolt = <1200000>;
    327						regulator-max-microvolt = <1200000>;
    328					};
    329
    330					vdd_1v8: sd2 {
    331						regulator-name = "VDD_1V8";
    332						regulator-min-microvolt = <1800000>;
    333						regulator-max-microvolt = <1800000>;
    334					};
    335
    336					vdd_3v3_sys: sd3 {
    337						regulator-name = "VDD_3V3_SYS";
    338						regulator-min-microvolt = <3300000>;
    339						regulator-max-microvolt = <3300000>;
    340					};
    341
    342					vdd_1v8_pll: ldo0 {
    343						regulator-name = "VDD_1V8_AP_PLL";
    344						regulator-min-microvolt = <1800000>;
    345						regulator-max-microvolt = <1800000>;
    346					};
    347
    348					ldo2 {
    349						regulator-name = "VDDIO_3V3_AOHV";
    350						regulator-min-microvolt = <3300000>;
    351						regulator-max-microvolt = <3300000>;
    352						regulator-always-on;
    353						regulator-boot-on;
    354					};
    355
    356					vddio_sdmmc1: ldo3 {
    357						regulator-name = "VDDIO_SDMMC1_AP";
    358						regulator-min-microvolt = <1800000>;
    359						regulator-max-microvolt = <3300000>;
    360					};
    361
    362					ldo4 {
    363						regulator-name = "VDD_RTC";
    364						regulator-min-microvolt = <1000000>;
    365						regulator-max-microvolt = <1000000>;
    366					};
    367
    368					vddio_sdmmc3: ldo5 {
    369						regulator-name = "VDDIO_SDMMC3_AP";
    370						regulator-min-microvolt = <2800000>;
    371						regulator-max-microvolt = <2800000>;
    372					};
    373
    374					vdd_hdmi_1v05: ldo7 {
    375						regulator-name = "VDD_HDMI_1V05";
    376						regulator-min-microvolt = <1050000>;
    377						regulator-max-microvolt = <1050000>;
    378					};
    379
    380					vdd_pex: ldo8 {
    381						regulator-name = "VDD_PEX_1V05";
    382						regulator-min-microvolt = <1050000>;
    383						regulator-max-microvolt = <1050000>;
    384					};
    385				};
    386			};
    387		};
    388	};
    389
    390	psci {
    391		compatible = "arm,psci-1.0";
    392		status = "okay";
    393		method = "smc";
    394	};
    395
    396	gnd: regulator-gnd {
    397		compatible = "regulator-fixed";
    398		regulator-name = "GND";
    399		regulator-min-microvolt = <0>;
    400		regulator-max-microvolt = <0>;
    401		regulator-always-on;
    402		regulator-boot-on;
    403	};
    404
    405	vdd_5v0_sys: regulator-vdd-5v0-sys {
    406		compatible = "regulator-fixed";
    407		regulator-name = "VDD_5V0_SYS";
    408		regulator-min-microvolt = <5000000>;
    409		regulator-max-microvolt = <5000000>;
    410		regulator-always-on;
    411		regulator-boot-on;
    412	};
    413
    414	vdd_1v8_ap: regulator-vdd-1v8-ap {
    415		compatible = "regulator-fixed";
    416		regulator-name = "VDD_1V8_AP";
    417		regulator-min-microvolt = <1800000>;
    418		regulator-max-microvolt = <1800000>;
    419
    420		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
    421		enable-active-high;
    422
    423		vin-supply = <&vdd_1v8>;
    424	};
    425};