cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra186-p3509-0000+p3636-0001.dts (21694B)


      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/input/linux-event-codes.h>
      5#include <dt-bindings/input/gpio-keys.h>
      6#include <dt-bindings/mfd/max77620.h>
      7
      8#include "tegra186.dtsi"
      9
     10/ {
     11	model = "NVIDIA Jetson TX2 NX Developer Kit";
     12	compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
     13
     14	aliases {
     15		ethernet0 = "/ethernet@2490000";
     16		i2c0 = "/bpmp/i2c";
     17		i2c1 = "/i2c@3160000";
     18		i2c2 = "/i2c@c240000";
     19		i2c3 = "/i2c@3180000";
     20		i2c4 = "/i2c@3190000";
     21		i2c5 = "/i2c@31c0000";
     22		i2c6 = "/i2c@c250000";
     23		i2c7 = "/i2c@31e0000";
     24		mmc0 = "/mmc@3460000";
     25		serial0 = &uarta;
     26	};
     27
     28	chosen {
     29		bootargs = "earlycon console=ttyS0,115200n8";
     30		stdout-path = "serial0:115200n8";
     31	};
     32
     33	memory@80000000 {
     34		device_type = "memory";
     35		reg = <0x0 0x80000000 0x0 0x70000000>;
     36	};
     37
     38	ethernet@2490000 {
     39		status = "okay";
     40
     41		phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
     42		phy-handle = <&phy>;
     43		phy-mode = "rgmii-id";
     44
     45		mdio {
     46			#address-cells = <1>;
     47			#size-cells = <0>;
     48
     49			phy: ethernet-phy@0 {
     50				compatible = "ethernet-phy-ieee802.3-c22";
     51				reg = <0x0>;
     52				interrupt-parent = <&gpio_aon>;
     53				interrupts = <TEGRA186_AON_GPIO(AA, 7) IRQ_TYPE_LEVEL_LOW>;
     54				#phy-cells = <0>;
     55			};
     56		};
     57	};
     58
     59	memory-controller@2c00000 {
     60		status = "okay";
     61	};
     62
     63	timer@3010000 {
     64		status = "okay";
     65	};
     66
     67	serial@3100000 {
     68		status = "okay";
     69	};
     70
     71	i2c@3160000 {
     72		status = "okay";
     73	};
     74
     75	i2c@3180000 {
     76		status = "okay";
     77
     78		power-monitor@40 {
     79			compatible = "ti,ina3221";
     80			reg = <0x40>;
     81			#address-cells = <1>;
     82			#size-cells = <0>;
     83
     84			input@0 {
     85				reg = <0>;
     86				label = "VDD_IN";
     87				shunt-resistor-micro-ohms = <5>;
     88			};
     89
     90			input@1 {
     91				reg = <1>;
     92				label = "VDD_CPU_GPU";
     93				shunt-resistor-micro-ohms = <5>;
     94			};
     95
     96			input@2 {
     97				reg = <2>;
     98				label = "VDD_SOC";
     99				shunt-resistor-micro-ohms = <5>;
    100			};
    101		};
    102	};
    103
    104	ddc: i2c@3190000 {
    105		status = "okay";
    106	};
    107
    108	i2c@31c0000 {
    109		status = "okay";
    110	};
    111
    112	i2c@31e0000 {
    113		status = "okay";
    114	};
    115
    116	/* SDMMC4 (eMMC) */
    117	mmc@3460000 {
    118		status = "okay";
    119		bus-width = <8>;
    120		non-removable;
    121
    122		vqmmc-supply = <&vdd_1v8_ap>;
    123		vmmc-supply = <&vdd_3v3_sys>;
    124	};
    125
    126	hda@3510000 {
    127		nvidia,model = "NVIDIA Jetson TX2 NX HDA";
    128		status = "okay";
    129	};
    130
    131	padctl@3520000 {
    132		status = "okay";
    133
    134		avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
    135		avdd-usb-supply = <&vdd_3v3_sys>;
    136		vclamp-usb-supply = <&vdd_1v8>;
    137		vddio-hsic-supply = <&gnd>;
    138
    139		pads {
    140			usb2 {
    141				status = "okay";
    142
    143				lanes {
    144					micro_b: usb2-0 {
    145						nvidia,function = "xusb";
    146						status = "okay";
    147					};
    148
    149					usb2-1 {
    150						nvidia,function = "xusb";
    151						status = "okay";
    152					};
    153
    154					usb2-2 {
    155						nvidia,function = "xusb";
    156						status = "okay";
    157					};
    158				};
    159			};
    160
    161			usb3 {
    162				status = "okay";
    163
    164				lanes {
    165					usb3-1 {
    166						nvidia,function = "xusb";
    167						status = "okay";
    168					};
    169				};
    170			};
    171		};
    172
    173		ports {
    174			usb2-0 {
    175				status = "okay";
    176				mode = "otg";
    177				vbus-supply = <&vdd_5v0_sys>;
    178				usb-role-switch;
    179
    180				connector {
    181					compatible = "gpio-usb-b-connector",
    182						     "usb-b-connector";
    183					label = "micro-USB";
    184					type = "micro";
    185					vbus-gpios = <&gpio
    186						      TEGRA186_MAIN_GPIO(L, 4)
    187						      GPIO_ACTIVE_LOW>;
    188					id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
    189				};
    190			};
    191
    192			usb2-1 {
    193				status = "okay";
    194				mode = "host";
    195
    196				vbus-supply = <&vdd_5v0_sys>;
    197			};
    198
    199			usb2-2 {
    200				status = "okay";
    201				mode = "host";
    202
    203				vbus-supply = <&vdd_5v0_sys>;
    204			};
    205
    206			usb3-1 {
    207				nvidia,usb2-companion = <1>;
    208				vbus-supply = <&vdd_5v0_sys>;
    209				status = "okay";
    210			};
    211		};
    212	};
    213
    214	usb@3530000 {
    215		status = "okay";
    216
    217		phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
    218		       <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
    219		       <&{/padctl@3520000/pads/usb2/lanes/usb2-2}>,
    220		       <&{/padctl@3520000/pads/usb3/lanes/usb3-1}>;
    221		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
    222	};
    223
    224	usb@3550000 {
    225		status = "okay";
    226
    227		phys = <&micro_b>;
    228		phy-names = "usb2-0";
    229	};
    230
    231	hsp@3c00000 {
    232		status = "okay";
    233	};
    234
    235	i2c@c240000 {
    236		status = "okay";
    237	};
    238
    239	i2c@c250000 {
    240		status = "okay";
    241
    242		/* module ID EEPROM */
    243		eeprom@50 {
    244			compatible = "atmel,24c02";
    245			reg = <0x50>;
    246
    247			label = "module";
    248			vcc-supply = <&vdd_1v8>;
    249			address-width = <8>;
    250			pagesize = <8>;
    251			size = <256>;
    252			read-only;
    253		};
    254
    255		/* carrier board ID EEPROM */
    256		eeprom@57 {
    257			compatible = "atmel,24c02";
    258			reg = <0x57>;
    259
    260			label = "system";
    261			vcc-supply = <&vdd_1v8>;
    262			address-width = <8>;
    263			pagesize = <8>;
    264			size = <256>;
    265			read-only;
    266		};
    267	};
    268
    269	rtc@c2a0000 {
    270		status = "okay";
    271	};
    272
    273	pwm@c340000 {
    274		status = "okay";
    275	};
    276
    277	pmc@c360000 {
    278		nvidia,invert-interrupt;
    279	};
    280
    281	pcie@10003000 {
    282		status = "okay";
    283
    284		dvdd-pex-supply = <&vdd_pex>;
    285		hvdd-pex-pll-supply = <&vdd_1v8>;
    286		hvdd-pex-supply = <&vdd_1v8>;
    287		vddio-pexctl-aud-supply = <&vdd_1v8>;
    288
    289		pci@1,0 {
    290			nvidia,num-lanes = <2>;
    291			status = "okay";
    292		};
    293
    294		pci@2,0 {
    295			nvidia,num-lanes = <1>;
    296			status = "disabled";
    297		};
    298
    299		pci@3,0 {
    300			nvidia,num-lanes = <1>;
    301			status = "okay";
    302		};
    303	};
    304
    305	host1x@13e00000 {
    306		status = "okay";
    307
    308		dpaux@15040000 {
    309			status = "okay";
    310		};
    311
    312		display-hub@15200000 {
    313			status = "okay";
    314		};
    315
    316		dsi@15300000 {
    317			status = "disabled";
    318		};
    319
    320		/* DP */
    321		sor@15540000 {
    322			status = "okay";
    323
    324			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
    325			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
    326
    327			nvidia,dpaux = <&dpaux>;
    328		};
    329
    330		/* HDMI */
    331		sor@15580000 {
    332			status = "okay";
    333
    334			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
    335			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
    336			hdmi-supply = <&vdd_hdmi>;
    337
    338			nvidia,ddc-i2c-bus = <&ddc>;
    339			nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
    340						 GPIO_ACTIVE_LOW>;
    341		};
    342
    343		dpaux@155c0000 {
    344			status = "okay";
    345		};
    346	};
    347
    348	gpu@17000000 {
    349		status = "okay";
    350	};
    351
    352	fan: pwm-fan {
    353		compatible = "pwm-fan";
    354		pwms = <&pwm4 0 45334>;
    355
    356		cooling-levels = <0 64 128 255>;
    357		#cooling-cells = <2>;
    358	};
    359
    360	gpio-keys {
    361		compatible = "gpio-keys";
    362
    363		power {
    364			label = "Power";
    365			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
    366					   GPIO_ACTIVE_LOW>;
    367			linux,input-type = <EV_KEY>;
    368			linux,code = <KEY_POWER>;
    369			debounce-interval = <10>;
    370			wakeup-event-action = <EV_ACT_ASSERTED>;
    371			wakeup-source;
    372		};
    373
    374		volume-up {
    375			label = "Volume Up";
    376			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
    377					   GPIO_ACTIVE_LOW>;
    378			linux,input-type = <EV_KEY>;
    379			linux,code = <KEY_VOLUMEUP>;
    380			debounce-interval = <10>;
    381		};
    382
    383		volume-down {
    384			label = "Volume Down";
    385			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
    386					   GPIO_ACTIVE_LOW>;
    387			linux,input-type = <EV_KEY>;
    388			linux,code = <KEY_VOLUMEDOWN>;
    389			debounce-interval = <10>;
    390		};
    391	};
    392
    393	cpus {
    394		cpu@0 {
    395			enable-method = "psci";
    396		};
    397
    398		cpu@1 {
    399			enable-method = "psci";
    400		};
    401
    402		cpu@2 {
    403			enable-method = "psci";
    404		};
    405
    406		cpu@3 {
    407			enable-method = "psci";
    408		};
    409
    410		cpu@4 {
    411			enable-method = "psci";
    412		};
    413
    414		cpu@5 {
    415			enable-method = "psci";
    416		};
    417	};
    418
    419	bpmp {
    420		i2c {
    421			status = "okay";
    422
    423			pmic: pmic@3c {
    424				compatible = "maxim,max77620";
    425				reg = <0x3c>;
    426
    427				interrupt-parent = <&pmc>;
    428				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
    429				#interrupt-cells = <2>;
    430				interrupt-controller;
    431
    432				#gpio-cells = <2>;
    433				gpio-controller;
    434
    435				pinctrl-names = "default";
    436				pinctrl-0 = <&max77620_default>;
    437
    438				max77620_default: pinmux {
    439					gpio0 {
    440						pins = "gpio0";
    441						function = "gpio";
    442					};
    443
    444					gpio1 {
    445						pins = "gpio1";
    446						function = "fps-out";
    447						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
    448					};
    449
    450					gpio2 {
    451						pins = "gpio2";
    452						function = "fps-out";
    453						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
    454					};
    455
    456					gpio3 {
    457						pins = "gpio3";
    458						function = "fps-out";
    459						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
    460					};
    461
    462					gpio4 {
    463						pins = "gpio4";
    464						function = "32k-out1";
    465						drive-push-pull = <1>;
    466					};
    467
    468					gpio5 {
    469						pins = "gpio5";
    470						function = "gpio";
    471						drive-push-pull = <0>;
    472					};
    473
    474					gpio6 {
    475						pins = "gpio6";
    476						function = "gpio";
    477						drive-push-pull = <1>;
    478					};
    479
    480					gpio7 {
    481						pins = "gpio7";
    482						function = "gpio";
    483						drive-push-pull = <1>;
    484					};
    485				};
    486
    487				fps {
    488					fps0 {
    489						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    490						maxim,shutdown-fps-time-period-us = <640>;
    491					};
    492
    493					fps1 {
    494						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
    495						maxim,shutdown-fps-time-period-us = <640>;
    496					};
    497
    498					fps2 {
    499						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    500						maxim,shutdown-fps-time-period-us = <640>;
    501					};
    502				};
    503
    504				regulators {
    505					in-sd0-supply = <&vdd_5v0_sys>;
    506					in-sd1-supply = <&vdd_5v0_sys>;
    507					in-sd2-supply = <&vdd_5v0_sys>;
    508					in-sd3-supply = <&vdd_5v0_sys>;
    509
    510					in-ldo0-1-supply = <&vdd_5v0_sys>;
    511					in-ldo2-supply = <&vdd_5v0_sys>;
    512					in-ldo3-5-supply = <&vdd_5v0_sys>;
    513					in-ldo4-6-supply = <&vdd_1v8>;
    514					in-ldo7-8-supply = <&avdd_dsi_csi>;
    515
    516					sd0 {
    517						regulator-name = "VDD_DDR_1V1_PMIC";
    518						regulator-min-microvolt = <1100000>;
    519						regulator-max-microvolt = <1100000>;
    520						regulator-always-on;
    521						regulator-boot-on;
    522					};
    523
    524					avdd_dsi_csi: sd1 {
    525						regulator-name = "AVDD_DSI_CSI_1V2";
    526						regulator-min-microvolt = <1200000>;
    527						regulator-max-microvolt = <1200000>;
    528					};
    529
    530					vdd_1v8: sd2 {
    531						regulator-name = "VDD_1V8";
    532						regulator-min-microvolt = <1800000>;
    533						regulator-max-microvolt = <1800000>;
    534					};
    535
    536					vdd_3v3_sys: sd3 {
    537						regulator-name = "VDD_3V3_SYS";
    538						regulator-min-microvolt = <3300000>;
    539						regulator-max-microvolt = <3300000>;
    540					};
    541
    542					vdd_1v8_pll: ldo0 {
    543						regulator-name = "VDD_1V8_AP_PLL";
    544						regulator-min-microvolt = <1800000>;
    545						regulator-max-microvolt = <1800000>;
    546					};
    547
    548					ldo2 {
    549						regulator-name = "VDDIO_3V3_AOHV";
    550						regulator-min-microvolt = <3300000>;
    551						regulator-max-microvolt = <3300000>;
    552						regulator-always-on;
    553						regulator-boot-on;
    554					};
    555
    556					vddio_sdmmc1: ldo3 {
    557						regulator-name = "VDDIO_SDMMC1_AP";
    558						regulator-min-microvolt = <1800000>;
    559						regulator-max-microvolt = <3300000>;
    560					};
    561
    562					ldo4 {
    563						regulator-name = "VDD_RTC";
    564						regulator-min-microvolt = <1000000>;
    565						regulator-max-microvolt = <1000000>;
    566					};
    567
    568					vddio_sdmmc3: ldo5 {
    569						regulator-name = "VDDIO_SDMMC3_AP";
    570						regulator-min-microvolt = <2800000>;
    571						regulator-max-microvolt = <2800000>;
    572					};
    573
    574					vdd_hdmi_1v05: ldo7 {
    575						regulator-name = "VDD_HDMI_1V05";
    576						regulator-min-microvolt = <1050000>;
    577						regulator-max-microvolt = <1050000>;
    578					};
    579
    580					vdd_pex: ldo8 {
    581						regulator-name = "VDD_PEX_1V05";
    582						regulator-min-microvolt = <1050000>;
    583						regulator-max-microvolt = <1050000>;
    584					};
    585				};
    586			};
    587		};
    588	};
    589
    590	psci {
    591		compatible = "arm,psci-1.0";
    592		status = "okay";
    593		method = "smc";
    594	};
    595
    596	gnd: regulator-gnd {
    597		compatible = "regulator-fixed";
    598		regulator-name = "GND";
    599		regulator-min-microvolt = <0>;
    600		regulator-max-microvolt = <0>;
    601		regulator-always-on;
    602		regulator-boot-on;
    603	};
    604
    605	vdd_5v0_sys: regulator-vdd-5v0-sys {
    606		compatible = "regulator-fixed";
    607		regulator-name = "VDD_5V0_SYS";
    608		regulator-min-microvolt = <5000000>;
    609		regulator-max-microvolt = <5000000>;
    610		regulator-always-on;
    611		regulator-boot-on;
    612	};
    613
    614	vdd_1v8_ap: regulator-vdd-1v8-ap {
    615		compatible = "regulator-fixed";
    616		regulator-name = "VDD_1V8_AP";
    617		regulator-min-microvolt = <1800000>;
    618		regulator-max-microvolt = <1800000>;
    619
    620		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
    621		enable-active-high;
    622
    623		vin-supply = <&vdd_1v8>;
    624	};
    625
    626	vdd_hdmi: regulator-vdd-hdmi {
    627		compatible = "regulator-fixed";
    628		regulator-name = "VDD_5V0_HDMI_CON";
    629		regulator-min-microvolt = <5000000>;
    630		regulator-max-microvolt = <5000000>;
    631
    632		vin-supply = <&vdd_5v0_sys>;
    633	};
    634
    635	thermal-zones {
    636		cpu-thermal {
    637			polling-delay = <0>;
    638			polling-delay-passive = <500>;
    639			status = "okay";
    640
    641			trips {
    642				cpu_trip_critical: critical {
    643					temperature = <96500>;
    644					hysteresis = <0>;
    645					type = "critical";
    646				};
    647
    648				cpu_trip_hot: hot {
    649					temperature = <79000>;
    650					hysteresis = <2000>;
    651					type = "hot";
    652				};
    653
    654				cpu_trip_active: active {
    655					temperature = <62000>;
    656					hysteresis = <2000>;
    657					type = "active";
    658				};
    659
    660				cpu_trip_passive: passive {
    661					temperature = <45000>;
    662					hysteresis = <2000>;
    663					type = "passive";
    664				};
    665			};
    666
    667			cooling-maps {
    668				cpu-critical {
    669					cooling-device = <&fan 3 3>;
    670					trip = <&cpu_trip_critical>;
    671				};
    672
    673				cpu-hot {
    674					cooling-device = <&fan 2 2>;
    675					trip = <&cpu_trip_hot>;
    676				};
    677
    678				cpu-active {
    679					cooling-device = <&fan 1 1>;
    680					trip = <&cpu_trip_active>;
    681				};
    682
    683				cpu-passive {
    684					cooling-device = <&fan 0 0>;
    685					trip = <&cpu_trip_passive>;
    686				};
    687			};
    688		};
    689
    690		aux-thermal {
    691			polling-delay = <0>;
    692			polling-delay-passive = <500>;
    693			status = "okay";
    694
    695			trips {
    696				aux_alert0: critical {
    697					temperature = <90000>;
    698					hysteresis = <0>;
    699					type = "critical";
    700				};
    701			};
    702		};
    703
    704		gpu-thermal {
    705			polling-delay = <0>;
    706			polling-delay-passive = <500>;
    707			status = "okay";
    708
    709			trips {
    710				gpu_alert0: critical {
    711					temperature = <99000>;
    712					hysteresis = <0>;
    713					type = "critical";
    714				};
    715			};
    716		};
    717	};
    718
    719	aconnect@2900000 {
    720		status = "okay";
    721
    722		dma-controller@2930000 {
    723			status = "okay";
    724		};
    725
    726		interrupt-controller@2a40000 {
    727			status = "okay";
    728		};
    729
    730		ahub@2900800 {
    731			status = "okay";
    732
    733			ports {
    734				#address-cells = <1>;
    735				#size-cells = <0>;
    736
    737				port@0 {
    738					reg = <0x0>;
    739
    740					xbar_admaif0_ep: endpoint {
    741						remote-endpoint = <&admaif0_ep>;
    742					};
    743				};
    744
    745				port@1 {
    746					reg = <0x1>;
    747
    748					xbar_admaif1_ep: endpoint {
    749						remote-endpoint = <&admaif1_ep>;
    750					};
    751				};
    752
    753				port@2 {
    754					reg = <0x2>;
    755
    756					xbar_admaif2_ep: endpoint {
    757						remote-endpoint = <&admaif2_ep>;
    758					};
    759				};
    760
    761				port@3 {
    762					reg = <0x3>;
    763
    764					xbar_admaif3_ep: endpoint {
    765						remote-endpoint = <&admaif3_ep>;
    766					};
    767				};
    768
    769				port@4 {
    770					reg = <0x4>;
    771
    772					xbar_admaif4_ep: endpoint {
    773						remote-endpoint = <&admaif4_ep>;
    774					};
    775				};
    776
    777				port@5 {
    778					reg = <0x5>;
    779
    780					xbar_admaif5_ep: endpoint {
    781						remote-endpoint = <&admaif5_ep>;
    782					};
    783				};
    784
    785				port@6 {
    786					reg = <0x6>;
    787
    788					xbar_admaif6_ep: endpoint {
    789						remote-endpoint = <&admaif6_ep>;
    790					};
    791				};
    792
    793				port@7 {
    794					reg = <0x7>;
    795
    796					xbar_admaif7_ep: endpoint {
    797						remote-endpoint = <&admaif7_ep>;
    798					};
    799				};
    800
    801				port@8 {
    802					reg = <0x8>;
    803
    804					xbar_admaif8_ep: endpoint {
    805						remote-endpoint = <&admaif8_ep>;
    806					};
    807				};
    808
    809				port@9 {
    810					reg = <0x9>;
    811
    812					xbar_admaif9_ep: endpoint {
    813						remote-endpoint = <&admaif9_ep>;
    814					};
    815				};
    816
    817				port@a {
    818					reg = <0xa>;
    819
    820					xbar_admaif10_ep: endpoint {
    821						remote-endpoint = <&admaif10_ep>;
    822					};
    823				};
    824
    825				port@b {
    826					reg = <0xb>;
    827
    828					xbar_admaif11_ep: endpoint {
    829						remote-endpoint = <&admaif11_ep>;
    830					};
    831				};
    832
    833				port@c {
    834					reg = <0xc>;
    835
    836					xbar_admaif12_ep: endpoint {
    837						remote-endpoint = <&admaif12_ep>;
    838					};
    839				};
    840
    841				port@d {
    842					reg = <0xd>;
    843
    844					xbar_admaif13_ep: endpoint {
    845						remote-endpoint = <&admaif13_ep>;
    846					};
    847				};
    848
    849				port@e {
    850					reg = <0xe>;
    851
    852					xbar_admaif14_ep: endpoint {
    853						remote-endpoint = <&admaif14_ep>;
    854					};
    855				};
    856
    857				port@f {
    858					reg = <0xf>;
    859
    860					xbar_admaif15_ep: endpoint {
    861						remote-endpoint = <&admaif15_ep>;
    862					};
    863				};
    864
    865				port@10 {
    866					reg = <0x10>;
    867
    868					xbar_admaif16_ep: endpoint {
    869						remote-endpoint = <&admaif16_ep>;
    870					};
    871				};
    872
    873				port@11 {
    874					reg = <0x11>;
    875
    876					xbar_admaif17_ep: endpoint {
    877						remote-endpoint = <&admaif17_ep>;
    878					};
    879				};
    880
    881				port@12 {
    882					reg = <0x12>;
    883
    884					xbar_admaif18_ep: endpoint {
    885						remote-endpoint = <&admaif18_ep>;
    886					};
    887				};
    888
    889				port@13 {
    890					reg = <0x13>;
    891
    892					xbar_admaif19_ep: endpoint {
    893						remote-endpoint = <&admaif19_ep>;
    894					};
    895				};
    896
    897				xbar_i2s1_port: port@14 {
    898					reg = <0x14>;
    899
    900					xbar_i2s1_ep: endpoint {
    901						remote-endpoint = <&i2s1_cif_ep>;
    902					};
    903				};
    904
    905				xbar_i2s3_port: port@16 {
    906					reg = <0x16>;
    907
    908					xbar_i2s3_ep: endpoint {
    909						remote-endpoint = <&i2s3_cif_ep>;
    910					};
    911				};
    912
    913				xbar_dmic1_port: port@1a {
    914					reg = <0x1a>;
    915
    916					xbar_dmic1_ep: endpoint {
    917						remote-endpoint = <&dmic1_cif_ep>;
    918					};
    919				};
    920
    921				xbar_dmic2_port: port@1b {
    922					reg = <0x1b>;
    923
    924					xbar_dmic2_ep: endpoint {
    925						remote-endpoint = <&dmic2_cif_ep>;
    926					};
    927				};
    928			};
    929
    930			admaif@290f000 {
    931				status = "okay";
    932
    933				ports {
    934					#address-cells = <1>;
    935					#size-cells = <0>;
    936
    937					admaif0_port: port@0 {
    938						reg = <0x0>;
    939
    940						admaif0_ep: endpoint {
    941							remote-endpoint = <&xbar_admaif0_ep>;
    942						};
    943					};
    944
    945					admaif1_port: port@1 {
    946						reg = <0x1>;
    947
    948						admaif1_ep: endpoint {
    949							remote-endpoint = <&xbar_admaif1_ep>;
    950						};
    951					};
    952
    953					admaif2_port: port@2 {
    954						reg = <0x2>;
    955
    956						admaif2_ep: endpoint {
    957							remote-endpoint = <&xbar_admaif2_ep>;
    958						};
    959					};
    960
    961					admaif3_port: port@3 {
    962						reg = <0x3>;
    963
    964						admaif3_ep: endpoint {
    965							remote-endpoint = <&xbar_admaif3_ep>;
    966						};
    967					};
    968
    969					admaif4_port: port@4 {
    970						reg = <0x4>;
    971
    972						admaif4_ep: endpoint {
    973							remote-endpoint = <&xbar_admaif4_ep>;
    974						};
    975					};
    976
    977					admaif5_port: port@5 {
    978						reg = <0x5>;
    979
    980						admaif5_ep: endpoint {
    981							remote-endpoint = <&xbar_admaif5_ep>;
    982						};
    983					};
    984
    985					admaif6_port: port@6 {
    986						reg = <0x6>;
    987
    988						admaif6_ep: endpoint {
    989							remote-endpoint = <&xbar_admaif6_ep>;
    990						};
    991					};
    992
    993					admaif7_port: port@7 {
    994						reg = <0x7>;
    995
    996						admaif7_ep: endpoint {
    997							remote-endpoint = <&xbar_admaif7_ep>;
    998						};
    999					};
   1000
   1001					admaif8_port: port@8 {
   1002						reg = <0x8>;
   1003
   1004						admaif8_ep: endpoint {
   1005							remote-endpoint = <&xbar_admaif8_ep>;
   1006						};
   1007					};
   1008
   1009					admaif9_port: port@9 {
   1010						reg = <0x9>;
   1011
   1012						admaif9_ep: endpoint {
   1013							remote-endpoint = <&xbar_admaif9_ep>;
   1014						};
   1015					};
   1016
   1017					admaif10_port: port@a {
   1018						reg = <0xa>;
   1019
   1020						admaif10_ep: endpoint {
   1021							remote-endpoint = <&xbar_admaif10_ep>;
   1022						};
   1023					};
   1024
   1025					admaif11_port: port@b {
   1026						reg = <0xb>;
   1027
   1028						admaif11_ep: endpoint {
   1029							remote-endpoint = <&xbar_admaif11_ep>;
   1030						};
   1031					};
   1032
   1033					admaif12_port: port@c {
   1034						reg = <0xc>;
   1035
   1036						admaif12_ep: endpoint {
   1037							remote-endpoint = <&xbar_admaif12_ep>;
   1038						};
   1039					};
   1040
   1041					admaif13_port: port@d {
   1042						reg = <0xd>;
   1043
   1044						admaif13_ep: endpoint {
   1045							remote-endpoint = <&xbar_admaif13_ep>;
   1046						};
   1047					};
   1048
   1049					admaif14_port: port@e {
   1050						reg = <0xe>;
   1051
   1052						admaif14_ep: endpoint {
   1053							remote-endpoint = <&xbar_admaif14_ep>;
   1054						};
   1055					};
   1056
   1057					admaif15_port: port@f {
   1058						reg = <0xf>;
   1059
   1060						admaif15_ep: endpoint {
   1061							remote-endpoint = <&xbar_admaif15_ep>;
   1062						};
   1063					};
   1064
   1065					admaif16_port: port@10 {
   1066						reg = <0x10>;
   1067
   1068						admaif16_ep: endpoint {
   1069							remote-endpoint = <&xbar_admaif16_ep>;
   1070						};
   1071					};
   1072
   1073					admaif17_port: port@11 {
   1074						reg = <0x11>;
   1075
   1076						admaif17_ep: endpoint {
   1077							remote-endpoint = <&xbar_admaif17_ep>;
   1078						};
   1079					};
   1080
   1081					admaif18_port: port@12 {
   1082						reg = <0x12>;
   1083
   1084						admaif18_ep: endpoint {
   1085							remote-endpoint = <&xbar_admaif18_ep>;
   1086						};
   1087					};
   1088
   1089					admaif19_port: port@13 {
   1090						reg = <0x13>;
   1091
   1092						admaif19_ep: endpoint {
   1093							remote-endpoint = <&xbar_admaif19_ep>;
   1094						};
   1095					};
   1096				};
   1097			};
   1098
   1099			i2s@2901000 {
   1100				status = "okay";
   1101
   1102				ports {
   1103					#address-cells = <1>;
   1104					#size-cells = <0>;
   1105
   1106					port@0 {
   1107						reg = <0>;
   1108
   1109						i2s1_cif_ep: endpoint {
   1110							remote-endpoint = <&xbar_i2s1_ep>;
   1111						};
   1112					};
   1113
   1114					i2s1_port: port@1 {
   1115						reg = <1>;
   1116
   1117						i2s1_dap_ep: endpoint {
   1118							dai-format = "i2s";
   1119							/* Placeholder for external Codec */
   1120						};
   1121					};
   1122				};
   1123			};
   1124
   1125			i2s@2901200 {
   1126				status = "okay";
   1127
   1128				ports {
   1129					#address-cells = <1>;
   1130					#size-cells = <0>;
   1131
   1132					port@0 {
   1133						reg = <0>;
   1134
   1135						i2s3_cif_ep: endpoint {
   1136							remote-endpoint = <&xbar_i2s3_ep>;
   1137						};
   1138					};
   1139
   1140					i2s3_port: port@1 {
   1141						reg = <1>;
   1142
   1143						i2s3_dap_ep: endpoint {
   1144							dai-format = "i2s";
   1145							/* Placeholder for external Codec */
   1146						};
   1147					};
   1148				};
   1149			};
   1150
   1151			dmic@2904000 {
   1152				status = "okay";
   1153
   1154				ports {
   1155					#address-cells = <1>;
   1156					#size-cells = <0>;
   1157
   1158					port@0 {
   1159						reg = <0>;
   1160
   1161						dmic1_cif_ep: endpoint {
   1162							remote-endpoint = <&xbar_dmic1_ep>;
   1163						};
   1164					};
   1165
   1166					dmic1_port: port@1 {
   1167						reg = <1>;
   1168
   1169						dmic1_dap_ep: endpoint {
   1170							/* Place holder for external Codec */
   1171						};
   1172					};
   1173				};
   1174			};
   1175
   1176			dmic@2904100 {
   1177				status = "okay";
   1178
   1179				ports {
   1180					#address-cells = <1>;
   1181					#size-cells = <0>;
   1182
   1183					port@0 {
   1184						reg = <0>;
   1185
   1186						dmic2_cif_ep: endpoint {
   1187							remote-endpoint = <&xbar_dmic2_ep>;
   1188						};
   1189					};
   1190
   1191					dmic2_port: port@1 {
   1192						reg = <1>;
   1193
   1194						dmic2_dap_ep: endpoint {
   1195							/* Place holder for external Codec */
   1196						};
   1197					};
   1198				};
   1199			};
   1200		};
   1201	};
   1202
   1203	sound {
   1204		compatible = "nvidia,tegra186-audio-graph-card";
   1205		status = "okay";
   1206
   1207		dais = /* FE */
   1208		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
   1209		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
   1210		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
   1211		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
   1212		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
   1213		       /* Router */
   1214		       <&xbar_i2s1_port>, <&xbar_i2s3_port>,
   1215		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
   1216		       /* I/O */
   1217		       <&i2s1_port>, <&i2s3_port>,
   1218		       <&dmic1_port>, <&dmic2_port>;
   1219
   1220		label = "NVIDIA Jetson TX2 NX APE";
   1221	};
   1222};