tegra194-p2972-0000.dts (43867B)
1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/linux-event-codes.h> 5#include <dt-bindings/input/gpio-keys.h> 6 7#include "tegra194-p2888.dtsi" 8 9/ { 10 model = "NVIDIA Jetson AGX Xavier Developer Kit"; 11 compatible = "nvidia,p2972-0000", "nvidia,tegra194"; 12 13 bus@0 { 14 aconnect@2900000 { 15 status = "okay"; 16 17 dma-controller@2930000 { 18 status = "okay"; 19 }; 20 21 interrupt-controller@2a40000 { 22 status = "okay"; 23 }; 24 25 ahub@2900800 { 26 status = "okay"; 27 28 ports { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 port@0 { 33 reg = <0x0>; 34 35 xbar_admaif0_ep: endpoint { 36 remote-endpoint = <&admaif0_ep>; 37 }; 38 }; 39 40 port@1 { 41 reg = <0x1>; 42 43 xbar_admaif1_ep: endpoint { 44 remote-endpoint = <&admaif1_ep>; 45 }; 46 }; 47 48 port@2 { 49 reg = <0x2>; 50 51 xbar_admaif2_ep: endpoint { 52 remote-endpoint = <&admaif2_ep>; 53 }; 54 }; 55 56 port@3 { 57 reg = <0x3>; 58 59 xbar_admaif3_ep: endpoint { 60 remote-endpoint = <&admaif3_ep>; 61 }; 62 }; 63 64 port@4 { 65 reg = <0x4>; 66 67 xbar_admaif4_ep: endpoint { 68 remote-endpoint = <&admaif4_ep>; 69 }; 70 }; 71 72 port@5 { 73 reg = <0x5>; 74 75 xbar_admaif5_ep: endpoint { 76 remote-endpoint = <&admaif5_ep>; 77 }; 78 }; 79 80 port@6 { 81 reg = <0x6>; 82 83 xbar_admaif6_ep: endpoint { 84 remote-endpoint = <&admaif6_ep>; 85 }; 86 }; 87 88 port@7 { 89 reg = <0x7>; 90 91 xbar_admaif7_ep: endpoint { 92 remote-endpoint = <&admaif7_ep>; 93 }; 94 }; 95 96 port@8 { 97 reg = <0x8>; 98 99 xbar_admaif8_ep: endpoint { 100 remote-endpoint = <&admaif8_ep>; 101 }; 102 }; 103 104 port@9 { 105 reg = <0x9>; 106 107 xbar_admaif9_ep: endpoint { 108 remote-endpoint = <&admaif9_ep>; 109 }; 110 }; 111 112 port@a { 113 reg = <0xa>; 114 115 xbar_admaif10_ep: endpoint { 116 remote-endpoint = <&admaif10_ep>; 117 }; 118 }; 119 120 port@b { 121 reg = <0xb>; 122 123 xbar_admaif11_ep: endpoint { 124 remote-endpoint = <&admaif11_ep>; 125 }; 126 }; 127 128 port@c { 129 reg = <0xc>; 130 131 xbar_admaif12_ep: endpoint { 132 remote-endpoint = <&admaif12_ep>; 133 }; 134 }; 135 136 port@d { 137 reg = <0xd>; 138 139 xbar_admaif13_ep: endpoint { 140 remote-endpoint = <&admaif13_ep>; 141 }; 142 }; 143 144 port@e { 145 reg = <0xe>; 146 147 xbar_admaif14_ep: endpoint { 148 remote-endpoint = <&admaif14_ep>; 149 }; 150 }; 151 152 port@f { 153 reg = <0xf>; 154 155 xbar_admaif15_ep: endpoint { 156 remote-endpoint = <&admaif15_ep>; 157 }; 158 }; 159 160 port@10 { 161 reg = <0x10>; 162 163 xbar_admaif16_ep: endpoint { 164 remote-endpoint = <&admaif16_ep>; 165 }; 166 }; 167 168 port@11 { 169 reg = <0x11>; 170 171 xbar_admaif17_ep: endpoint { 172 remote-endpoint = <&admaif17_ep>; 173 }; 174 }; 175 176 port@12 { 177 reg = <0x12>; 178 179 xbar_admaif18_ep: endpoint { 180 remote-endpoint = <&admaif18_ep>; 181 }; 182 }; 183 184 port@13 { 185 reg = <0x13>; 186 187 xbar_admaif19_ep: endpoint { 188 remote-endpoint = <&admaif19_ep>; 189 }; 190 }; 191 192 xbar_i2s1_port: port@14 { 193 reg = <0x14>; 194 195 xbar_i2s1_ep: endpoint { 196 remote-endpoint = <&i2s1_cif_ep>; 197 }; 198 }; 199 200 xbar_i2s2_port: port@15 { 201 reg = <0x15>; 202 203 xbar_i2s2_ep: endpoint { 204 remote-endpoint = <&i2s2_cif_ep>; 205 }; 206 }; 207 208 xbar_i2s4_port: port@17 { 209 reg = <0x17>; 210 211 xbar_i2s4_ep: endpoint { 212 remote-endpoint = <&i2s4_cif_ep>; 213 }; 214 }; 215 216 xbar_i2s6_port: port@19 { 217 reg = <0x19>; 218 219 xbar_i2s6_ep: endpoint { 220 remote-endpoint = <&i2s6_cif_ep>; 221 }; 222 }; 223 224 xbar_dmic3_port: port@1c { 225 reg = <0x1c>; 226 227 xbar_dmic3_ep: endpoint { 228 remote-endpoint = <&dmic3_cif_ep>; 229 }; 230 }; 231 232 xbar_sfc1_in_port: port@20 { 233 reg = <0x20>; 234 235 xbar_sfc1_in_ep: endpoint { 236 remote-endpoint = <&sfc1_cif_in_ep>; 237 }; 238 }; 239 240 port@21 { 241 reg = <0x21>; 242 243 xbar_sfc1_out_ep: endpoint { 244 remote-endpoint = <&sfc1_cif_out_ep>; 245 }; 246 }; 247 248 xbar_sfc2_in_port: port@22 { 249 reg = <0x22>; 250 251 xbar_sfc2_in_ep: endpoint { 252 remote-endpoint = <&sfc2_cif_in_ep>; 253 }; 254 }; 255 256 port@23 { 257 reg = <0x23>; 258 259 xbar_sfc2_out_ep: endpoint { 260 remote-endpoint = <&sfc2_cif_out_ep>; 261 }; 262 }; 263 264 xbar_sfc3_in_port: port@24 { 265 reg = <0x24>; 266 267 xbar_sfc3_in_ep: endpoint { 268 remote-endpoint = <&sfc3_cif_in_ep>; 269 }; 270 }; 271 272 port@25 { 273 reg = <0x25>; 274 275 xbar_sfc3_out_ep: endpoint { 276 remote-endpoint = <&sfc3_cif_out_ep>; 277 }; 278 }; 279 280 xbar_sfc4_in_port: port@26 { 281 reg = <0x26>; 282 283 xbar_sfc4_in_ep: endpoint { 284 remote-endpoint = <&sfc4_cif_in_ep>; 285 }; 286 }; 287 288 port@27 { 289 reg = <0x27>; 290 291 xbar_sfc4_out_ep: endpoint { 292 remote-endpoint = <&sfc4_cif_out_ep>; 293 }; 294 }; 295 296 xbar_mvc1_in_port: port@28 { 297 reg = <0x28>; 298 299 xbar_mvc1_in_ep: endpoint { 300 remote-endpoint = <&mvc1_cif_in_ep>; 301 }; 302 }; 303 304 port@29 { 305 reg = <0x29>; 306 307 xbar_mvc1_out_ep: endpoint { 308 remote-endpoint = <&mvc1_cif_out_ep>; 309 }; 310 }; 311 312 xbar_mvc2_in_port: port@2a { 313 reg = <0x2a>; 314 315 xbar_mvc2_in_ep: endpoint { 316 remote-endpoint = <&mvc2_cif_in_ep>; 317 }; 318 }; 319 320 port@2b { 321 reg = <0x2b>; 322 323 xbar_mvc2_out_ep: endpoint { 324 remote-endpoint = <&mvc2_cif_out_ep>; 325 }; 326 }; 327 328 xbar_amx1_in1_port: port@2c { 329 reg = <0x2c>; 330 331 xbar_amx1_in1_ep: endpoint { 332 remote-endpoint = <&amx1_in1_ep>; 333 }; 334 }; 335 336 xbar_amx1_in2_port: port@2d { 337 reg = <0x2d>; 338 339 xbar_amx1_in2_ep: endpoint { 340 remote-endpoint = <&amx1_in2_ep>; 341 }; 342 }; 343 344 xbar_amx1_in3_port: port@2e { 345 reg = <0x2e>; 346 347 xbar_amx1_in3_ep: endpoint { 348 remote-endpoint = <&amx1_in3_ep>; 349 }; 350 }; 351 352 xbar_amx1_in4_port: port@2f { 353 reg = <0x2f>; 354 355 xbar_amx1_in4_ep: endpoint { 356 remote-endpoint = <&amx1_in4_ep>; 357 }; 358 }; 359 360 port@30 { 361 reg = <0x30>; 362 363 xbar_amx1_out_ep: endpoint { 364 remote-endpoint = <&amx1_out_ep>; 365 }; 366 }; 367 368 xbar_amx2_in1_port: port@31 { 369 reg = <0x31>; 370 371 xbar_amx2_in1_ep: endpoint { 372 remote-endpoint = <&amx2_in1_ep>; 373 }; 374 }; 375 376 xbar_amx2_in2_port: port@32 { 377 reg = <0x32>; 378 379 xbar_amx2_in2_ep: endpoint { 380 remote-endpoint = <&amx2_in2_ep>; 381 }; 382 }; 383 384 xbar_amx2_in3_port: port@33 { 385 reg = <0x33>; 386 387 xbar_amx2_in3_ep: endpoint { 388 remote-endpoint = <&amx2_in3_ep>; 389 }; 390 }; 391 392 xbar_amx2_in4_port: port@34 { 393 reg = <0x34>; 394 395 xbar_amx2_in4_ep: endpoint { 396 remote-endpoint = <&amx2_in4_ep>; 397 }; 398 }; 399 400 port@35 { 401 reg = <0x35>; 402 403 xbar_amx2_out_ep: endpoint { 404 remote-endpoint = <&amx2_out_ep>; 405 }; 406 }; 407 408 xbar_amx3_in1_port: port@36 { 409 reg = <0x36>; 410 411 xbar_amx3_in1_ep: endpoint { 412 remote-endpoint = <&amx3_in1_ep>; 413 }; 414 }; 415 416 xbar_amx3_in2_port: port@37 { 417 reg = <0x37>; 418 419 xbar_amx3_in2_ep: endpoint { 420 remote-endpoint = <&amx3_in2_ep>; 421 }; 422 }; 423 424 xbar_amx3_in3_port: port@38 { 425 reg = <0x38>; 426 427 xbar_amx3_in3_ep: endpoint { 428 remote-endpoint = <&amx3_in3_ep>; 429 }; 430 }; 431 432 xbar_amx3_in4_port: port@39 { 433 reg = <0x39>; 434 435 xbar_amx3_in4_ep: endpoint { 436 remote-endpoint = <&amx3_in4_ep>; 437 }; 438 }; 439 440 port@3a { 441 reg = <0x3a>; 442 443 xbar_amx3_out_ep: endpoint { 444 remote-endpoint = <&amx3_out_ep>; 445 }; 446 }; 447 448 xbar_amx4_in1_port: port@3b { 449 reg = <0x3b>; 450 451 xbar_amx4_in1_ep: endpoint { 452 remote-endpoint = <&amx4_in1_ep>; 453 }; 454 }; 455 456 xbar_amx4_in2_port: port@3c { 457 reg = <0x3c>; 458 459 xbar_amx4_in2_ep: endpoint { 460 remote-endpoint = <&amx4_in2_ep>; 461 }; 462 }; 463 464 xbar_amx4_in3_port: port@3d { 465 reg = <0x3d>; 466 467 xbar_amx4_in3_ep: endpoint { 468 remote-endpoint = <&amx4_in3_ep>; 469 }; 470 }; 471 472 xbar_amx4_in4_port: port@3e { 473 reg = <0x3e>; 474 475 xbar_amx4_in4_ep: endpoint { 476 remote-endpoint = <&amx4_in4_ep>; 477 }; 478 }; 479 480 port@3f { 481 reg = <0x3f>; 482 483 xbar_amx4_out_ep: endpoint { 484 remote-endpoint = <&amx4_out_ep>; 485 }; 486 }; 487 488 xbar_adx1_in_port: port@40 { 489 reg = <0x40>; 490 491 xbar_adx1_in_ep: endpoint { 492 remote-endpoint = <&adx1_in_ep>; 493 }; 494 }; 495 496 port@41 { 497 reg = <0x41>; 498 499 xbar_adx1_out1_ep: endpoint { 500 remote-endpoint = <&adx1_out1_ep>; 501 }; 502 }; 503 504 port@42 { 505 reg = <0x42>; 506 507 xbar_adx1_out2_ep: endpoint { 508 remote-endpoint = <&adx1_out2_ep>; 509 }; 510 }; 511 512 port@43 { 513 reg = <0x43>; 514 515 xbar_adx1_out3_ep: endpoint { 516 remote-endpoint = <&adx1_out3_ep>; 517 }; 518 }; 519 520 port@44 { 521 reg = <0x44>; 522 523 xbar_adx1_out4_ep: endpoint { 524 remote-endpoint = <&adx1_out4_ep>; 525 }; 526 }; 527 528 xbar_adx2_in_port: port@45 { 529 reg = <0x45>; 530 531 xbar_adx2_in_ep: endpoint { 532 remote-endpoint = <&adx2_in_ep>; 533 }; 534 }; 535 536 port@46 { 537 reg = <0x46>; 538 539 xbar_adx2_out1_ep: endpoint { 540 remote-endpoint = <&adx2_out1_ep>; 541 }; 542 }; 543 544 port@47 { 545 reg = <0x47>; 546 547 xbar_adx2_out2_ep: endpoint { 548 remote-endpoint = <&adx2_out2_ep>; 549 }; 550 }; 551 552 port@48 { 553 reg = <0x48>; 554 555 xbar_adx2_out3_ep: endpoint { 556 remote-endpoint = <&adx2_out3_ep>; 557 }; 558 }; 559 560 port@49 { 561 reg = <0x49>; 562 563 xbar_adx2_out4_ep: endpoint { 564 remote-endpoint = <&adx2_out4_ep>; 565 }; 566 }; 567 568 xbar_adx3_in_port: port@4a { 569 reg = <0x4a>; 570 571 xbar_adx3_in_ep: endpoint { 572 remote-endpoint = <&adx3_in_ep>; 573 }; 574 }; 575 576 port@4b { 577 reg = <0x4b>; 578 579 xbar_adx3_out1_ep: endpoint { 580 remote-endpoint = <&adx3_out1_ep>; 581 }; 582 }; 583 584 port@4c { 585 reg = <0x4c>; 586 587 xbar_adx3_out2_ep: endpoint { 588 remote-endpoint = <&adx3_out2_ep>; 589 }; 590 }; 591 592 port@4d { 593 reg = <0x4d>; 594 595 xbar_adx3_out3_ep: endpoint { 596 remote-endpoint = <&adx3_out3_ep>; 597 }; 598 }; 599 600 port@4e { 601 reg = <0x4e>; 602 603 xbar_adx3_out4_ep: endpoint { 604 remote-endpoint = <&adx3_out4_ep>; 605 }; 606 }; 607 608 xbar_adx4_in_port: port@4f { 609 reg = <0x4f>; 610 611 xbar_adx4_in_ep: endpoint { 612 remote-endpoint = <&adx4_in_ep>; 613 }; 614 }; 615 616 port@50 { 617 reg = <0x50>; 618 619 xbar_adx4_out1_ep: endpoint { 620 remote-endpoint = <&adx4_out1_ep>; 621 }; 622 }; 623 624 port@51 { 625 reg = <0x51>; 626 627 xbar_adx4_out2_ep: endpoint { 628 remote-endpoint = <&adx4_out2_ep>; 629 }; 630 }; 631 632 port@52 { 633 reg = <0x52>; 634 635 xbar_adx4_out3_ep: endpoint { 636 remote-endpoint = <&adx4_out3_ep>; 637 }; 638 }; 639 640 port@53 { 641 reg = <0x53>; 642 643 xbar_adx4_out4_ep: endpoint { 644 remote-endpoint = <&adx4_out4_ep>; 645 }; 646 }; 647 648 xbar_mixer_in1_port: port@54 { 649 reg = <0x54>; 650 651 xbar_mixer_in1_ep: endpoint { 652 remote-endpoint = <&mixer_in1_ep>; 653 }; 654 }; 655 656 xbar_mixer_in2_port: port@55 { 657 reg = <0x55>; 658 659 xbar_mixer_in2_ep: endpoint { 660 remote-endpoint = <&mixer_in2_ep>; 661 }; 662 }; 663 664 xbar_mixer_in3_port: port@56 { 665 reg = <0x56>; 666 667 xbar_mixer_in3_ep: endpoint { 668 remote-endpoint = <&mixer_in3_ep>; 669 }; 670 }; 671 672 xbar_mixer_in4_port: port@57 { 673 reg = <0x57>; 674 675 xbar_mixer_in4_ep: endpoint { 676 remote-endpoint = <&mixer_in4_ep>; 677 }; 678 }; 679 680 xbar_mixer_in5_port: port@58 { 681 reg = <0x58>; 682 683 xbar_mixer_in5_ep: endpoint { 684 remote-endpoint = <&mixer_in5_ep>; 685 }; 686 }; 687 688 xbar_mixer_in6_port: port@59 { 689 reg = <0x59>; 690 691 xbar_mixer_in6_ep: endpoint { 692 remote-endpoint = <&mixer_in6_ep>; 693 }; 694 }; 695 696 xbar_mixer_in7_port: port@5a { 697 reg = <0x5a>; 698 699 xbar_mixer_in7_ep: endpoint { 700 remote-endpoint = <&mixer_in7_ep>; 701 }; 702 }; 703 704 xbar_mixer_in8_port: port@5b { 705 reg = <0x5b>; 706 707 xbar_mixer_in8_ep: endpoint { 708 remote-endpoint = <&mixer_in8_ep>; 709 }; 710 }; 711 712 xbar_mixer_in9_port: port@5c { 713 reg = <0x5c>; 714 715 xbar_mixer_in9_ep: endpoint { 716 remote-endpoint = <&mixer_in9_ep>; 717 }; 718 }; 719 720 xbar_mixer_in10_port: port@5d { 721 reg = <0x5d>; 722 723 xbar_mixer_in10_ep: endpoint { 724 remote-endpoint = <&mixer_in10_ep>; 725 }; 726 }; 727 728 port@5e { 729 reg = <0x5e>; 730 731 xbar_mixer_out1_ep: endpoint { 732 remote-endpoint = <&mixer_out1_ep>; 733 }; 734 }; 735 736 port@5f { 737 reg = <0x5f>; 738 739 xbar_mixer_out2_ep: endpoint { 740 remote-endpoint = <&mixer_out2_ep>; 741 }; 742 }; 743 744 port@60 { 745 reg = <0x60>; 746 747 xbar_mixer_out3_ep: endpoint { 748 remote-endpoint = <&mixer_out3_ep>; 749 }; 750 }; 751 752 port@61 { 753 reg = <0x61>; 754 755 xbar_mixer_out4_ep: endpoint { 756 remote-endpoint = <&mixer_out4_ep>; 757 }; 758 }; 759 760 port@62 { 761 reg = <0x62>; 762 763 xbar_mixer_out5_ep: endpoint { 764 remote-endpoint = <&mixer_out5_ep>; 765 }; 766 }; 767 768 xbar_asrc_in1_port: port@63 { 769 reg = <0x63>; 770 771 xbar_asrc_in1_ep: endpoint { 772 remote-endpoint = <&asrc_in1_ep>; 773 }; 774 }; 775 776 port@64 { 777 reg = <0x64>; 778 779 xbar_asrc_out1_ep: endpoint { 780 remote-endpoint = <&asrc_out1_ep>; 781 }; 782 }; 783 784 xbar_asrc_in2_port: port@65 { 785 reg = <0x65>; 786 787 xbar_asrc_in2_ep: endpoint { 788 remote-endpoint = <&asrc_in2_ep>; 789 }; 790 }; 791 792 port@66 { 793 reg = <0x66>; 794 795 xbar_asrc_out2_ep: endpoint { 796 remote-endpoint = <&asrc_out2_ep>; 797 }; 798 }; 799 800 xbar_asrc_in3_port: port@67 { 801 reg = <0x67>; 802 803 xbar_asrc_in3_ep: endpoint { 804 remote-endpoint = <&asrc_in3_ep>; 805 }; 806 }; 807 808 port@68 { 809 reg = <0x68>; 810 811 xbar_asrc_out3_ep: endpoint { 812 remote-endpoint = <&asrc_out3_ep>; 813 }; 814 }; 815 816 xbar_asrc_in4_port: port@69 { 817 reg = <0x69>; 818 819 xbar_asrc_in4_ep: endpoint { 820 remote-endpoint = <&asrc_in4_ep>; 821 }; 822 }; 823 824 port@6a { 825 reg = <0x6a>; 826 827 xbar_asrc_out4_ep: endpoint { 828 remote-endpoint = <&asrc_out4_ep>; 829 }; 830 }; 831 832 xbar_asrc_in5_port: port@6b { 833 reg = <0x6b>; 834 835 xbar_asrc_in5_ep: endpoint { 836 remote-endpoint = <&asrc_in5_ep>; 837 }; 838 }; 839 840 port@6c { 841 reg = <0x6c>; 842 843 xbar_asrc_out5_ep: endpoint { 844 remote-endpoint = <&asrc_out5_ep>; 845 }; 846 }; 847 848 xbar_asrc_in6_port: port@6d { 849 reg = <0x6d>; 850 851 xbar_asrc_in6_ep: endpoint { 852 remote-endpoint = <&asrc_in6_ep>; 853 }; 854 }; 855 856 port@6e { 857 reg = <0x6e>; 858 859 xbar_asrc_out6_ep: endpoint { 860 remote-endpoint = <&asrc_out6_ep>; 861 }; 862 }; 863 864 xbar_asrc_in7_port: port@6f { 865 reg = <0x6f>; 866 867 xbar_asrc_in7_ep: endpoint { 868 remote-endpoint = <&asrc_in7_ep>; 869 }; 870 }; 871 }; 872 873 admaif@290f000 { 874 status = "okay"; 875 876 ports { 877 #address-cells = <1>; 878 #size-cells = <0>; 879 880 admaif0_port: port@0 { 881 reg = <0x0>; 882 883 admaif0_ep: endpoint { 884 remote-endpoint = <&xbar_admaif0_ep>; 885 }; 886 }; 887 888 admaif1_port: port@1 { 889 reg = <0x1>; 890 891 admaif1_ep: endpoint { 892 remote-endpoint = <&xbar_admaif1_ep>; 893 }; 894 }; 895 896 admaif2_port: port@2 { 897 reg = <0x2>; 898 899 admaif2_ep: endpoint { 900 remote-endpoint = <&xbar_admaif2_ep>; 901 }; 902 }; 903 904 admaif3_port: port@3 { 905 reg = <0x3>; 906 907 admaif3_ep: endpoint { 908 remote-endpoint = <&xbar_admaif3_ep>; 909 }; 910 }; 911 912 admaif4_port: port@4 { 913 reg = <0x4>; 914 915 admaif4_ep: endpoint { 916 remote-endpoint = <&xbar_admaif4_ep>; 917 }; 918 }; 919 920 admaif5_port: port@5 { 921 reg = <0x5>; 922 923 admaif5_ep: endpoint { 924 remote-endpoint = <&xbar_admaif5_ep>; 925 }; 926 }; 927 928 admaif6_port: port@6 { 929 reg = <0x6>; 930 931 admaif6_ep: endpoint { 932 remote-endpoint = <&xbar_admaif6_ep>; 933 }; 934 }; 935 936 admaif7_port: port@7 { 937 reg = <0x7>; 938 939 admaif7_ep: endpoint { 940 remote-endpoint = <&xbar_admaif7_ep>; 941 }; 942 }; 943 944 admaif8_port: port@8 { 945 reg = <0x8>; 946 947 admaif8_ep: endpoint { 948 remote-endpoint = <&xbar_admaif8_ep>; 949 }; 950 }; 951 952 admaif9_port: port@9 { 953 reg = <0x9>; 954 955 admaif9_ep: endpoint { 956 remote-endpoint = <&xbar_admaif9_ep>; 957 }; 958 }; 959 960 admaif10_port: port@a { 961 reg = <0xa>; 962 963 admaif10_ep: endpoint { 964 remote-endpoint = <&xbar_admaif10_ep>; 965 }; 966 }; 967 968 admaif11_port: port@b { 969 reg = <0xb>; 970 971 admaif11_ep: endpoint { 972 remote-endpoint = <&xbar_admaif11_ep>; 973 }; 974 }; 975 976 admaif12_port: port@c { 977 reg = <0xc>; 978 979 admaif12_ep: endpoint { 980 remote-endpoint = <&xbar_admaif12_ep>; 981 }; 982 }; 983 984 admaif13_port: port@d { 985 reg = <0xd>; 986 987 admaif13_ep: endpoint { 988 remote-endpoint = <&xbar_admaif13_ep>; 989 }; 990 }; 991 992 admaif14_port: port@e { 993 reg = <0xe>; 994 995 admaif14_ep: endpoint { 996 remote-endpoint = <&xbar_admaif14_ep>; 997 }; 998 }; 999 1000 admaif15_port: port@f { 1001 reg = <0xf>; 1002 1003 admaif15_ep: endpoint { 1004 remote-endpoint = <&xbar_admaif15_ep>; 1005 }; 1006 }; 1007 1008 admaif16_port: port@10 { 1009 reg = <0x10>; 1010 1011 admaif16_ep: endpoint { 1012 remote-endpoint = <&xbar_admaif16_ep>; 1013 }; 1014 }; 1015 1016 admaif17_port: port@11 { 1017 reg = <0x11>; 1018 1019 admaif17_ep: endpoint { 1020 remote-endpoint = <&xbar_admaif17_ep>; 1021 }; 1022 }; 1023 1024 admaif18_port: port@12 { 1025 reg = <0x12>; 1026 1027 admaif18_ep: endpoint { 1028 remote-endpoint = <&xbar_admaif18_ep>; 1029 }; 1030 }; 1031 1032 admaif19_port: port@13 { 1033 reg = <0x13>; 1034 1035 admaif19_ep: endpoint { 1036 remote-endpoint = <&xbar_admaif19_ep>; 1037 }; 1038 }; 1039 }; 1040 }; 1041 1042 i2s@2901000 { 1043 status = "okay"; 1044 1045 ports { 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 1049 port@0 { 1050 reg = <0>; 1051 1052 i2s1_cif_ep: endpoint { 1053 remote-endpoint = <&xbar_i2s1_ep>; 1054 }; 1055 }; 1056 1057 i2s1_port: port@1 { 1058 reg = <1>; 1059 1060 i2s1_dap_ep: endpoint { 1061 dai-format = "i2s"; 1062 remote-endpoint = <&rt5658_ep>; 1063 }; 1064 }; 1065 }; 1066 }; 1067 1068 i2s@2901100 { 1069 status = "okay"; 1070 1071 ports { 1072 #address-cells = <1>; 1073 #size-cells = <0>; 1074 1075 port@0 { 1076 reg = <0>; 1077 1078 i2s2_cif_ep: endpoint { 1079 remote-endpoint = <&xbar_i2s2_ep>; 1080 }; 1081 }; 1082 1083 i2s2_port: port@1 { 1084 reg = <1>; 1085 1086 i2s2_dap_ep: endpoint { 1087 dai-format = "i2s"; 1088 /* Place holder for external Codec */ 1089 }; 1090 }; 1091 }; 1092 }; 1093 1094 i2s@2901300 { 1095 status = "okay"; 1096 1097 ports { 1098 #address-cells = <1>; 1099 #size-cells = <0>; 1100 1101 port@0 { 1102 reg = <0>; 1103 1104 i2s4_cif_ep: endpoint { 1105 remote-endpoint = <&xbar_i2s4_ep>; 1106 }; 1107 }; 1108 1109 i2s4_port: port@1 { 1110 reg = <1>; 1111 1112 i2s4_dap_ep: endpoint { 1113 dai-format = "i2s"; 1114 /* Place holder for external Codec */ 1115 }; 1116 }; 1117 }; 1118 }; 1119 1120 i2s@2901500 { 1121 status = "okay"; 1122 1123 ports { 1124 #address-cells = <1>; 1125 #size-cells = <0>; 1126 1127 port@0 { 1128 reg = <0>; 1129 1130 i2s6_cif_ep: endpoint { 1131 remote-endpoint = <&xbar_i2s6_ep>; 1132 }; 1133 }; 1134 1135 i2s6_port: port@1 { 1136 reg = <1>; 1137 1138 i2s6_dap_ep: endpoint { 1139 dai-format = "i2s"; 1140 /* Place holder for external Codec */ 1141 }; 1142 }; 1143 }; 1144 }; 1145 1146 dmic@2904200 { 1147 status = "okay"; 1148 1149 ports { 1150 #address-cells = <1>; 1151 #size-cells = <0>; 1152 1153 port@0 { 1154 reg = <0>; 1155 1156 dmic3_cif_ep: endpoint { 1157 remote-endpoint = <&xbar_dmic3_ep>; 1158 }; 1159 }; 1160 1161 dmic3_port: port@1 { 1162 reg = <1>; 1163 1164 dmic3_dap_ep: endpoint { 1165 /* Place holder for external Codec */ 1166 }; 1167 }; 1168 }; 1169 }; 1170 1171 sfc@2902000 { 1172 status = "okay"; 1173 1174 ports { 1175 #address-cells = <1>; 1176 #size-cells = <0>; 1177 1178 port@0 { 1179 reg = <0>; 1180 1181 sfc1_cif_in_ep: endpoint { 1182 remote-endpoint = <&xbar_sfc1_in_ep>; 1183 }; 1184 }; 1185 1186 sfc1_out_port: port@1 { 1187 reg = <1>; 1188 1189 sfc1_cif_out_ep: endpoint { 1190 remote-endpoint = <&xbar_sfc1_out_ep>; 1191 }; 1192 }; 1193 }; 1194 }; 1195 1196 sfc@2902200 { 1197 status = "okay"; 1198 1199 ports { 1200 #address-cells = <1>; 1201 #size-cells = <0>; 1202 1203 port@0 { 1204 reg = <0>; 1205 1206 sfc2_cif_in_ep: endpoint { 1207 remote-endpoint = <&xbar_sfc2_in_ep>; 1208 }; 1209 }; 1210 1211 sfc2_out_port: port@1 { 1212 reg = <1>; 1213 1214 sfc2_cif_out_ep: endpoint { 1215 remote-endpoint = <&xbar_sfc2_out_ep>; 1216 }; 1217 }; 1218 }; 1219 }; 1220 1221 sfc@2902400 { 1222 status = "okay"; 1223 1224 ports { 1225 #address-cells = <1>; 1226 #size-cells = <0>; 1227 1228 port@0 { 1229 reg = <0>; 1230 1231 sfc3_cif_in_ep: endpoint { 1232 remote-endpoint = <&xbar_sfc3_in_ep>; 1233 }; 1234 }; 1235 1236 sfc3_out_port: port@1 { 1237 reg = <1>; 1238 1239 sfc3_cif_out_ep: endpoint { 1240 remote-endpoint = <&xbar_sfc3_out_ep>; 1241 }; 1242 }; 1243 }; 1244 }; 1245 1246 sfc@2902600 { 1247 status = "okay"; 1248 1249 ports { 1250 #address-cells = <1>; 1251 #size-cells = <0>; 1252 1253 port@0 { 1254 reg = <0>; 1255 1256 sfc4_cif_in_ep: endpoint { 1257 remote-endpoint = <&xbar_sfc4_in_ep>; 1258 }; 1259 }; 1260 1261 sfc4_out_port: port@1 { 1262 reg = <1>; 1263 1264 sfc4_cif_out_ep: endpoint { 1265 remote-endpoint = <&xbar_sfc4_out_ep>; 1266 }; 1267 }; 1268 }; 1269 }; 1270 1271 mvc@290a000 { 1272 status = "okay"; 1273 1274 ports { 1275 #address-cells = <1>; 1276 #size-cells = <0>; 1277 1278 port@0 { 1279 reg = <0>; 1280 1281 mvc1_cif_in_ep: endpoint { 1282 remote-endpoint = <&xbar_mvc1_in_ep>; 1283 }; 1284 }; 1285 1286 mvc1_out_port: port@1 { 1287 reg = <1>; 1288 1289 mvc1_cif_out_ep: endpoint { 1290 remote-endpoint = <&xbar_mvc1_out_ep>; 1291 }; 1292 }; 1293 }; 1294 }; 1295 1296 mvc@290a200 { 1297 status = "okay"; 1298 1299 ports { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 port@0 { 1304 reg = <0>; 1305 1306 mvc2_cif_in_ep: endpoint { 1307 remote-endpoint = <&xbar_mvc2_in_ep>; 1308 }; 1309 }; 1310 1311 mvc2_out_port: port@1 { 1312 reg = <1>; 1313 1314 mvc2_cif_out_ep: endpoint { 1315 remote-endpoint = <&xbar_mvc2_out_ep>; 1316 }; 1317 }; 1318 }; 1319 }; 1320 1321 amx@2903000 { 1322 status = "okay"; 1323 1324 ports { 1325 #address-cells = <1>; 1326 #size-cells = <0>; 1327 1328 port@0 { 1329 reg = <0>; 1330 1331 amx1_in1_ep: endpoint { 1332 remote-endpoint = <&xbar_amx1_in1_ep>; 1333 }; 1334 }; 1335 1336 port@1 { 1337 reg = <1>; 1338 1339 amx1_in2_ep: endpoint { 1340 remote-endpoint = <&xbar_amx1_in2_ep>; 1341 }; 1342 }; 1343 1344 port@2 { 1345 reg = <2>; 1346 1347 amx1_in3_ep: endpoint { 1348 remote-endpoint = <&xbar_amx1_in3_ep>; 1349 }; 1350 }; 1351 1352 port@3 { 1353 reg = <3>; 1354 1355 amx1_in4_ep: endpoint { 1356 remote-endpoint = <&xbar_amx1_in4_ep>; 1357 }; 1358 }; 1359 1360 amx1_out_port: port@4 { 1361 reg = <4>; 1362 1363 amx1_out_ep: endpoint { 1364 remote-endpoint = <&xbar_amx1_out_ep>; 1365 }; 1366 }; 1367 }; 1368 }; 1369 1370 amx@2903100 { 1371 status = "okay"; 1372 1373 ports { 1374 #address-cells = <1>; 1375 #size-cells = <0>; 1376 1377 port@0 { 1378 reg = <0>; 1379 1380 amx2_in1_ep: endpoint { 1381 remote-endpoint = <&xbar_amx2_in1_ep>; 1382 }; 1383 }; 1384 1385 port@1 { 1386 reg = <1>; 1387 1388 amx2_in2_ep: endpoint { 1389 remote-endpoint = <&xbar_amx2_in2_ep>; 1390 }; 1391 }; 1392 1393 amx2_in3_port: port@2 { 1394 reg = <2>; 1395 1396 amx2_in3_ep: endpoint { 1397 remote-endpoint = <&xbar_amx2_in3_ep>; 1398 }; 1399 }; 1400 1401 amx2_in4_port: port@3 { 1402 reg = <3>; 1403 1404 amx2_in4_ep: endpoint { 1405 remote-endpoint = <&xbar_amx2_in4_ep>; 1406 }; 1407 }; 1408 1409 amx2_out_port: port@4 { 1410 reg = <4>; 1411 1412 amx2_out_ep: endpoint { 1413 remote-endpoint = <&xbar_amx2_out_ep>; 1414 }; 1415 }; 1416 }; 1417 }; 1418 1419 amx@2903200 { 1420 status = "okay"; 1421 1422 ports { 1423 #address-cells = <1>; 1424 #size-cells = <0>; 1425 1426 port@0 { 1427 reg = <0>; 1428 1429 amx3_in1_ep: endpoint { 1430 remote-endpoint = <&xbar_amx3_in1_ep>; 1431 }; 1432 }; 1433 1434 port@1 { 1435 reg = <1>; 1436 1437 amx3_in2_ep: endpoint { 1438 remote-endpoint = <&xbar_amx3_in2_ep>; 1439 }; 1440 }; 1441 1442 port@2 { 1443 reg = <2>; 1444 1445 amx3_in3_ep: endpoint { 1446 remote-endpoint = <&xbar_amx3_in3_ep>; 1447 }; 1448 }; 1449 1450 port@3 { 1451 reg = <3>; 1452 1453 amx3_in4_ep: endpoint { 1454 remote-endpoint = <&xbar_amx3_in4_ep>; 1455 }; 1456 }; 1457 1458 amx3_out_port: port@4 { 1459 reg = <4>; 1460 1461 amx3_out_ep: endpoint { 1462 remote-endpoint = <&xbar_amx3_out_ep>; 1463 }; 1464 }; 1465 }; 1466 }; 1467 1468 amx@2903300 { 1469 status = "okay"; 1470 1471 ports { 1472 #address-cells = <1>; 1473 #size-cells = <0>; 1474 1475 port@0 { 1476 reg = <0>; 1477 1478 amx4_in1_ep: endpoint { 1479 remote-endpoint = <&xbar_amx4_in1_ep>; 1480 }; 1481 }; 1482 1483 port@1 { 1484 reg = <1>; 1485 1486 amx4_in2_ep: endpoint { 1487 remote-endpoint = <&xbar_amx4_in2_ep>; 1488 }; 1489 }; 1490 1491 port@2 { 1492 reg = <2>; 1493 1494 amx4_in3_ep: endpoint { 1495 remote-endpoint = <&xbar_amx4_in3_ep>; 1496 }; 1497 }; 1498 1499 port@3 { 1500 reg = <3>; 1501 1502 amx4_in4_ep: endpoint { 1503 remote-endpoint = <&xbar_amx4_in4_ep>; 1504 }; 1505 }; 1506 1507 amx4_out_port: port@4 { 1508 reg = <4>; 1509 1510 amx4_out_ep: endpoint { 1511 remote-endpoint = <&xbar_amx4_out_ep>; 1512 }; 1513 }; 1514 }; 1515 }; 1516 1517 adx@2903800 { 1518 status = "okay"; 1519 1520 ports { 1521 #address-cells = <1>; 1522 #size-cells = <0>; 1523 1524 port@0 { 1525 reg = <0>; 1526 1527 adx1_in_ep: endpoint { 1528 remote-endpoint = <&xbar_adx1_in_ep>; 1529 }; 1530 }; 1531 1532 adx1_out1_port: port@1 { 1533 reg = <1>; 1534 1535 adx1_out1_ep: endpoint { 1536 remote-endpoint = <&xbar_adx1_out1_ep>; 1537 }; 1538 }; 1539 1540 adx1_out2_port: port@2 { 1541 reg = <2>; 1542 1543 adx1_out2_ep: endpoint { 1544 remote-endpoint = <&xbar_adx1_out2_ep>; 1545 }; 1546 }; 1547 1548 adx1_out3_port: port@3 { 1549 reg = <3>; 1550 1551 adx1_out3_ep: endpoint { 1552 remote-endpoint = <&xbar_adx1_out3_ep>; 1553 }; 1554 }; 1555 1556 adx1_out4_port: port@4 { 1557 reg = <4>; 1558 1559 adx1_out4_ep: endpoint { 1560 remote-endpoint = <&xbar_adx1_out4_ep>; 1561 }; 1562 }; 1563 }; 1564 }; 1565 1566 adx@2903900 { 1567 status = "okay"; 1568 1569 ports { 1570 #address-cells = <1>; 1571 #size-cells = <0>; 1572 1573 port@0 { 1574 reg = <0>; 1575 1576 adx2_in_ep: endpoint { 1577 remote-endpoint = <&xbar_adx2_in_ep>; 1578 }; 1579 }; 1580 1581 adx2_out1_port: port@1 { 1582 reg = <1>; 1583 1584 adx2_out1_ep: endpoint { 1585 remote-endpoint = <&xbar_adx2_out1_ep>; 1586 }; 1587 }; 1588 1589 adx2_out2_port: port@2 { 1590 reg = <2>; 1591 1592 adx2_out2_ep: endpoint { 1593 remote-endpoint = <&xbar_adx2_out2_ep>; 1594 }; 1595 }; 1596 1597 adx2_out3_port: port@3 { 1598 reg = <3>; 1599 1600 adx2_out3_ep: endpoint { 1601 remote-endpoint = <&xbar_adx2_out3_ep>; 1602 }; 1603 }; 1604 1605 adx2_out4_port: port@4 { 1606 reg = <4>; 1607 1608 adx2_out4_ep: endpoint { 1609 remote-endpoint = <&xbar_adx2_out4_ep>; 1610 }; 1611 }; 1612 }; 1613 }; 1614 1615 adx@2903a00 { 1616 status = "okay"; 1617 1618 ports { 1619 #address-cells = <1>; 1620 #size-cells = <0>; 1621 1622 port@0 { 1623 reg = <0>; 1624 1625 adx3_in_ep: endpoint { 1626 remote-endpoint = <&xbar_adx3_in_ep>; 1627 }; 1628 }; 1629 1630 adx3_out1_port: port@1 { 1631 reg = <1>; 1632 1633 adx3_out1_ep: endpoint { 1634 remote-endpoint = <&xbar_adx3_out1_ep>; 1635 }; 1636 }; 1637 1638 adx3_out2_port: port@2 { 1639 reg = <2>; 1640 1641 adx3_out2_ep: endpoint { 1642 remote-endpoint = <&xbar_adx3_out2_ep>; 1643 }; 1644 }; 1645 1646 adx3_out3_port: port@3 { 1647 reg = <3>; 1648 1649 adx3_out3_ep: endpoint { 1650 remote-endpoint = <&xbar_adx3_out3_ep>; 1651 }; 1652 }; 1653 1654 adx3_out4_port: port@4 { 1655 reg = <4>; 1656 1657 adx3_out4_ep: endpoint { 1658 remote-endpoint = <&xbar_adx3_out4_ep>; 1659 }; 1660 }; 1661 }; 1662 }; 1663 1664 adx@2903b00 { 1665 status = "okay"; 1666 1667 ports { 1668 #address-cells = <1>; 1669 #size-cells = <0>; 1670 1671 port@0 { 1672 reg = <0>; 1673 1674 adx4_in_ep: endpoint { 1675 remote-endpoint = <&xbar_adx4_in_ep>; 1676 }; 1677 }; 1678 1679 adx4_out1_port: port@1 { 1680 reg = <1>; 1681 1682 adx4_out1_ep: endpoint { 1683 remote-endpoint = <&xbar_adx4_out1_ep>; 1684 }; 1685 }; 1686 1687 adx4_out2_port: port@2 { 1688 reg = <2>; 1689 1690 adx4_out2_ep: endpoint { 1691 remote-endpoint = <&xbar_adx4_out2_ep>; 1692 }; 1693 }; 1694 1695 adx4_out3_port: port@3 { 1696 reg = <3>; 1697 1698 adx4_out3_ep: endpoint { 1699 remote-endpoint = <&xbar_adx4_out3_ep>; 1700 }; 1701 }; 1702 1703 adx4_out4_port: port@4 { 1704 reg = <4>; 1705 1706 adx4_out4_ep: endpoint { 1707 remote-endpoint = <&xbar_adx4_out4_ep>; 1708 }; 1709 }; 1710 }; 1711 }; 1712 1713 amixer@290bb00 { 1714 status = "okay"; 1715 1716 ports { 1717 #address-cells = <1>; 1718 #size-cells = <0>; 1719 1720 port@0 { 1721 reg = <0x0>; 1722 1723 mixer_in1_ep: endpoint { 1724 remote-endpoint = <&xbar_mixer_in1_ep>; 1725 }; 1726 }; 1727 1728 port@1 { 1729 reg = <0x1>; 1730 1731 mixer_in2_ep: endpoint { 1732 remote-endpoint = <&xbar_mixer_in2_ep>; 1733 }; 1734 }; 1735 1736 port@2 { 1737 reg = <0x2>; 1738 1739 mixer_in3_ep: endpoint { 1740 remote-endpoint = <&xbar_mixer_in3_ep>; 1741 }; 1742 }; 1743 1744 port@3 { 1745 reg = <0x3>; 1746 1747 mixer_in4_ep: endpoint { 1748 remote-endpoint = <&xbar_mixer_in4_ep>; 1749 }; 1750 }; 1751 1752 port@4 { 1753 reg = <0x4>; 1754 1755 mixer_in5_ep: endpoint { 1756 remote-endpoint = <&xbar_mixer_in5_ep>; 1757 }; 1758 }; 1759 1760 port@5 { 1761 reg = <0x5>; 1762 1763 mixer_in6_ep: endpoint { 1764 remote-endpoint = <&xbar_mixer_in6_ep>; 1765 }; 1766 }; 1767 1768 port@6 { 1769 reg = <0x6>; 1770 1771 mixer_in7_ep: endpoint { 1772 remote-endpoint = <&xbar_mixer_in7_ep>; 1773 }; 1774 }; 1775 1776 port@7 { 1777 reg = <0x7>; 1778 1779 mixer_in8_ep: endpoint { 1780 remote-endpoint = <&xbar_mixer_in8_ep>; 1781 }; 1782 }; 1783 1784 port@8 { 1785 reg = <0x8>; 1786 1787 mixer_in9_ep: endpoint { 1788 remote-endpoint = <&xbar_mixer_in9_ep>; 1789 }; 1790 }; 1791 1792 port@9 { 1793 reg = <0x9>; 1794 1795 mixer_in10_ep: endpoint { 1796 remote-endpoint = <&xbar_mixer_in10_ep>; 1797 }; 1798 }; 1799 1800 mixer_out1_port: port@a { 1801 reg = <0xa>; 1802 1803 mixer_out1_ep: endpoint { 1804 remote-endpoint = <&xbar_mixer_out1_ep>; 1805 }; 1806 }; 1807 1808 mixer_out2_port: port@b { 1809 reg = <0xb>; 1810 1811 mixer_out2_ep: endpoint { 1812 remote-endpoint = <&xbar_mixer_out2_ep>; 1813 }; 1814 }; 1815 1816 mixer_out3_port: port@c { 1817 reg = <0xc>; 1818 1819 mixer_out3_ep: endpoint { 1820 remote-endpoint = <&xbar_mixer_out3_ep>; 1821 }; 1822 }; 1823 1824 mixer_out4_port: port@d { 1825 reg = <0xd>; 1826 1827 mixer_out4_ep: endpoint { 1828 remote-endpoint = <&xbar_mixer_out4_ep>; 1829 }; 1830 }; 1831 1832 mixer_out5_port: port@e { 1833 reg = <0xe>; 1834 1835 mixer_out5_ep: endpoint { 1836 remote-endpoint = <&xbar_mixer_out5_ep>; 1837 }; 1838 }; 1839 }; 1840 }; 1841 1842 asrc@2910000 { 1843 status = "okay"; 1844 1845 ports { 1846 #address-cells = <1>; 1847 #size-cells = <0>; 1848 1849 port@0 { 1850 reg = <0x0>; 1851 1852 asrc_in1_ep: endpoint { 1853 remote-endpoint = <&xbar_asrc_in1_ep>; 1854 }; 1855 }; 1856 1857 port@1 { 1858 reg = <0x1>; 1859 1860 asrc_in2_ep: endpoint { 1861 remote-endpoint = <&xbar_asrc_in2_ep>; 1862 }; 1863 }; 1864 1865 port@2 { 1866 reg = <0x2>; 1867 1868 asrc_in3_ep: endpoint { 1869 remote-endpoint = <&xbar_asrc_in3_ep>; 1870 }; 1871 }; 1872 1873 port@3 { 1874 reg = <0x3>; 1875 1876 asrc_in4_ep: endpoint { 1877 remote-endpoint = <&xbar_asrc_in4_ep>; 1878 }; 1879 }; 1880 1881 port@4 { 1882 reg = <0x4>; 1883 1884 asrc_in5_ep: endpoint { 1885 remote-endpoint = <&xbar_asrc_in5_ep>; 1886 }; 1887 }; 1888 1889 port@5 { 1890 reg = <0x5>; 1891 1892 asrc_in6_ep: endpoint { 1893 remote-endpoint = <&xbar_asrc_in6_ep>; 1894 }; 1895 }; 1896 1897 port@6 { 1898 reg = <0x6>; 1899 1900 asrc_in7_ep: endpoint { 1901 remote-endpoint = <&xbar_asrc_in7_ep>; 1902 }; 1903 }; 1904 1905 asrc_out1_port: port@7 { 1906 reg = <0x7>; 1907 1908 asrc_out1_ep: endpoint { 1909 remote-endpoint = <&xbar_asrc_out1_ep>; 1910 }; 1911 }; 1912 1913 asrc_out2_port: port@8 { 1914 reg = <0x8>; 1915 1916 asrc_out2_ep: endpoint { 1917 remote-endpoint = <&xbar_asrc_out2_ep>; 1918 }; 1919 }; 1920 1921 asrc_out3_port: port@9 { 1922 reg = <0x9>; 1923 1924 asrc_out3_ep: endpoint { 1925 remote-endpoint = <&xbar_asrc_out3_ep>; 1926 }; 1927 }; 1928 1929 asrc_out4_port: port@a { 1930 reg = <0xa>; 1931 1932 asrc_out4_ep: endpoint { 1933 remote-endpoint = <&xbar_asrc_out4_ep>; 1934 }; 1935 }; 1936 1937 asrc_out5_port: port@b { 1938 reg = <0xb>; 1939 1940 asrc_out5_ep: endpoint { 1941 remote-endpoint = <&xbar_asrc_out5_ep>; 1942 }; 1943 }; 1944 1945 asrc_out6_port: port@c { 1946 reg = <0xc>; 1947 1948 asrc_out6_ep: endpoint { 1949 remote-endpoint = <&xbar_asrc_out6_ep>; 1950 }; 1951 }; 1952 }; 1953 }; 1954 }; 1955 }; 1956 1957 i2c@3160000 { 1958 eeprom@56 { 1959 compatible = "atmel,24c02"; 1960 reg = <0x56>; 1961 1962 label = "system"; 1963 vcc-supply = <&vdd_1v8ls>; 1964 address-width = <8>; 1965 pagesize = <8>; 1966 size = <256>; 1967 read-only; 1968 }; 1969 }; 1970 1971 ddc: i2c@31c0000 { 1972 status = "okay"; 1973 }; 1974 1975 /* SDMMC1 (SD/MMC) */ 1976 mmc@3400000 { 1977 status = "okay"; 1978 }; 1979 1980 hda@3510000 { 1981 nvidia,model = "NVIDIA Jetson AGX Xavier HDA"; 1982 status = "okay"; 1983 }; 1984 1985 padctl@3520000 { 1986 status = "okay"; 1987 1988 pads { 1989 usb2 { 1990 lanes { 1991 usb2-0 { 1992 status = "okay"; 1993 }; 1994 1995 usb2-1 { 1996 status = "okay"; 1997 }; 1998 1999 usb2-3 { 2000 status = "okay"; 2001 }; 2002 }; 2003 }; 2004 2005 usb3 { 2006 lanes { 2007 usb3-0 { 2008 status = "okay"; 2009 }; 2010 2011 usb3-2 { 2012 status = "okay"; 2013 }; 2014 2015 usb3-3 { 2016 status = "okay"; 2017 }; 2018 }; 2019 }; 2020 }; 2021 2022 ports { 2023 usb2-0 { 2024 mode = "host"; 2025 status = "okay"; 2026 }; 2027 2028 usb2-1 { 2029 mode = "host"; 2030 status = "okay"; 2031 }; 2032 2033 usb2-3 { 2034 mode = "host"; 2035 status = "okay"; 2036 }; 2037 2038 usb3-0 { 2039 nvidia,usb2-companion = <1>; 2040 status = "okay"; 2041 }; 2042 2043 usb3-2 { 2044 nvidia,usb2-companion = <0>; 2045 status = "okay"; 2046 }; 2047 2048 usb3-3 { 2049 nvidia,usb2-companion = <3>; 2050 maximum-speed = "super-speed"; 2051 status = "okay"; 2052 }; 2053 }; 2054 }; 2055 2056 usb@3610000 { 2057 status = "okay"; 2058 2059 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>, 2060 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>, 2061 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>, 2062 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>, 2063 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>, 2064 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>; 2065 phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3"; 2066 }; 2067 2068 i2c@c250000 { 2069 status = "okay"; 2070 2071 rt5658: audio-codec@1a { 2072 status = "okay"; 2073 2074 compatible = "realtek,rt5658"; 2075 reg = <0x1a>; 2076 interrupt-parent = <&gpio>; 2077 interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>; 2078 clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>; 2079 clock-names = "mclk"; 2080 realtek,jd-src = <2>; 2081 sound-name-prefix = "CVB-RT"; 2082 2083 port { 2084 rt5658_ep: endpoint { 2085 remote-endpoint = <&i2s1_dap_ep>; 2086 mclk-fs = <256>; 2087 }; 2088 }; 2089 }; 2090 }; 2091 2092 pwm@c340000 { 2093 status = "okay"; 2094 }; 2095 2096 host1x@13e00000 { 2097 display-hub@15200000 { 2098 status = "okay"; 2099 }; 2100 2101 dpaux@155c0000 { 2102 status = "okay"; 2103 }; 2104 2105 dpaux@155d0000 { 2106 status = "okay"; 2107 }; 2108 2109 dpaux@155e0000 { 2110 status = "okay"; 2111 }; 2112 2113 /* DP0 */ 2114 sor@15b00000 { 2115 status = "okay"; 2116 2117 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 2118 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 2119 2120 nvidia,dpaux = <&dpaux0>; 2121 }; 2122 2123 /* DP1 */ 2124 sor@15b40000 { 2125 status = "okay"; 2126 2127 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 2128 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 2129 2130 nvidia,dpaux = <&dpaux1>; 2131 }; 2132 2133 /* HDMI */ 2134 sor@15b80000 { 2135 status = "okay"; 2136 2137 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 2138 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 2139 hdmi-supply = <&vdd_hdmi>; 2140 2141 nvidia,ddc-i2c-bus = <&ddc>; 2142 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2) 2143 GPIO_ACTIVE_LOW>; 2144 }; 2145 }; 2146 }; 2147 2148 pcie@14100000 { 2149 status = "okay"; 2150 2151 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2152 2153 phys = <&p2u_hsio_0>; 2154 phy-names = "p2u-0"; 2155 }; 2156 2157 pcie@14140000 { 2158 status = "okay"; 2159 2160 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2161 2162 phys = <&p2u_hsio_7>; 2163 phy-names = "p2u-0"; 2164 }; 2165 2166 pcie@14180000 { 2167 status = "okay"; 2168 2169 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2170 2171 phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>, 2172 <&p2u_hsio_5>; 2173 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; 2174 }; 2175 2176 pcie@141a0000 { 2177 status = "okay"; 2178 2179 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2180 vpcie3v3-supply = <&vdd_3v3_pcie>; 2181 vpcie12v-supply = <&vdd_12v_pcie>; 2182 2183 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2184 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2185 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2186 2187 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2188 "p2u-5", "p2u-6", "p2u-7"; 2189 }; 2190 2191 pcie-ep@141a0000 { 2192 status = "disabled"; 2193 2194 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2195 2196 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; 2197 2198 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) 2199 GPIO_ACTIVE_HIGH>; 2200 2201 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2202 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2203 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2204 2205 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2206 "p2u-5", "p2u-6", "p2u-7"; 2207 }; 2208 2209 fan: pwm-fan { 2210 compatible = "pwm-fan"; 2211 pwms = <&pwm4 0 45334>; 2212 2213 cooling-levels = <0 64 128 255>; 2214 #cooling-cells = <2>; 2215 }; 2216 2217 gpio-keys { 2218 compatible = "gpio-keys"; 2219 2220 force-recovery { 2221 label = "Force Recovery"; 2222 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0) 2223 GPIO_ACTIVE_LOW>; 2224 linux,input-type = <EV_KEY>; 2225 linux,code = <KEY_SLEEP>; 2226 debounce-interval = <10>; 2227 }; 2228 2229 power { 2230 label = "Power"; 2231 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4) 2232 GPIO_ACTIVE_LOW>; 2233 linux,input-type = <EV_KEY>; 2234 linux,code = <KEY_POWER>; 2235 debounce-interval = <10>; 2236 wakeup-event-action = <EV_ACT_ASSERTED>; 2237 wakeup-source; 2238 }; 2239 }; 2240 2241 sound { 2242 compatible = "nvidia,tegra186-audio-graph-card"; 2243 status = "okay"; 2244 2245 dais = /* ADMAIF (FE) Ports */ 2246 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 2247 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, 2248 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, 2249 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, 2250 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, 2251 /* XBAR Ports */ 2252 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>, 2253 <&xbar_i2s6_port>, <&xbar_dmic3_port>, 2254 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 2255 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 2256 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 2257 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 2258 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 2259 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 2260 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 2261 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, 2262 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, 2263 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, 2264 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, 2265 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 2266 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, 2267 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, 2268 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, 2269 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 2270 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 2271 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 2272 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>, 2273 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2274 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2275 <&xbar_asrc_in7_port>, 2276 /* HW accelerators */ 2277 <&sfc1_out_port>, <&sfc2_out_port>, 2278 <&sfc3_out_port>, <&sfc4_out_port>, 2279 <&mvc1_out_port>, <&mvc2_out_port>, 2280 <&amx1_out_port>, <&amx2_out_port>, 2281 <&amx3_out_port>, <&amx4_out_port>, 2282 <&adx1_out1_port>, <&adx1_out2_port>, 2283 <&adx1_out3_port>, <&adx1_out4_port>, 2284 <&adx2_out1_port>, <&adx2_out2_port>, 2285 <&adx2_out3_port>, <&adx2_out4_port>, 2286 <&adx3_out1_port>, <&adx3_out2_port>, 2287 <&adx3_out3_port>, <&adx3_out4_port>, 2288 <&adx4_out1_port>, <&adx4_out2_port>, 2289 <&adx4_out3_port>, <&adx4_out4_port>, 2290 <&mixer_out1_port>, <&mixer_out2_port>, <&mixer_out3_port>, 2291 <&mixer_out4_port>, <&mixer_out5_port>, 2292 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2293 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2294 /* BE I/O Ports */ 2295 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>, 2296 <&dmic3_port>; 2297 2298 label = "NVIDIA Jetson AGX Xavier APE"; 2299 2300 widgets = 2301 "Microphone", "CVB-RT MIC Jack", 2302 "Microphone", "CVB-RT MIC", 2303 "Headphone", "CVB-RT HP Jack", 2304 "Speaker", "CVB-RT SPK"; 2305 2306 routing = 2307 /* I2S1 <-> RT5658 */ 2308 "CVB-RT AIF1 Playback", "I2S1 DAP-Playback", 2309 "I2S1 DAP-Capture", "CVB-RT AIF1 Capture", 2310 /* RT5658 Codec controls */ 2311 "CVB-RT HP Jack", "CVB-RT HPO L Playback", 2312 "CVB-RT HP Jack", "CVB-RT HPO R Playback", 2313 "CVB-RT IN1P", "CVB-RT MIC Jack", 2314 "CVB-RT IN2P", "CVB-RT MIC Jack", 2315 "CVB-RT SPK", "CVB-RT SPO Playback", 2316 "CVB-RT DMIC L1", "CVB-RT MIC", 2317 "CVB-RT DMIC L2", "CVB-RT MIC", 2318 "CVB-RT DMIC R1", "CVB-RT MIC", 2319 "CVB-RT DMIC R2", "CVB-RT MIC"; 2320 }; 2321 2322 thermal-zones { 2323 cpu-thermal { 2324 polling-delay = <0>; 2325 polling-delay-passive = <500>; 2326 status = "okay"; 2327 2328 trips { 2329 cpu_trip_critical: critical { 2330 temperature = <96500>; 2331 hysteresis = <0>; 2332 type = "critical"; 2333 }; 2334 2335 cpu_trip_hot: hot { 2336 temperature = <70000>; 2337 hysteresis = <2000>; 2338 type = "hot"; 2339 }; 2340 2341 cpu_trip_active: active { 2342 temperature = <50000>; 2343 hysteresis = <2000>; 2344 type = "active"; 2345 }; 2346 2347 cpu_trip_passive: passive { 2348 temperature = <30000>; 2349 hysteresis = <2000>; 2350 type = "passive"; 2351 }; 2352 }; 2353 2354 cooling-maps { 2355 cpu-critical { 2356 cooling-device = <&fan 3 3>; 2357 trip = <&cpu_trip_critical>; 2358 }; 2359 2360 cpu-hot { 2361 cooling-device = <&fan 2 2>; 2362 trip = <&cpu_trip_hot>; 2363 }; 2364 2365 cpu-active { 2366 cooling-device = <&fan 1 1>; 2367 trip = <&cpu_trip_active>; 2368 }; 2369 2370 cpu-passive { 2371 cooling-device = <&fan 0 0>; 2372 trip = <&cpu_trip_passive>; 2373 }; 2374 }; 2375 }; 2376 2377 gpu-thermal { 2378 polling-delay = <0>; 2379 polling-delay-passive = <500>; 2380 status = "okay"; 2381 2382 trips { 2383 gpu_alert0: critical { 2384 temperature = <99000>; 2385 hysteresis = <0>; 2386 type = "critical"; 2387 }; 2388 }; 2389 }; 2390 2391 aux-thermal { 2392 polling-delay = <0>; 2393 polling-delay-passive = <500>; 2394 status = "okay"; 2395 2396 trips { 2397 aux_alert0: critical { 2398 temperature = <90000>; 2399 hysteresis = <0>; 2400 type = "critical"; 2401 }; 2402 }; 2403 }; 2404 }; 2405};