tegra194-p3509-0000.dtsi (44392B)
1// SPDX-License-Identifier: GPL-2.0 2 3#include <dt-bindings/input/linux-event-codes.h> 4#include <dt-bindings/input/gpio-keys.h> 5 6/ { 7 bus@0 { 8 aconnect@2900000 { 9 status = "okay"; 10 11 dma-controller@2930000 { 12 status = "okay"; 13 }; 14 15 interrupt-controller@2a40000 { 16 status = "okay"; 17 }; 18 19 ahub@2900800 { 20 status = "okay"; 21 22 ports { 23 #address-cells = <1>; 24 #size-cells = <0>; 25 26 port@0 { 27 reg = <0x0>; 28 29 xbar_admaif0_ep: endpoint { 30 remote-endpoint = <&admaif0_ep>; 31 }; 32 }; 33 34 port@1 { 35 reg = <0x1>; 36 37 xbar_admaif1_ep: endpoint { 38 remote-endpoint = <&admaif1_ep>; 39 }; 40 }; 41 42 port@2 { 43 reg = <0x2>; 44 45 xbar_admaif2_ep: endpoint { 46 remote-endpoint = <&admaif2_ep>; 47 }; 48 }; 49 50 port@3 { 51 reg = <0x3>; 52 53 xbar_admaif3_ep: endpoint { 54 remote-endpoint = <&admaif3_ep>; 55 }; 56 }; 57 58 port@4 { 59 reg = <0x4>; 60 61 xbar_admaif4_ep: endpoint { 62 remote-endpoint = <&admaif4_ep>; 63 }; 64 }; 65 66 port@5 { 67 reg = <0x5>; 68 69 xbar_admaif5_ep: endpoint { 70 remote-endpoint = <&admaif5_ep>; 71 }; 72 }; 73 74 port@6 { 75 reg = <0x6>; 76 77 xbar_admaif6_ep: endpoint { 78 remote-endpoint = <&admaif6_ep>; 79 }; 80 }; 81 82 port@7 { 83 reg = <0x7>; 84 85 xbar_admaif7_ep: endpoint { 86 remote-endpoint = <&admaif7_ep>; 87 }; 88 }; 89 90 port@8 { 91 reg = <0x8>; 92 93 xbar_admaif8_ep: endpoint { 94 remote-endpoint = <&admaif8_ep>; 95 }; 96 }; 97 98 port@9 { 99 reg = <0x9>; 100 101 xbar_admaif9_ep: endpoint { 102 remote-endpoint = <&admaif9_ep>; 103 }; 104 }; 105 106 port@a { 107 reg = <0xa>; 108 109 xbar_admaif10_ep: endpoint { 110 remote-endpoint = <&admaif10_ep>; 111 }; 112 }; 113 114 port@b { 115 reg = <0xb>; 116 117 xbar_admaif11_ep: endpoint { 118 remote-endpoint = <&admaif11_ep>; 119 }; 120 }; 121 122 port@c { 123 reg = <0xc>; 124 125 xbar_admaif12_ep: endpoint { 126 remote-endpoint = <&admaif12_ep>; 127 }; 128 }; 129 130 port@d { 131 reg = <0xd>; 132 133 xbar_admaif13_ep: endpoint { 134 remote-endpoint = <&admaif13_ep>; 135 }; 136 }; 137 138 port@e { 139 reg = <0xe>; 140 141 xbar_admaif14_ep: endpoint { 142 remote-endpoint = <&admaif14_ep>; 143 }; 144 }; 145 146 port@f { 147 reg = <0xf>; 148 149 xbar_admaif15_ep: endpoint { 150 remote-endpoint = <&admaif15_ep>; 151 }; 152 }; 153 154 port@10 { 155 reg = <0x10>; 156 157 xbar_admaif16_ep: endpoint { 158 remote-endpoint = <&admaif16_ep>; 159 }; 160 }; 161 162 port@11 { 163 reg = <0x11>; 164 165 xbar_admaif17_ep: endpoint { 166 remote-endpoint = <&admaif17_ep>; 167 }; 168 }; 169 170 port@12 { 171 reg = <0x12>; 172 173 xbar_admaif18_ep: endpoint { 174 remote-endpoint = <&admaif18_ep>; 175 }; 176 }; 177 178 port@13 { 179 reg = <0x13>; 180 181 xbar_admaif19_ep: endpoint { 182 remote-endpoint = <&admaif19_ep>; 183 }; 184 }; 185 186 xbar_i2s3_port: port@16 { 187 reg = <0x16>; 188 189 xbar_i2s3_ep: endpoint { 190 remote-endpoint = <&i2s3_cif_ep>; 191 }; 192 }; 193 194 xbar_i2s5_port: port@18 { 195 reg = <0x18>; 196 197 xbar_i2s5_ep: endpoint { 198 remote-endpoint = <&i2s5_cif_ep>; 199 }; 200 }; 201 202 xbar_dmic1_port: port@1a { 203 reg = <0x1a>; 204 205 xbar_dmic1_ep: endpoint { 206 remote-endpoint = <&dmic1_cif_ep>; 207 }; 208 }; 209 210 xbar_dmic2_port: port@1b { 211 reg = <0x1b>; 212 213 xbar_dmic2_ep: endpoint { 214 remote-endpoint = <&dmic2_cif_ep>; 215 }; 216 }; 217 218 xbar_dmic4_port: port@1d { 219 reg = <0x1d>; 220 221 xbar_dmic4_ep: endpoint { 222 remote-endpoint = <&dmic4_cif_ep>; 223 }; 224 }; 225 226 xbar_dspk1_port: port@1e { 227 reg = <0x1e>; 228 229 xbar_dspk1_ep: endpoint { 230 remote-endpoint = <&dspk1_cif_ep>; 231 }; 232 }; 233 234 xbar_dspk2_port: port@1f { 235 reg = <0x1f>; 236 237 xbar_dspk2_ep: endpoint { 238 remote-endpoint = <&dspk2_cif_ep>; 239 }; 240 }; 241 242 xbar_sfc1_in_port: port@20 { 243 reg = <0x20>; 244 245 xbar_sfc1_in_ep: endpoint { 246 remote-endpoint = <&sfc1_cif_in_ep>; 247 }; 248 }; 249 250 port@21 { 251 reg = <0x21>; 252 253 xbar_sfc1_out_ep: endpoint { 254 remote-endpoint = <&sfc1_cif_out_ep>; 255 }; 256 }; 257 258 xbar_sfc2_in_port: port@22 { 259 reg = <0x22>; 260 261 xbar_sfc2_in_ep: endpoint { 262 remote-endpoint = <&sfc2_cif_in_ep>; 263 }; 264 }; 265 266 port@23 { 267 reg = <0x23>; 268 269 xbar_sfc2_out_ep: endpoint { 270 remote-endpoint = <&sfc2_cif_out_ep>; 271 }; 272 }; 273 274 xbar_sfc3_in_port: port@24 { 275 reg = <0x24>; 276 277 xbar_sfc3_in_ep: endpoint { 278 remote-endpoint = <&sfc3_cif_in_ep>; 279 }; 280 }; 281 282 port@25 { 283 reg = <0x25>; 284 285 xbar_sfc3_out_ep: endpoint { 286 remote-endpoint = <&sfc3_cif_out_ep>; 287 }; 288 }; 289 290 xbar_sfc4_in_port: port@26 { 291 reg = <0x26>; 292 293 xbar_sfc4_in_ep: endpoint { 294 remote-endpoint = <&sfc4_cif_in_ep>; 295 }; 296 }; 297 298 port@27 { 299 reg = <0x27>; 300 301 xbar_sfc4_out_ep: endpoint { 302 remote-endpoint = <&sfc4_cif_out_ep>; 303 }; 304 }; 305 306 xbar_mvc1_in_port: port@28 { 307 reg = <0x28>; 308 309 xbar_mvc1_in_ep: endpoint { 310 remote-endpoint = <&mvc1_cif_in_ep>; 311 }; 312 }; 313 314 port@29 { 315 reg = <0x29>; 316 317 xbar_mvc1_out_ep: endpoint { 318 remote-endpoint = <&mvc1_cif_out_ep>; 319 }; 320 }; 321 322 xbar_mvc2_in_port: port@2a { 323 reg = <0x2a>; 324 325 xbar_mvc2_in_ep: endpoint { 326 remote-endpoint = <&mvc2_cif_in_ep>; 327 }; 328 }; 329 330 port@2b { 331 reg = <0x2b>; 332 333 xbar_mvc2_out_ep: endpoint { 334 remote-endpoint = <&mvc2_cif_out_ep>; 335 }; 336 }; 337 338 xbar_amx1_in1_port: port@2c { 339 reg = <0x2c>; 340 341 xbar_amx1_in1_ep: endpoint { 342 remote-endpoint = <&amx1_in1_ep>; 343 }; 344 }; 345 346 xbar_amx1_in2_port: port@2d { 347 reg = <0x2d>; 348 349 xbar_amx1_in2_ep: endpoint { 350 remote-endpoint = <&amx1_in2_ep>; 351 }; 352 }; 353 354 xbar_amx1_in3_port: port@2e { 355 reg = <0x2e>; 356 357 xbar_amx1_in3_ep: endpoint { 358 remote-endpoint = <&amx1_in3_ep>; 359 }; 360 }; 361 362 xbar_amx1_in4_port: port@2f { 363 reg = <0x2f>; 364 365 xbar_amx1_in4_ep: endpoint { 366 remote-endpoint = <&amx1_in4_ep>; 367 }; 368 }; 369 370 port@30 { 371 reg = <0x30>; 372 373 xbar_amx1_out_ep: endpoint { 374 remote-endpoint = <&amx1_out_ep>; 375 }; 376 }; 377 378 xbar_amx2_in1_port: port@31 { 379 reg = <0x31>; 380 381 xbar_amx2_in1_ep: endpoint { 382 remote-endpoint = <&amx2_in1_ep>; 383 }; 384 }; 385 386 xbar_amx2_in2_port: port@32 { 387 reg = <0x32>; 388 389 xbar_amx2_in2_ep: endpoint { 390 remote-endpoint = <&amx2_in2_ep>; 391 }; 392 }; 393 394 xbar_amx2_in3_port: port@33 { 395 reg = <0x33>; 396 397 xbar_amx2_in3_ep: endpoint { 398 remote-endpoint = <&amx2_in3_ep>; 399 }; 400 }; 401 402 xbar_amx2_in4_port: port@34 { 403 reg = <0x34>; 404 405 xbar_amx2_in4_ep: endpoint { 406 remote-endpoint = <&amx2_in4_ep>; 407 }; 408 }; 409 410 port@35 { 411 reg = <0x35>; 412 413 xbar_amx2_out_ep: endpoint { 414 remote-endpoint = <&amx2_out_ep>; 415 }; 416 }; 417 418 xbar_amx3_in1_port: port@36 { 419 reg = <0x36>; 420 421 xbar_amx3_in1_ep: endpoint { 422 remote-endpoint = <&amx3_in1_ep>; 423 }; 424 }; 425 426 xbar_amx3_in2_port: port@37 { 427 reg = <0x37>; 428 429 xbar_amx3_in2_ep: endpoint { 430 remote-endpoint = <&amx3_in2_ep>; 431 }; 432 }; 433 434 xbar_amx3_in3_port: port@38 { 435 reg = <0x38>; 436 437 xbar_amx3_in3_ep: endpoint { 438 remote-endpoint = <&amx3_in3_ep>; 439 }; 440 }; 441 442 xbar_amx3_in4_port: port@39 { 443 reg = <0x39>; 444 445 xbar_amx3_in4_ep: endpoint { 446 remote-endpoint = <&amx3_in4_ep>; 447 }; 448 }; 449 450 port@3a { 451 reg = <0x3a>; 452 453 xbar_amx3_out_ep: endpoint { 454 remote-endpoint = <&amx3_out_ep>; 455 }; 456 }; 457 458 xbar_amx4_in1_port: port@3b { 459 reg = <0x3b>; 460 461 xbar_amx4_in1_ep: endpoint { 462 remote-endpoint = <&amx4_in1_ep>; 463 }; 464 }; 465 466 xbar_amx4_in2_port: port@3c { 467 reg = <0x3c>; 468 469 xbar_amx4_in2_ep: endpoint { 470 remote-endpoint = <&amx4_in2_ep>; 471 }; 472 }; 473 474 xbar_amx4_in3_port: port@3d { 475 reg = <0x3d>; 476 477 xbar_amx4_in3_ep: endpoint { 478 remote-endpoint = <&amx4_in3_ep>; 479 }; 480 }; 481 482 xbar_amx4_in4_port: port@3e { 483 reg = <0x3e>; 484 485 xbar_amx4_in4_ep: endpoint { 486 remote-endpoint = <&amx4_in4_ep>; 487 }; 488 }; 489 490 port@3f { 491 reg = <0x3f>; 492 493 xbar_amx4_out_ep: endpoint { 494 remote-endpoint = <&amx4_out_ep>; 495 }; 496 }; 497 498 xbar_adx1_in_port: port@40 { 499 reg = <0x40>; 500 501 xbar_adx1_in_ep: endpoint { 502 remote-endpoint = <&adx1_in_ep>; 503 }; 504 }; 505 506 port@41 { 507 reg = <0x41>; 508 509 xbar_adx1_out1_ep: endpoint { 510 remote-endpoint = <&adx1_out1_ep>; 511 }; 512 }; 513 514 port@42 { 515 reg = <0x42>; 516 517 xbar_adx1_out2_ep: endpoint { 518 remote-endpoint = <&adx1_out2_ep>; 519 }; 520 }; 521 522 port@43 { 523 reg = <0x43>; 524 525 xbar_adx1_out3_ep: endpoint { 526 remote-endpoint = <&adx1_out3_ep>; 527 }; 528 }; 529 530 port@44 { 531 reg = <0x44>; 532 533 xbar_adx1_out4_ep: endpoint { 534 remote-endpoint = <&adx1_out4_ep>; 535 }; 536 }; 537 538 xbar_adx2_in_port: port@45 { 539 reg = <0x45>; 540 541 xbar_adx2_in_ep: endpoint { 542 remote-endpoint = <&adx2_in_ep>; 543 }; 544 }; 545 546 port@46 { 547 reg = <0x46>; 548 549 xbar_adx2_out1_ep: endpoint { 550 remote-endpoint = <&adx2_out1_ep>; 551 }; 552 }; 553 554 port@47 { 555 reg = <0x47>; 556 557 xbar_adx2_out2_ep: endpoint { 558 remote-endpoint = <&adx2_out2_ep>; 559 }; 560 }; 561 562 port@48 { 563 reg = <0x48>; 564 565 xbar_adx2_out3_ep: endpoint { 566 remote-endpoint = <&adx2_out3_ep>; 567 }; 568 }; 569 570 port@49 { 571 reg = <0x49>; 572 573 xbar_adx2_out4_ep: endpoint { 574 remote-endpoint = <&adx2_out4_ep>; 575 }; 576 }; 577 578 xbar_adx3_in_port: port@4a { 579 reg = <0x4a>; 580 581 xbar_adx3_in_ep: endpoint { 582 remote-endpoint = <&adx3_in_ep>; 583 }; 584 }; 585 586 port@4b { 587 reg = <0x4b>; 588 589 xbar_adx3_out1_ep: endpoint { 590 remote-endpoint = <&adx3_out1_ep>; 591 }; 592 }; 593 594 port@4c { 595 reg = <0x4c>; 596 597 xbar_adx3_out2_ep: endpoint { 598 remote-endpoint = <&adx3_out2_ep>; 599 }; 600 }; 601 602 port@4d { 603 reg = <0x4d>; 604 605 xbar_adx3_out3_ep: endpoint { 606 remote-endpoint = <&adx3_out3_ep>; 607 }; 608 }; 609 610 port@4e { 611 reg = <0x4e>; 612 613 xbar_adx3_out4_ep: endpoint { 614 remote-endpoint = <&adx3_out4_ep>; 615 }; 616 }; 617 618 xbar_adx4_in_port: port@4f { 619 reg = <0x4f>; 620 621 xbar_adx4_in_ep: endpoint { 622 remote-endpoint = <&adx4_in_ep>; 623 }; 624 }; 625 626 port@50 { 627 reg = <0x50>; 628 629 xbar_adx4_out1_ep: endpoint { 630 remote-endpoint = <&adx4_out1_ep>; 631 }; 632 }; 633 634 port@51 { 635 reg = <0x51>; 636 637 xbar_adx4_out2_ep: endpoint { 638 remote-endpoint = <&adx4_out2_ep>; 639 }; 640 }; 641 642 port@52 { 643 reg = <0x52>; 644 645 xbar_adx4_out3_ep: endpoint { 646 remote-endpoint = <&adx4_out3_ep>; 647 }; 648 }; 649 650 port@53 { 651 reg = <0x53>; 652 653 xbar_adx4_out4_ep: endpoint { 654 remote-endpoint = <&adx4_out4_ep>; 655 }; 656 }; 657 658 xbar_mixer_in1_port: port@54 { 659 reg = <0x54>; 660 661 xbar_mixer_in1_ep: endpoint { 662 remote-endpoint = <&mixer_in1_ep>; 663 }; 664 }; 665 666 xbar_mixer_in2_port: port@55 { 667 reg = <0x55>; 668 669 xbar_mixer_in2_ep: endpoint { 670 remote-endpoint = <&mixer_in2_ep>; 671 }; 672 }; 673 674 xbar_mixer_in3_port: port@56 { 675 reg = <0x56>; 676 677 xbar_mixer_in3_ep: endpoint { 678 remote-endpoint = <&mixer_in3_ep>; 679 }; 680 }; 681 682 xbar_mixer_in4_port: port@57 { 683 reg = <0x57>; 684 685 xbar_mixer_in4_ep: endpoint { 686 remote-endpoint = <&mixer_in4_ep>; 687 }; 688 }; 689 690 xbar_mixer_in5_port: port@58 { 691 reg = <0x58>; 692 693 xbar_mixer_in5_ep: endpoint { 694 remote-endpoint = <&mixer_in5_ep>; 695 }; 696 }; 697 698 xbar_mixer_in6_port: port@59 { 699 reg = <0x59>; 700 701 xbar_mixer_in6_ep: endpoint { 702 remote-endpoint = <&mixer_in6_ep>; 703 }; 704 }; 705 706 xbar_mixer_in7_port: port@5a { 707 reg = <0x5a>; 708 709 xbar_mixer_in7_ep: endpoint { 710 remote-endpoint = <&mixer_in7_ep>; 711 }; 712 }; 713 714 xbar_mixer_in8_port: port@5b { 715 reg = <0x5b>; 716 717 xbar_mixer_in8_ep: endpoint { 718 remote-endpoint = <&mixer_in8_ep>; 719 }; 720 }; 721 722 xbar_mixer_in9_port: port@5c { 723 reg = <0x5c>; 724 725 xbar_mixer_in9_ep: endpoint { 726 remote-endpoint = <&mixer_in9_ep>; 727 }; 728 }; 729 730 xbar_mixer_in10_port: port@5d { 731 reg = <0x5d>; 732 733 xbar_mixer_in10_ep: endpoint { 734 remote-endpoint = <&mixer_in10_ep>; 735 }; 736 }; 737 738 port@5e { 739 reg = <0x5e>; 740 741 xbar_mixer_out1_ep: endpoint { 742 remote-endpoint = <&mixer_out1_ep>; 743 }; 744 }; 745 746 port@5f { 747 reg = <0x5f>; 748 749 xbar_mixer_out2_ep: endpoint { 750 remote-endpoint = <&mixer_out2_ep>; 751 }; 752 }; 753 754 port@60 { 755 reg = <0x60>; 756 757 xbar_mixer_out3_ep: endpoint { 758 remote-endpoint = <&mixer_out3_ep>; 759 }; 760 }; 761 762 port@61 { 763 reg = <0x61>; 764 765 xbar_mixer_out4_ep: endpoint { 766 remote-endpoint = <&mixer_out4_ep>; 767 }; 768 }; 769 770 port@62 { 771 reg = <0x62>; 772 773 xbar_mixer_out5_ep: endpoint { 774 remote-endpoint = <&mixer_out5_ep>; 775 }; 776 }; 777 778 xbar_asrc_in1_port: port@63 { 779 reg = <0x63>; 780 781 xbar_asrc_in1_ep: endpoint { 782 remote-endpoint = <&asrc_in1_ep>; 783 }; 784 }; 785 786 port@64 { 787 reg = <0x64>; 788 789 xbar_asrc_out1_ep: endpoint { 790 remote-endpoint = <&asrc_out1_ep>; 791 }; 792 }; 793 794 xbar_asrc_in2_port: port@65 { 795 reg = <0x65>; 796 797 xbar_asrc_in2_ep: endpoint { 798 remote-endpoint = <&asrc_in2_ep>; 799 }; 800 }; 801 802 port@66 { 803 reg = <0x66>; 804 805 xbar_asrc_out2_ep: endpoint { 806 remote-endpoint = <&asrc_out2_ep>; 807 }; 808 }; 809 810 xbar_asrc_in3_port: port@67 { 811 reg = <0x67>; 812 813 xbar_asrc_in3_ep: endpoint { 814 remote-endpoint = <&asrc_in3_ep>; 815 }; 816 }; 817 818 port@68 { 819 reg = <0x68>; 820 821 xbar_asrc_out3_ep: endpoint { 822 remote-endpoint = <&asrc_out3_ep>; 823 }; 824 }; 825 826 xbar_asrc_in4_port: port@69 { 827 reg = <0x69>; 828 829 xbar_asrc_in4_ep: endpoint { 830 remote-endpoint = <&asrc_in4_ep>; 831 }; 832 }; 833 834 port@6a { 835 reg = <0x6a>; 836 837 xbar_asrc_out4_ep: endpoint { 838 remote-endpoint = <&asrc_out4_ep>; 839 }; 840 }; 841 842 xbar_asrc_in5_port: port@6b { 843 reg = <0x6b>; 844 845 xbar_asrc_in5_ep: endpoint { 846 remote-endpoint = <&asrc_in5_ep>; 847 }; 848 }; 849 850 port@6c { 851 reg = <0x6c>; 852 853 xbar_asrc_out5_ep: endpoint { 854 remote-endpoint = <&asrc_out5_ep>; 855 }; 856 }; 857 858 xbar_asrc_in6_port: port@6d { 859 reg = <0x6d>; 860 861 xbar_asrc_in6_ep: endpoint { 862 remote-endpoint = <&asrc_in6_ep>; 863 }; 864 }; 865 866 port@6e { 867 reg = <0x6e>; 868 869 xbar_asrc_out6_ep: endpoint { 870 remote-endpoint = <&asrc_out6_ep>; 871 }; 872 }; 873 874 xbar_asrc_in7_port: port@6f { 875 reg = <0x6f>; 876 877 xbar_asrc_in7_ep: endpoint { 878 remote-endpoint = <&asrc_in7_ep>; 879 }; 880 }; 881 }; 882 883 admaif@290f000 { 884 status = "okay"; 885 886 ports { 887 #address-cells = <1>; 888 #size-cells = <0>; 889 890 admaif0_port: port@0 { 891 reg = <0x0>; 892 893 admaif0_ep: endpoint { 894 remote-endpoint = <&xbar_admaif0_ep>; 895 }; 896 }; 897 898 admaif1_port: port@1 { 899 reg = <0x1>; 900 901 admaif1_ep: endpoint { 902 remote-endpoint = <&xbar_admaif1_ep>; 903 }; 904 }; 905 906 admaif2_port: port@2 { 907 reg = <0x2>; 908 909 admaif2_ep: endpoint { 910 remote-endpoint = <&xbar_admaif2_ep>; 911 }; 912 }; 913 914 admaif3_port: port@3 { 915 reg = <0x3>; 916 917 admaif3_ep: endpoint { 918 remote-endpoint = <&xbar_admaif3_ep>; 919 }; 920 }; 921 922 admaif4_port: port@4 { 923 reg = <0x4>; 924 925 admaif4_ep: endpoint { 926 remote-endpoint = <&xbar_admaif4_ep>; 927 }; 928 }; 929 930 admaif5_port: port@5 { 931 reg = <0x5>; 932 933 admaif5_ep: endpoint { 934 remote-endpoint = <&xbar_admaif5_ep>; 935 }; 936 }; 937 938 admaif6_port: port@6 { 939 reg = <0x6>; 940 941 admaif6_ep: endpoint { 942 remote-endpoint = <&xbar_admaif6_ep>; 943 }; 944 }; 945 946 admaif7_port: port@7 { 947 reg = <0x7>; 948 949 admaif7_ep: endpoint { 950 remote-endpoint = <&xbar_admaif7_ep>; 951 }; 952 }; 953 954 admaif8_port: port@8 { 955 reg = <0x8>; 956 957 admaif8_ep: endpoint { 958 remote-endpoint = <&xbar_admaif8_ep>; 959 }; 960 }; 961 962 admaif9_port: port@9 { 963 reg = <0x9>; 964 965 admaif9_ep: endpoint { 966 remote-endpoint = <&xbar_admaif9_ep>; 967 }; 968 }; 969 970 admaif10_port: port@a { 971 reg = <0xa>; 972 973 admaif10_ep: endpoint { 974 remote-endpoint = <&xbar_admaif10_ep>; 975 }; 976 }; 977 978 admaif11_port: port@b { 979 reg = <0xb>; 980 981 admaif11_ep: endpoint { 982 remote-endpoint = <&xbar_admaif11_ep>; 983 }; 984 }; 985 986 admaif12_port: port@c { 987 reg = <0xc>; 988 989 admaif12_ep: endpoint { 990 remote-endpoint = <&xbar_admaif12_ep>; 991 }; 992 }; 993 994 admaif13_port: port@d { 995 reg = <0xd>; 996 997 admaif13_ep: endpoint { 998 remote-endpoint = <&xbar_admaif13_ep>; 999 }; 1000 }; 1001 1002 admaif14_port: port@e { 1003 reg = <0xe>; 1004 1005 admaif14_ep: endpoint { 1006 remote-endpoint = <&xbar_admaif14_ep>; 1007 }; 1008 }; 1009 1010 admaif15_port: port@f { 1011 reg = <0xf>; 1012 1013 admaif15_ep: endpoint { 1014 remote-endpoint = <&xbar_admaif15_ep>; 1015 }; 1016 }; 1017 1018 admaif16_port: port@10 { 1019 reg = <0x10>; 1020 1021 admaif16_ep: endpoint { 1022 remote-endpoint = <&xbar_admaif16_ep>; 1023 }; 1024 }; 1025 1026 admaif17_port: port@11 { 1027 reg = <0x11>; 1028 1029 admaif17_ep: endpoint { 1030 remote-endpoint = <&xbar_admaif17_ep>; 1031 }; 1032 }; 1033 1034 admaif18_port: port@12 { 1035 reg = <0x12>; 1036 1037 admaif18_ep: endpoint { 1038 remote-endpoint = <&xbar_admaif18_ep>; 1039 }; 1040 }; 1041 1042 admaif19_port: port@13 { 1043 reg = <0x13>; 1044 1045 admaif19_ep: endpoint { 1046 remote-endpoint = <&xbar_admaif19_ep>; 1047 }; 1048 }; 1049 }; 1050 }; 1051 1052 i2s@2901200 { 1053 status = "okay"; 1054 1055 ports { 1056 #address-cells = <1>; 1057 #size-cells = <0>; 1058 1059 port@0 { 1060 reg = <0>; 1061 1062 i2s3_cif_ep: endpoint { 1063 remote-endpoint = <&xbar_i2s3_ep>; 1064 }; 1065 }; 1066 1067 i2s3_port: port@1 { 1068 reg = <1>; 1069 1070 i2s3_dap_ep: endpoint { 1071 dai-format = "i2s"; 1072 /* Place holder for external Codec */ 1073 }; 1074 }; 1075 }; 1076 }; 1077 1078 i2s@2901400 { 1079 status = "okay"; 1080 1081 ports { 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 1085 port@0 { 1086 reg = <0>; 1087 1088 i2s5_cif_ep: endpoint { 1089 remote-endpoint = <&xbar_i2s5_ep>; 1090 }; 1091 }; 1092 1093 i2s5_port: port@1 { 1094 reg = <1>; 1095 1096 i2s5_dap_ep: endpoint { 1097 dai-format = "i2s"; 1098 /* Place holder for external Codec */ 1099 }; 1100 }; 1101 }; 1102 }; 1103 1104 dmic@2904000 { 1105 status = "okay"; 1106 1107 ports { 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 1111 port@0 { 1112 reg = <0>; 1113 1114 dmic1_cif_ep: endpoint { 1115 remote-endpoint = <&xbar_dmic1_ep>; 1116 }; 1117 }; 1118 1119 dmic1_port: port@1 { 1120 reg = <1>; 1121 1122 dmic1_dap_ep: endpoint { 1123 /* Place holder for external Codec */ 1124 }; 1125 }; 1126 }; 1127 }; 1128 1129 dmic@2904100 { 1130 status = "okay"; 1131 1132 ports { 1133 #address-cells = <1>; 1134 #size-cells = <0>; 1135 1136 port@0 { 1137 reg = <0>; 1138 1139 dmic2_cif_ep: endpoint { 1140 remote-endpoint = <&xbar_dmic2_ep>; 1141 }; 1142 }; 1143 1144 dmic2_port: port@1 { 1145 reg = <1>; 1146 1147 dmic2_dap_ep: endpoint { 1148 /* Place holder for external Codec */ 1149 }; 1150 }; 1151 }; 1152 }; 1153 1154 dmic@2904300 { 1155 status = "okay"; 1156 1157 ports { 1158 #address-cells = <1>; 1159 #size-cells = <0>; 1160 1161 port@0 { 1162 reg = <0>; 1163 1164 dmic4_cif_ep: endpoint { 1165 remote-endpoint = <&xbar_dmic4_ep>; 1166 }; 1167 }; 1168 1169 dmic4_port: port@1 { 1170 reg = <1>; 1171 1172 dmic4_dap_ep: endpoint { 1173 /* Place holder for external Codec */ 1174 }; 1175 }; 1176 }; 1177 }; 1178 1179 dspk@2905000 { 1180 status = "okay"; 1181 1182 ports { 1183 #address-cells = <1>; 1184 #size-cells = <0>; 1185 1186 port@0 { 1187 reg = <0>; 1188 1189 dspk1_cif_ep: endpoint { 1190 remote-endpoint = <&xbar_dspk1_ep>; 1191 }; 1192 }; 1193 1194 dspk1_port: port@1 { 1195 reg = <1>; 1196 1197 dspk1_dap_ep: endpoint { 1198 /* Place holder for external Codec */ 1199 }; 1200 }; 1201 }; 1202 }; 1203 1204 dspk@2905100 { 1205 status = "okay"; 1206 1207 ports { 1208 #address-cells = <1>; 1209 #size-cells = <0>; 1210 1211 port@0 { 1212 reg = <0>; 1213 1214 dspk2_cif_ep: endpoint { 1215 remote-endpoint = <&xbar_dspk2_ep>; 1216 }; 1217 }; 1218 1219 dspk2_port: port@1 { 1220 reg = <1>; 1221 1222 dspk2_dap_ep: endpoint { 1223 /* Place holder for external Codec */ 1224 }; 1225 }; 1226 }; 1227 }; 1228 1229 sfc@2902000 { 1230 status = "okay"; 1231 1232 ports { 1233 #address-cells = <1>; 1234 #size-cells = <0>; 1235 1236 port@0 { 1237 reg = <0>; 1238 1239 sfc1_cif_in_ep: endpoint { 1240 remote-endpoint = <&xbar_sfc1_in_ep>; 1241 convert-rate = <44100>; 1242 }; 1243 }; 1244 1245 sfc1_out_port: port@1 { 1246 reg = <1>; 1247 1248 sfc1_cif_out_ep: endpoint { 1249 remote-endpoint = <&xbar_sfc1_out_ep>; 1250 convert-rate = <48000>; 1251 }; 1252 }; 1253 }; 1254 }; 1255 1256 sfc@2902200 { 1257 status = "okay"; 1258 1259 ports { 1260 #address-cells = <1>; 1261 #size-cells = <0>; 1262 1263 port@0 { 1264 reg = <0>; 1265 1266 sfc2_cif_in_ep: endpoint { 1267 remote-endpoint = <&xbar_sfc2_in_ep>; 1268 }; 1269 }; 1270 1271 sfc2_out_port: port@1 { 1272 reg = <1>; 1273 1274 sfc2_cif_out_ep: endpoint { 1275 remote-endpoint = <&xbar_sfc2_out_ep>; 1276 }; 1277 }; 1278 }; 1279 }; 1280 1281 sfc@2902400 { 1282 status = "okay"; 1283 1284 ports { 1285 #address-cells = <1>; 1286 #size-cells = <0>; 1287 1288 port@0 { 1289 reg = <0>; 1290 1291 sfc3_cif_in_ep: endpoint { 1292 remote-endpoint = <&xbar_sfc3_in_ep>; 1293 }; 1294 }; 1295 1296 sfc3_out_port: port@1 { 1297 reg = <1>; 1298 1299 sfc3_cif_out_ep: endpoint { 1300 remote-endpoint = <&xbar_sfc3_out_ep>; 1301 }; 1302 }; 1303 }; 1304 }; 1305 1306 sfc@2902600 { 1307 status = "okay"; 1308 1309 ports { 1310 #address-cells = <1>; 1311 #size-cells = <0>; 1312 1313 port@0 { 1314 reg = <0>; 1315 1316 sfc4_cif_in_ep: endpoint { 1317 remote-endpoint = <&xbar_sfc4_in_ep>; 1318 }; 1319 }; 1320 1321 sfc4_out_port: port@1 { 1322 reg = <1>; 1323 1324 sfc4_cif_out_ep: endpoint { 1325 remote-endpoint = <&xbar_sfc4_out_ep>; 1326 }; 1327 }; 1328 }; 1329 }; 1330 1331 mvc@290a000 { 1332 status = "okay"; 1333 1334 ports { 1335 #address-cells = <1>; 1336 #size-cells = <0>; 1337 1338 port@0 { 1339 reg = <0>; 1340 1341 mvc1_cif_in_ep: endpoint { 1342 remote-endpoint = <&xbar_mvc1_in_ep>; 1343 }; 1344 }; 1345 1346 mvc1_out_port: port@1 { 1347 reg = <1>; 1348 1349 mvc1_cif_out_ep: endpoint { 1350 remote-endpoint = <&xbar_mvc1_out_ep>; 1351 }; 1352 }; 1353 }; 1354 }; 1355 1356 mvc@290a200 { 1357 status = "okay"; 1358 1359 ports { 1360 #address-cells = <1>; 1361 #size-cells = <0>; 1362 1363 port@0 { 1364 reg = <0>; 1365 1366 mvc2_cif_in_ep: endpoint { 1367 remote-endpoint = <&xbar_mvc2_in_ep>; 1368 }; 1369 }; 1370 1371 mvc2_out_port: port@1 { 1372 reg = <1>; 1373 1374 mvc2_cif_out_ep: endpoint { 1375 remote-endpoint = <&xbar_mvc2_out_ep>; 1376 }; 1377 }; 1378 }; 1379 }; 1380 1381 amx@2903000 { 1382 status = "okay"; 1383 1384 ports { 1385 #address-cells = <1>; 1386 #size-cells = <0>; 1387 1388 port@0 { 1389 reg = <0>; 1390 1391 amx1_in1_ep: endpoint { 1392 remote-endpoint = <&xbar_amx1_in1_ep>; 1393 }; 1394 }; 1395 1396 port@1 { 1397 reg = <1>; 1398 1399 amx1_in2_ep: endpoint { 1400 remote-endpoint = <&xbar_amx1_in2_ep>; 1401 }; 1402 }; 1403 1404 port@2 { 1405 reg = <2>; 1406 1407 amx1_in3_ep: endpoint { 1408 remote-endpoint = <&xbar_amx1_in3_ep>; 1409 }; 1410 }; 1411 1412 port@3 { 1413 reg = <3>; 1414 1415 amx1_in4_ep: endpoint { 1416 remote-endpoint = <&xbar_amx1_in4_ep>; 1417 }; 1418 }; 1419 1420 amx1_out_port: port@4 { 1421 reg = <4>; 1422 1423 amx1_out_ep: endpoint { 1424 remote-endpoint = <&xbar_amx1_out_ep>; 1425 }; 1426 }; 1427 }; 1428 }; 1429 1430 amx@2903100 { 1431 status = "okay"; 1432 1433 ports { 1434 #address-cells = <1>; 1435 #size-cells = <0>; 1436 1437 port@0 { 1438 reg = <0>; 1439 1440 amx2_in1_ep: endpoint { 1441 remote-endpoint = <&xbar_amx2_in1_ep>; 1442 }; 1443 }; 1444 1445 port@1 { 1446 reg = <1>; 1447 1448 amx2_in2_ep: endpoint { 1449 remote-endpoint = <&xbar_amx2_in2_ep>; 1450 }; 1451 }; 1452 1453 amx2_in3_port: port@2 { 1454 reg = <2>; 1455 1456 amx2_in3_ep: endpoint { 1457 remote-endpoint = <&xbar_amx2_in3_ep>; 1458 }; 1459 }; 1460 1461 amx2_in4_port: port@3 { 1462 reg = <3>; 1463 1464 amx2_in4_ep: endpoint { 1465 remote-endpoint = <&xbar_amx2_in4_ep>; 1466 }; 1467 }; 1468 1469 amx2_out_port: port@4 { 1470 reg = <4>; 1471 1472 amx2_out_ep: endpoint { 1473 remote-endpoint = <&xbar_amx2_out_ep>; 1474 }; 1475 }; 1476 }; 1477 }; 1478 1479 amx@2903200 { 1480 status = "okay"; 1481 1482 ports { 1483 #address-cells = <1>; 1484 #size-cells = <0>; 1485 1486 port@0 { 1487 reg = <0>; 1488 1489 amx3_in1_ep: endpoint { 1490 remote-endpoint = <&xbar_amx3_in1_ep>; 1491 }; 1492 }; 1493 1494 port@1 { 1495 reg = <1>; 1496 1497 amx3_in2_ep: endpoint { 1498 remote-endpoint = <&xbar_amx3_in2_ep>; 1499 }; 1500 }; 1501 1502 port@2 { 1503 reg = <2>; 1504 1505 amx3_in3_ep: endpoint { 1506 remote-endpoint = <&xbar_amx3_in3_ep>; 1507 }; 1508 }; 1509 1510 port@3 { 1511 reg = <3>; 1512 1513 amx3_in4_ep: endpoint { 1514 remote-endpoint = <&xbar_amx3_in4_ep>; 1515 }; 1516 }; 1517 1518 amx3_out_port: port@4 { 1519 reg = <4>; 1520 1521 amx3_out_ep: endpoint { 1522 remote-endpoint = <&xbar_amx3_out_ep>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 amx@2903300 { 1529 status = "okay"; 1530 1531 ports { 1532 #address-cells = <1>; 1533 #size-cells = <0>; 1534 1535 port@0 { 1536 reg = <0>; 1537 1538 amx4_in1_ep: endpoint { 1539 remote-endpoint = <&xbar_amx4_in1_ep>; 1540 }; 1541 }; 1542 1543 port@1 { 1544 reg = <1>; 1545 1546 amx4_in2_ep: endpoint { 1547 remote-endpoint = <&xbar_amx4_in2_ep>; 1548 }; 1549 }; 1550 1551 port@2 { 1552 reg = <2>; 1553 1554 amx4_in3_ep: endpoint { 1555 remote-endpoint = <&xbar_amx4_in3_ep>; 1556 }; 1557 }; 1558 1559 port@3 { 1560 reg = <3>; 1561 1562 amx4_in4_ep: endpoint { 1563 remote-endpoint = <&xbar_amx4_in4_ep>; 1564 }; 1565 }; 1566 1567 amx4_out_port: port@4 { 1568 reg = <4>; 1569 1570 amx4_out_ep: endpoint { 1571 remote-endpoint = <&xbar_amx4_out_ep>; 1572 }; 1573 }; 1574 }; 1575 }; 1576 1577 adx@2903800 { 1578 status = "okay"; 1579 1580 ports { 1581 #address-cells = <1>; 1582 #size-cells = <0>; 1583 1584 port@0 { 1585 reg = <0>; 1586 1587 adx1_in_ep: endpoint { 1588 remote-endpoint = <&xbar_adx1_in_ep>; 1589 }; 1590 }; 1591 1592 adx1_out1_port: port@1 { 1593 reg = <1>; 1594 1595 adx1_out1_ep: endpoint { 1596 remote-endpoint = <&xbar_adx1_out1_ep>; 1597 }; 1598 }; 1599 1600 adx1_out2_port: port@2 { 1601 reg = <2>; 1602 1603 adx1_out2_ep: endpoint { 1604 remote-endpoint = <&xbar_adx1_out2_ep>; 1605 }; 1606 }; 1607 1608 adx1_out3_port: port@3 { 1609 reg = <3>; 1610 1611 adx1_out3_ep: endpoint { 1612 remote-endpoint = <&xbar_adx1_out3_ep>; 1613 }; 1614 }; 1615 1616 adx1_out4_port: port@4 { 1617 reg = <4>; 1618 1619 adx1_out4_ep: endpoint { 1620 remote-endpoint = <&xbar_adx1_out4_ep>; 1621 }; 1622 }; 1623 }; 1624 }; 1625 1626 adx@2903900 { 1627 status = "okay"; 1628 1629 ports { 1630 #address-cells = <1>; 1631 #size-cells = <0>; 1632 1633 port@0 { 1634 reg = <0>; 1635 1636 adx2_in_ep: endpoint { 1637 remote-endpoint = <&xbar_adx2_in_ep>; 1638 }; 1639 }; 1640 1641 adx2_out1_port: port@1 { 1642 reg = <1>; 1643 1644 adx2_out1_ep: endpoint { 1645 remote-endpoint = <&xbar_adx2_out1_ep>; 1646 }; 1647 }; 1648 1649 adx2_out2_port: port@2 { 1650 reg = <2>; 1651 1652 adx2_out2_ep: endpoint { 1653 remote-endpoint = <&xbar_adx2_out2_ep>; 1654 }; 1655 }; 1656 1657 adx2_out3_port: port@3 { 1658 reg = <3>; 1659 1660 adx2_out3_ep: endpoint { 1661 remote-endpoint = <&xbar_adx2_out3_ep>; 1662 }; 1663 }; 1664 1665 adx2_out4_port: port@4 { 1666 reg = <4>; 1667 1668 adx2_out4_ep: endpoint { 1669 remote-endpoint = <&xbar_adx2_out4_ep>; 1670 }; 1671 }; 1672 }; 1673 }; 1674 1675 adx@2903a00 { 1676 status = "okay"; 1677 1678 ports { 1679 #address-cells = <1>; 1680 #size-cells = <0>; 1681 1682 port@0 { 1683 reg = <0>; 1684 1685 adx3_in_ep: endpoint { 1686 remote-endpoint = <&xbar_adx3_in_ep>; 1687 }; 1688 }; 1689 1690 adx3_out1_port: port@1 { 1691 reg = <1>; 1692 1693 adx3_out1_ep: endpoint { 1694 remote-endpoint = <&xbar_adx3_out1_ep>; 1695 }; 1696 }; 1697 1698 adx3_out2_port: port@2 { 1699 reg = <2>; 1700 1701 adx3_out2_ep: endpoint { 1702 remote-endpoint = <&xbar_adx3_out2_ep>; 1703 }; 1704 }; 1705 1706 adx3_out3_port: port@3 { 1707 reg = <3>; 1708 1709 adx3_out3_ep: endpoint { 1710 remote-endpoint = <&xbar_adx3_out3_ep>; 1711 }; 1712 }; 1713 1714 adx3_out4_port: port@4 { 1715 reg = <4>; 1716 1717 adx3_out4_ep: endpoint { 1718 remote-endpoint = <&xbar_adx3_out4_ep>; 1719 }; 1720 }; 1721 }; 1722 }; 1723 1724 adx@2903b00 { 1725 status = "okay"; 1726 1727 ports { 1728 #address-cells = <1>; 1729 #size-cells = <0>; 1730 1731 port@0 { 1732 reg = <0>; 1733 1734 adx4_in_ep: endpoint { 1735 remote-endpoint = <&xbar_adx4_in_ep>; 1736 }; 1737 }; 1738 1739 adx4_out1_port: port@1 { 1740 reg = <1>; 1741 1742 adx4_out1_ep: endpoint { 1743 remote-endpoint = <&xbar_adx4_out1_ep>; 1744 }; 1745 }; 1746 1747 adx4_out2_port: port@2 { 1748 reg = <2>; 1749 1750 adx4_out2_ep: endpoint { 1751 remote-endpoint = <&xbar_adx4_out2_ep>; 1752 }; 1753 }; 1754 1755 adx4_out3_port: port@3 { 1756 reg = <3>; 1757 1758 adx4_out3_ep: endpoint { 1759 remote-endpoint = <&xbar_adx4_out3_ep>; 1760 }; 1761 }; 1762 1763 adx4_out4_port: port@4 { 1764 reg = <4>; 1765 1766 adx4_out4_ep: endpoint { 1767 remote-endpoint = <&xbar_adx4_out4_ep>; 1768 }; 1769 }; 1770 }; 1771 }; 1772 1773 amixer@290bb00 { 1774 status = "okay"; 1775 1776 ports { 1777 #address-cells = <1>; 1778 #size-cells = <0>; 1779 1780 port@0 { 1781 reg = <0x0>; 1782 1783 mixer_in1_ep: endpoint { 1784 remote-endpoint = <&xbar_mixer_in1_ep>; 1785 }; 1786 }; 1787 1788 port@1 { 1789 reg = <0x1>; 1790 1791 mixer_in2_ep: endpoint { 1792 remote-endpoint = <&xbar_mixer_in2_ep>; 1793 }; 1794 }; 1795 1796 port@2 { 1797 reg = <0x2>; 1798 1799 mixer_in3_ep: endpoint { 1800 remote-endpoint = <&xbar_mixer_in3_ep>; 1801 }; 1802 }; 1803 1804 port@3 { 1805 reg = <0x3>; 1806 1807 mixer_in4_ep: endpoint { 1808 remote-endpoint = <&xbar_mixer_in4_ep>; 1809 }; 1810 }; 1811 1812 port@4 { 1813 reg = <0x4>; 1814 1815 mixer_in5_ep: endpoint { 1816 remote-endpoint = <&xbar_mixer_in5_ep>; 1817 }; 1818 }; 1819 1820 port@5 { 1821 reg = <0x5>; 1822 1823 mixer_in6_ep: endpoint { 1824 remote-endpoint = <&xbar_mixer_in6_ep>; 1825 }; 1826 }; 1827 1828 port@6 { 1829 reg = <0x6>; 1830 1831 mixer_in7_ep: endpoint { 1832 remote-endpoint = <&xbar_mixer_in7_ep>; 1833 }; 1834 }; 1835 1836 port@7 { 1837 reg = <0x7>; 1838 1839 mixer_in8_ep: endpoint { 1840 remote-endpoint = <&xbar_mixer_in8_ep>; 1841 }; 1842 }; 1843 1844 port@8 { 1845 reg = <0x8>; 1846 1847 mixer_in9_ep: endpoint { 1848 remote-endpoint = <&xbar_mixer_in9_ep>; 1849 }; 1850 }; 1851 1852 port@9 { 1853 reg = <0x9>; 1854 1855 mixer_in10_ep: endpoint { 1856 remote-endpoint = <&xbar_mixer_in10_ep>; 1857 }; 1858 }; 1859 1860 mixer_out1_port: port@a { 1861 reg = <0xa>; 1862 1863 mixer_out1_ep: endpoint { 1864 remote-endpoint = <&xbar_mixer_out1_ep>; 1865 }; 1866 }; 1867 1868 mixer_out2_port: port@b { 1869 reg = <0xb>; 1870 1871 mixer_out2_ep: endpoint { 1872 remote-endpoint = <&xbar_mixer_out2_ep>; 1873 }; 1874 }; 1875 1876 mixer_out3_port: port@c { 1877 reg = <0xc>; 1878 1879 mixer_out3_ep: endpoint { 1880 remote-endpoint = <&xbar_mixer_out3_ep>; 1881 }; 1882 }; 1883 1884 mixer_out4_port: port@d { 1885 reg = <0xd>; 1886 1887 mixer_out4_ep: endpoint { 1888 remote-endpoint = <&xbar_mixer_out4_ep>; 1889 }; 1890 }; 1891 1892 mixer_out5_port: port@e { 1893 reg = <0xe>; 1894 1895 mixer_out5_ep: endpoint { 1896 remote-endpoint = <&xbar_mixer_out5_ep>; 1897 }; 1898 }; 1899 }; 1900 }; 1901 1902 asrc@2910000 { 1903 status = "okay"; 1904 1905 ports { 1906 #address-cells = <1>; 1907 #size-cells = <0>; 1908 1909 port@0 { 1910 reg = <0x0>; 1911 1912 asrc_in1_ep: endpoint { 1913 remote-endpoint = <&xbar_asrc_in1_ep>; 1914 }; 1915 }; 1916 1917 port@1 { 1918 reg = <0x1>; 1919 1920 asrc_in2_ep: endpoint { 1921 remote-endpoint = <&xbar_asrc_in2_ep>; 1922 }; 1923 }; 1924 1925 port@2 { 1926 reg = <0x2>; 1927 1928 asrc_in3_ep: endpoint { 1929 remote-endpoint = <&xbar_asrc_in3_ep>; 1930 }; 1931 }; 1932 1933 port@3 { 1934 reg = <0x3>; 1935 1936 asrc_in4_ep: endpoint { 1937 remote-endpoint = <&xbar_asrc_in4_ep>; 1938 }; 1939 }; 1940 1941 port@4 { 1942 reg = <0x4>; 1943 1944 asrc_in5_ep: endpoint { 1945 remote-endpoint = <&xbar_asrc_in5_ep>; 1946 }; 1947 }; 1948 1949 port@5 { 1950 reg = <0x5>; 1951 1952 asrc_in6_ep: endpoint { 1953 remote-endpoint = <&xbar_asrc_in6_ep>; 1954 }; 1955 }; 1956 1957 port@6 { 1958 reg = <0x6>; 1959 1960 asrc_in7_ep: endpoint { 1961 remote-endpoint = <&xbar_asrc_in7_ep>; 1962 }; 1963 }; 1964 1965 asrc_out1_port: port@7 { 1966 reg = <0x7>; 1967 1968 asrc_out1_ep: endpoint { 1969 remote-endpoint = <&xbar_asrc_out1_ep>; 1970 }; 1971 }; 1972 1973 asrc_out2_port: port@8 { 1974 reg = <0x8>; 1975 1976 asrc_out2_ep: endpoint { 1977 remote-endpoint = <&xbar_asrc_out2_ep>; 1978 }; 1979 }; 1980 1981 asrc_out3_port: port@9 { 1982 reg = <0x9>; 1983 1984 asrc_out3_ep: endpoint { 1985 remote-endpoint = <&xbar_asrc_out3_ep>; 1986 }; 1987 }; 1988 1989 asrc_out4_port: port@a { 1990 reg = <0xa>; 1991 1992 asrc_out4_ep: endpoint { 1993 remote-endpoint = <&xbar_asrc_out4_ep>; 1994 }; 1995 }; 1996 1997 asrc_out5_port: port@b { 1998 reg = <0xb>; 1999 2000 asrc_out5_ep: endpoint { 2001 remote-endpoint = <&xbar_asrc_out5_ep>; 2002 }; 2003 }; 2004 2005 asrc_out6_port: port@c { 2006 reg = <0xc>; 2007 2008 asrc_out6_ep: endpoint { 2009 remote-endpoint = <&xbar_asrc_out6_ep>; 2010 }; 2011 }; 2012 }; 2013 }; 2014 }; 2015 }; 2016 2017 ddc: i2c@3190000 { 2018 status = "okay"; 2019 }; 2020 2021 i2c@3160000 { 2022 eeprom@57 { 2023 compatible = "atmel,24c02"; 2024 reg = <0x57>; 2025 2026 label = "system"; 2027 vcc-supply = <&vdd_1v8>; 2028 address-width = <8>; 2029 pagesize = <8>; 2030 size = <256>; 2031 read-only; 2032 }; 2033 }; 2034 2035 hda@3510000 { 2036 nvidia,model = "NVIDIA Jetson Xavier NX HDA"; 2037 status = "okay"; 2038 }; 2039 2040 padctl@3520000 { 2041 status = "okay"; 2042 2043 pads { 2044 usb2 { 2045 lanes { 2046 usb2-0 { 2047 status = "okay"; 2048 }; 2049 2050 usb2-1 { 2051 status = "okay"; 2052 }; 2053 2054 usb2-2 { 2055 status = "okay"; 2056 }; 2057 }; 2058 }; 2059 2060 usb3 { 2061 lanes { 2062 usb3-2 { 2063 status = "okay"; 2064 }; 2065 }; 2066 }; 2067 }; 2068 2069 ports { 2070 usb2-0 { 2071 mode = "otg"; 2072 status = "okay"; 2073 usb-role-switch; 2074 connector { 2075 compatible = "gpio-usb-b-connector", 2076 "usb-b-connector"; 2077 label = "micro-USB"; 2078 type = "micro"; 2079 vbus-gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) 2080 GPIO_ACTIVE_LOW>; 2081 }; 2082 }; 2083 2084 usb2-1 { 2085 mode = "host"; 2086 status = "okay"; 2087 }; 2088 2089 usb2-2 { 2090 mode = "host"; 2091 vbus-supply = <&vdd_5v0_sys>; 2092 status = "okay"; 2093 }; 2094 2095 usb3-2 { 2096 nvidia,usb2-companion = <1>; 2097 vbus-supply = <&vdd_5v0_sys>; 2098 status = "okay"; 2099 }; 2100 }; 2101 }; 2102 2103 usb@3610000 { 2104 status = "okay"; 2105 2106 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>, 2107 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>, 2108 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>; 2109 phy-names = "usb2-1", "usb2-2", "usb3-2"; 2110 }; 2111 2112 usb@3550000 { 2113 status = "okay"; 2114 2115 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>; 2116 phy-names = "usb2-0"; 2117 }; 2118 2119 spi@3270000 { 2120 status = "okay"; 2121 2122 flash@0 { 2123 compatible = "jedec,spi-nor"; 2124 reg = <0>; 2125 spi-max-frequency = <102000000>; 2126 spi-tx-bus-width = <4>; 2127 spi-rx-bus-width = <4>; 2128 }; 2129 }; 2130 2131 pwm@32d0000 { 2132 status = "okay"; 2133 }; 2134 2135 host1x@13e00000 { 2136 display-hub@15200000 { 2137 status = "okay"; 2138 }; 2139 2140 dpaux@155c0000 { 2141 status = "okay"; 2142 }; 2143 2144 dpaux@155d0000 { 2145 status = "okay"; 2146 }; 2147 2148 /* DP0 */ 2149 sor@15b00000 { 2150 status = "okay"; 2151 2152 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 2153 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 2154 2155 nvidia,dpaux = <&dpaux0>; 2156 }; 2157 2158 /* HDMI */ 2159 sor@15b40000 { 2160 status = "okay"; 2161 2162 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 2163 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 2164 hdmi-supply = <&vdd_hdmi>; 2165 2166 nvidia,ddc-i2c-bus = <&ddc>; 2167 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1) 2168 GPIO_ACTIVE_LOW>; 2169 }; 2170 }; 2171 }; 2172 2173 pcie@14160000 { 2174 status = "okay"; 2175 2176 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2177 2178 phys = <&p2u_hsio_11>; 2179 phy-names = "p2u-0"; 2180 }; 2181 2182 pcie@141a0000 { 2183 status = "okay"; 2184 2185 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2186 2187 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2188 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2189 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2190 2191 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2192 "p2u-5", "p2u-6", "p2u-7"; 2193 }; 2194 2195 pcie-ep@141a0000 { 2196 status = "disabled"; 2197 2198 vddio-pex-ctl-supply = <&vdd_1v8ao>; 2199 2200 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; 2201 2202 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) 2203 GPIO_ACTIVE_HIGH>; 2204 2205 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2206 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2207 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2208 2209 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2210 "p2u-5", "p2u-6", "p2u-7"; 2211 }; 2212 2213 fan: pwm-fan { 2214 compatible = "pwm-fan"; 2215 pwms = <&pwm6 0 45334>; 2216 2217 cooling-levels = <0 64 128 255>; 2218 #cooling-cells = <2>; 2219 }; 2220 2221 gpio-keys { 2222 compatible = "gpio-keys"; 2223 2224 force-recovery { 2225 label = "Force Recovery"; 2226 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0) 2227 GPIO_ACTIVE_LOW>; 2228 linux,input-type = <EV_KEY>; 2229 linux,code = <KEY_SLEEP>; 2230 debounce-interval = <10>; 2231 }; 2232 2233 power { 2234 label = "Power"; 2235 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4) 2236 GPIO_ACTIVE_LOW>; 2237 linux,input-type = <EV_KEY>; 2238 linux,code = <KEY_POWER>; 2239 debounce-interval = <10>; 2240 wakeup-event-action = <EV_ACT_ASSERTED>; 2241 wakeup-source; 2242 }; 2243 }; 2244 2245 vdd_5v0_sys: regulator-vdd-5v0-sys { 2246 compatible = "regulator-fixed"; 2247 regulator-name = "VDD_5V_SYS"; 2248 regulator-min-microvolt = <5000000>; 2249 regulator-max-microvolt = <5000000>; 2250 regulator-always-on; 2251 regulator-boot-on; 2252 }; 2253 2254 vdd_3v3_sys: regulator-vdd-3v3-sys { 2255 compatible = "regulator-fixed"; 2256 regulator-name = "VDD_3V3_SYS"; 2257 regulator-min-microvolt = <3300000>; 2258 regulator-max-microvolt = <3300000>; 2259 regulator-always-on; 2260 regulator-boot-on; 2261 }; 2262 2263 vdd_3v3_ao: regulator-vdd-3v3-ao { 2264 compatible = "regulator-fixed"; 2265 regulator-name = "VDD_3V3_AO"; 2266 regulator-min-microvolt = <3300000>; 2267 regulator-max-microvolt = <3300000>; 2268 regulator-always-on; 2269 regulator-boot-on; 2270 }; 2271 2272 vdd_1v8: regulator-vdd-1v8 { 2273 compatible = "regulator-fixed"; 2274 regulator-name = "VDD_1V8"; 2275 regulator-min-microvolt = <1800000>; 2276 regulator-max-microvolt = <1800000>; 2277 regulator-always-on; 2278 regulator-boot-on; 2279 }; 2280 2281 vdd_hdmi: regulator-vdd-hdmi { 2282 compatible = "regulator-fixed"; 2283 regulator-name = "VDD_5V0_HDMI_CON"; 2284 regulator-min-microvolt = <5000000>; 2285 regulator-max-microvolt = <5000000>; 2286 regulator-always-on; 2287 regulator-boot-on; 2288 }; 2289 2290 sound { 2291 compatible = "nvidia,tegra186-audio-graph-card"; 2292 status = "okay"; 2293 2294 dais = /* ADMAIF (FE) Ports */ 2295 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 2296 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, 2297 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, 2298 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, 2299 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, 2300 /* XBAR Ports */ 2301 <&xbar_i2s3_port>, <&xbar_i2s5_port>, 2302 <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic4_port>, 2303 <&xbar_dspk1_port>, <&xbar_dspk2_port>, 2304 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 2305 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 2306 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 2307 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 2308 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 2309 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 2310 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 2311 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, 2312 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, 2313 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, 2314 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, 2315 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 2316 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, 2317 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, 2318 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, 2319 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 2320 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 2321 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 2322 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>, 2323 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2324 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2325 <&xbar_asrc_in7_port>, 2326 /* HW accelerators */ 2327 <&sfc1_out_port>, <&sfc2_out_port>, 2328 <&sfc3_out_port>, <&sfc4_out_port>, 2329 <&mvc1_out_port>, <&mvc2_out_port>, 2330 <&amx1_out_port>, <&amx2_out_port>, 2331 <&amx3_out_port>, <&amx4_out_port>, 2332 <&adx1_out1_port>, <&adx1_out2_port>, 2333 <&adx1_out3_port>, <&adx1_out4_port>, 2334 <&adx2_out1_port>, <&adx2_out2_port>, 2335 <&adx2_out3_port>, <&adx2_out4_port>, 2336 <&adx3_out1_port>, <&adx3_out2_port>, 2337 <&adx3_out3_port>, <&adx3_out4_port>, 2338 <&adx4_out1_port>, <&adx4_out2_port>, 2339 <&adx4_out3_port>, <&adx4_out4_port>, 2340 <&mixer_out1_port>, <&mixer_out2_port>, 2341 <&mixer_out3_port>, <&mixer_out4_port>, 2342 <&mixer_out5_port>, 2343 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2344 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2345 /* BE I/O Ports */ 2346 <&i2s3_port>, <&i2s5_port>, 2347 <&dmic1_port>, <&dmic2_port>, <&dmic4_port>, 2348 <&dspk1_port>, <&dspk2_port>; 2349 2350 label = "NVIDIA Jetson Xavier NX APE"; 2351 }; 2352 2353 thermal-zones { 2354 cpu-thermal { 2355 polling-delay = <0>; 2356 polling-delay-passive = <500>; 2357 status = "okay"; 2358 2359 trips { 2360 cpu_trip_critical: critical { 2361 temperature = <96500>; 2362 hysteresis = <0>; 2363 type = "critical"; 2364 }; 2365 2366 cpu_trip_hot: hot { 2367 temperature = <70000>; 2368 hysteresis = <2000>; 2369 type = "hot"; 2370 }; 2371 2372 cpu_trip_active: active { 2373 temperature = <50000>; 2374 hysteresis = <2000>; 2375 type = "active"; 2376 }; 2377 2378 cpu_trip_passive: passive { 2379 temperature = <30000>; 2380 hysteresis = <2000>; 2381 type = "passive"; 2382 }; 2383 }; 2384 2385 cooling-maps { 2386 cpu-critical { 2387 cooling-device = <&fan 3 3>; 2388 trip = <&cpu_trip_critical>; 2389 }; 2390 2391 cpu-hot { 2392 cooling-device = <&fan 2 2>; 2393 trip = <&cpu_trip_hot>; 2394 }; 2395 2396 cpu-active { 2397 cooling-device = <&fan 1 1>; 2398 trip = <&cpu_trip_active>; 2399 }; 2400 2401 cpu-passive { 2402 cooling-device = <&fan 0 0>; 2403 trip = <&cpu_trip_passive>; 2404 }; 2405 }; 2406 }; 2407 2408 gpu-thermal { 2409 polling-delay = <0>; 2410 polling-delay-passive = <500>; 2411 status = "okay"; 2412 2413 trips { 2414 gpu_alert0: critical { 2415 temperature = <99000>; 2416 hysteresis = <0>; 2417 type = "critical"; 2418 }; 2419 }; 2420 }; 2421 2422 aux-thermal { 2423 polling-delay = <0>; 2424 polling-delay-passive = <500>; 2425 status = "okay"; 2426 2427 trips { 2428 aux_alert0: critical { 2429 temperature = <90000>; 2430 hysteresis = <0>; 2431 type = "critical"; 2432 }; 2433 }; 2434 }; 2435 }; 2436};