cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tegra194-p3668.dtsi (5959B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include "tegra194.dtsi"
      3
      4#include <dt-bindings/mfd/max77620.h>
      5
      6/ {
      7	aliases {
      8		ethernet0 = "/bus@0/ethernet@2490000";
      9		i2c0 = "/bpmp/i2c";
     10		i2c1 = "/bus@0/i2c@3160000";
     11		i2c2 = "/bus@0/i2c@c240000";
     12		i2c3 = "/bus@0/i2c@3180000";
     13		i2c4 = "/bus@0/i2c@3190000";
     14		i2c5 = "/bus@0/i2c@31c0000";
     15		i2c6 = "/bus@0/i2c@c250000";
     16		i2c7 = "/bus@0/i2c@31e0000";
     17		rtc0 = "/bpmp/i2c/pmic@3c";
     18		rtc1 = "/bus@0/rtc@c2a0000";
     19		serial0 = &tcu;
     20	};
     21
     22	chosen {
     23		bootargs = "console=ttyS0,115200n8";
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	bus@0 {
     28		ethernet@2490000 {
     29			status = "okay";
     30
     31			phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
     32			phy-handle = <&phy>;
     33			phy-mode = "rgmii-id";
     34
     35			mdio {
     36				#address-cells = <1>;
     37				#size-cells = <0>;
     38
     39				phy: ethernet-phy@0 {
     40					compatible = "ethernet-phy-ieee802.3-c22";
     41					reg = <0x0>;
     42					interrupt-parent = <&gpio>;
     43					interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
     44					#phy-cells = <0>;
     45				};
     46			};
     47		};
     48
     49		memory-controller@2c00000 {
     50			status = "okay";
     51		};
     52
     53		serial@3100000 {
     54			status = "okay";
     55		};
     56
     57		i2c@3160000 {
     58			status = "okay";
     59
     60			eeprom@50 {
     61				compatible = "atmel,24c02";
     62				reg = <0x50>;
     63
     64				label = "module";
     65				vcc-supply = <&vdd_1v8ls>;
     66				address-width = <8>;
     67				pagesize = <8>;
     68				size = <256>;
     69				read-only;
     70			};
     71		};
     72
     73		padctl@3520000 {
     74			avdd-usb-supply = <&vdd_usb_3v3>;
     75			vclamp-usb-supply = <&vdd_1v8ao>;
     76
     77			ports {
     78				usb2-1 {
     79					vbus-supply = <&vdd_5v0_sys>;
     80				};
     81
     82				usb2-3 {
     83					vbus-supply = <&vdd_5v0_sys>;
     84				};
     85
     86				usb3-0 {
     87					vbus-supply = <&vdd_5v0_sys>;
     88				};
     89
     90				usb3-3 {
     91					vbus-supply = <&vdd_5v0_sys>;
     92				};
     93			};
     94		};
     95
     96		rtc@c2a0000 {
     97			status = "okay";
     98		};
     99
    100		pmc@c360000 {
    101			nvidia,invert-interrupt;
    102		};
    103	};
    104
    105	bpmp {
    106		i2c {
    107			status = "okay";
    108
    109			pmic: pmic@3c {
    110				compatible = "maxim,max20024";
    111				reg = <0x3c>;
    112
    113				interrupt-parent = <&pmc>;
    114				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
    115				#interrupt-cells = <2>;
    116				interrupt-controller;
    117
    118				#gpio-cells = <2>;
    119				gpio-controller;
    120
    121				pinctrl-names = "default";
    122				pinctrl-0 = <&max20024_default>;
    123
    124				max20024_default: pinmux {
    125					gpio0 {
    126						pins = "gpio0";
    127						function = "gpio";
    128					};
    129
    130					gpio1 {
    131						pins = "gpio1";
    132						function = "fps-out";
    133						maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
    134					};
    135
    136					gpio2 {
    137						pins = "gpio2";
    138						function = "fps-out";
    139						maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
    140					};
    141
    142					gpio3 {
    143						pins = "gpio3";
    144						function = "fps-out";
    145						maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
    146					};
    147
    148					gpio4 {
    149						pins = "gpio4";
    150						function = "32k-out1";
    151						drive-push-pull = <1>;
    152					};
    153
    154					gpio6 {
    155						pins = "gpio6";
    156						function = "gpio";
    157						drive-push-pull = <1>;
    158					};
    159
    160					gpio7 {
    161						pins = "gpio7";
    162						function = "gpio";
    163						drive-push-pull = <0>;
    164					};
    165				};
    166
    167				fps {
    168					fps0 {
    169						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    170						maxim,shutdown-fps-time-period-us = <640>;
    171					};
    172
    173					fps1 {
    174						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
    175						maxim,shutdown-fps-time-period-us = <640>;
    176						maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
    177					};
    178
    179					fps2 {
    180						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
    181						maxim,shutdown-fps-time-period-us = <640>;
    182					};
    183				};
    184
    185				regulators {
    186					in-sd0-supply = <&vdd_5v0_sys>;
    187					in-sd1-supply = <&vdd_5v0_sys>;
    188					in-sd2-supply = <&vdd_5v0_sys>;
    189					in-sd3-supply = <&vdd_5v0_sys>;
    190					in-sd4-supply = <&vdd_5v0_sys>;
    191
    192					in-ldo0-1-supply = <&vdd_5v0_sys>;
    193					in-ldo2-supply = <&vdd_5v0_sys>;
    194					in-ldo3-5-supply = <&vdd_5v0_sys>;
    195					in-ldo4-6-supply = <&vdd_5v0_sys>;
    196					in-ldo7-8-supply = <&vdd_1v8ls>;
    197
    198					vdd_1v0: sd0 {
    199						regulator-name = "VDDIO_SYS_1V0";
    200						regulator-min-microvolt = <1000000>;
    201						regulator-max-microvolt = <1000000>;
    202						regulator-always-on;
    203						regulator-boot-on;
    204					};
    205
    206					vdd_1v8hs: sd1 {
    207						regulator-name = "VDDIO_SYS_1V8HS";
    208						regulator-min-microvolt = <1800000>;
    209						regulator-max-microvolt = <1800000>;
    210						regulator-always-on;
    211						regulator-boot-on;
    212					};
    213
    214					vdd_1v8ls: sd2 {
    215						regulator-name = "VDDIO_SYS_1V8LS";
    216						regulator-min-microvolt = <1800000>;
    217						regulator-max-microvolt = <1800000>;
    218						regulator-always-on;
    219						regulator-boot-on;
    220					};
    221
    222					vdd_1v8ao: sd3 {
    223						regulator-name = "VDDIO_AO_1V8";
    224						regulator-min-microvolt = <1800000>;
    225						regulator-max-microvolt = <1800000>;
    226						regulator-always-on;
    227						regulator-boot-on;
    228					};
    229
    230					sd4 {
    231						regulator-name = "VDD_DDR_1V1";
    232						regulator-min-microvolt = <1100000>;
    233						regulator-max-microvolt = <1100000>;
    234						regulator-always-on;
    235						regulator-boot-on;
    236					};
    237
    238					ldo0 {
    239						regulator-name = "VDD_RTC";
    240						regulator-min-microvolt = <800000>;
    241						regulator-max-microvolt = <800000>;
    242						regulator-always-on;
    243						regulator-boot-on;
    244					};
    245
    246					ldo2 {
    247						regulator-name = "VDDIO_AO_3V3";
    248						regulator-min-microvolt = <3300000>;
    249						regulator-max-microvolt = <3300000>;
    250						regulator-always-on;
    251						regulator-boot-on;
    252					};
    253
    254					vdd_emmc_3v3: ldo3 {
    255						regulator-name = "VDD_EMMC_3V3";
    256						regulator-min-microvolt = <3300000>;
    257						regulator-max-microvolt = <3300000>;
    258					};
    259
    260					vdd_usb_3v3: ldo5 {
    261						regulator-name = "VDD_USB_3V3";
    262						regulator-min-microvolt = <3300000>;
    263						regulator-max-microvolt = <3300000>;
    264						regulator-always-on;
    265						regulator-boot-on;
    266					};
    267
    268					ldo6 {
    269						regulator-name = "VDD_SDIO_3V3";
    270						regulator-min-microvolt = <3300000>;
    271						regulator-max-microvolt = <3300000>;
    272					};
    273
    274					ldo7 {
    275						regulator-name = "AVDD_CSI_1V2";
    276						regulator-min-microvolt = <1200000>;
    277						regulator-max-microvolt = <1200000>;
    278					};
    279				};
    280			};
    281		};
    282	};
    283};