cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tegra210-p2894.dtsi (55598B)


      1// SPDX-License-Identifier: GPL-2.0
      2
      3#include <dt-bindings/input/input.h>
      4#include <dt-bindings/input/gpio-keys.h>
      5#include <dt-bindings/mfd/max77620.h>
      6#include <dt-bindings/pinctrl/pinctrl-tegra.h>
      7#include "tegra210.dtsi"
      8
      9/ {
     10	aliases {
     11		serial0 = &uarta;
     12	};
     13
     14	chosen {
     15		bootargs = "earlycon";
     16		stdout-path = "serial0:115200n8";
     17	};
     18
     19	memory@80000000 {
     20		device_type = "memory";
     21		reg = <0x0 0x80000000 0x0 0xc0000000>;
     22	};
     23
     24	pinmux: pinmux@700008d4 {
     25		status = "okay";
     26		pinctrl-names = "boot";
     27		pinctrl-0 = <&state_boot>;
     28
     29		state_boot: pinmux {
     30			pex_l0_rst_n_pa0 {
     31				nvidia,pins = "pex_l0_rst_n_pa0";
     32				nvidia,function = "rsvd1";
     33				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     34				nvidia,tristate = <TEGRA_PIN_ENABLE>;
     35				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     36				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     37				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
     38			};
     39			pex_l0_clkreq_n_pa1 {
     40				nvidia,pins = "pex_l0_clkreq_n_pa1";
     41				nvidia,function = "pe0";
     42				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
     43				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     44				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     45				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     46				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
     47			};
     48			pex_wake_n_pa2 {
     49				nvidia,pins = "pex_wake_n_pa2";
     50				nvidia,function = "pe";
     51				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
     52				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     53				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     54				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     55				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
     56			};
     57			pex_l1_rst_n_pa3 {
     58				nvidia,pins = "pex_l1_rst_n_pa3";
     59				nvidia,function = "pe1";
     60				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
     61				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     62				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     63				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     64				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
     65			};
     66			pex_l1_clkreq_n_pa4 {
     67				nvidia,pins = "pex_l1_clkreq_n_pa4";
     68				nvidia,function = "pe1";
     69				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
     70				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     71				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     72				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     73				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
     74			};
     75			sata_led_active_pa5 {
     76				nvidia,pins = "sata_led_active_pa5";
     77				nvidia,pull = <TEGRA_PIN_PULL_UP>;
     78				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     79				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     80				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     81			};
     82			pa6 {
     83				nvidia,pins = "pa6";
     84				nvidia,function = "rsvd1";
     85				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     86				nvidia,tristate = <TEGRA_PIN_ENABLE>;
     87				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     88				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     89			};
     90			dap1_fs_pb0 {
     91				nvidia,pins = "dap1_fs_pb0";
     92				nvidia,function = "rsvd1";
     93				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     94				nvidia,tristate = <TEGRA_PIN_ENABLE>;
     95				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     96				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
     97			};
     98			dap1_din_pb1 {
     99				nvidia,pins = "dap1_din_pb1";
    100				nvidia,function = "rsvd1";
    101				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    102				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    103				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    104				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    105			};
    106			dap1_dout_pb2 {
    107				nvidia,pins = "dap1_dout_pb2";
    108				nvidia,function = "rsvd1";
    109				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    110				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    111				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    112				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    113			};
    114			dap1_sclk_pb3 {
    115				nvidia,pins = "dap1_sclk_pb3";
    116				nvidia,function = "rsvd1";
    117				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    118				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    119				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    120				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    121			};
    122			spi2_mosi_pb4 {
    123				nvidia,pins = "spi2_mosi_pb4";
    124				nvidia,function = "rsvd2";
    125				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    126				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    127				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    128				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    129			};
    130			spi2_miso_pb5 {
    131				nvidia,pins = "spi2_miso_pb5";
    132				nvidia,function = "rsvd2";
    133				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    134				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    135				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    136				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    137			};
    138			spi2_sck_pb6 {
    139				nvidia,pins = "spi2_sck_pb6";
    140				nvidia,function = "rsvd2";
    141				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    142				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    143				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    144				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    145			};
    146			spi2_cs0_pb7 {
    147				nvidia,pins = "spi2_cs0_pb7";
    148				nvidia,function = "rsvd2";
    149				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    150				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    151				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    152				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    153			};
    154			spi1_mosi_pc0 {
    155				nvidia,pins = "spi1_mosi_pc0";
    156				nvidia,function = "rsvd1";
    157				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    158				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    159				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    160				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    161			};
    162			spi1_miso_pc1 {
    163				nvidia,pins = "spi1_miso_pc1";
    164				nvidia,function = "rsvd1";
    165				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    166				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    167				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    168				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    169			};
    170			spi1_sck_pc2 {
    171				nvidia,pins = "spi1_sck_pc2";
    172				nvidia,function = "rsvd1";
    173				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    174				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    175				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    176				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    177			};
    178			spi1_cs0_pc3 {
    179				nvidia,pins = "spi1_cs0_pc3";
    180				nvidia,function = "rsvd1";
    181				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    182				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    183				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    184				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    185			};
    186			spi1_cs1_pc4 {
    187				nvidia,pins = "spi1_cs1_pc4";
    188				nvidia,function = "rsvd1";
    189				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    190				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    191				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    192				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    193			};
    194			spi4_sck_pc5 {
    195				nvidia,pins = "spi4_sck_pc5";
    196				nvidia,function = "rsvd1";
    197				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    198				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    199				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    200				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    201			};
    202			spi4_cs0_pc6 {
    203				nvidia,pins = "spi4_cs0_pc6";
    204				nvidia,function = "rsvd1";
    205				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    206				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    207				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    208				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    209			};
    210			spi4_mosi_pc7 {
    211				nvidia,pins = "spi4_mosi_pc7";
    212				nvidia,function = "rsvd1";
    213				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    214				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    215				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    216				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    217			};
    218			spi4_miso_pd0 {
    219				nvidia,pins = "spi4_miso_pd0";
    220				nvidia,function = "rsvd1";
    221				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    222				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    223				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    224				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    225			};
    226			uart3_tx_pd1 {
    227				nvidia,pins = "uart3_tx_pd1";
    228				nvidia,function = "rsvd2";
    229				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    230				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    231				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    232				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    233			};
    234			uart3_rx_pd2 {
    235				nvidia,pins = "uart3_rx_pd2";
    236				nvidia,function = "rsvd2";
    237				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    238				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    239				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    240				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    241			};
    242			uart3_rts_pd3 {
    243				nvidia,pins = "uart3_rts_pd3";
    244				nvidia,function = "rsvd2";
    245				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    246				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    247				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    248				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    249			};
    250			uart3_cts_pd4 {
    251				nvidia,pins = "uart3_cts_pd4";
    252				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    253				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    254				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    255				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    256			};
    257			dmic1_clk_pe0 {
    258				nvidia,pins = "dmic1_clk_pe0";
    259				nvidia,function = "rsvd2";
    260				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    261				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    262				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    263				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    264			};
    265			dmic1_dat_pe1 {
    266				nvidia,pins = "dmic1_dat_pe1";
    267				nvidia,function = "rsvd2";
    268				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    269				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    270				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    271				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    272			};
    273			dmic2_clk_pe2 {
    274				nvidia,pins = "dmic2_clk_pe2";
    275				nvidia,function = "rsvd2";
    276				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    277				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    278				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    279				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    280			};
    281			dmic2_dat_pe3 {
    282				nvidia,pins = "dmic2_dat_pe3";
    283				nvidia,function = "rsvd2";
    284				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    285				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    286				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    287				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    288			};
    289			dmic3_clk_pe4 {
    290				nvidia,pins = "dmic3_clk_pe4";
    291				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    292				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    293				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    294				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    295			};
    296			dmic3_dat_pe5 {
    297				nvidia,pins = "dmic3_dat_pe5";
    298				nvidia,function = "rsvd2";
    299				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    300				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    301				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    302				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    303			};
    304			pe6 {
    305				nvidia,pins = "pe6";
    306				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    307				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    308				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    309				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    310			};
    311			pe7 {
    312				nvidia,pins = "pe7";
    313				nvidia,function = "pwm3";
    314				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    315				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    316				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    317				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    318			};
    319			gen3_i2c_scl_pf0 {
    320				nvidia,pins = "gen3_i2c_scl_pf0";
    321				nvidia,function = "i2c3";
    322				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    323				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    324				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    325				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    326				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    327			};
    328			gen3_i2c_sda_pf1 {
    329				nvidia,pins = "gen3_i2c_sda_pf1";
    330				nvidia,function = "i2c3";
    331				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    332				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    333				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    334				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    335				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    336			};
    337			uart2_tx_pg0 {
    338				nvidia,pins = "uart2_tx_pg0";
    339				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    340				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    341				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    342				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    343			};
    344			uart2_rx_pg1 {
    345				nvidia,pins = "uart2_rx_pg1";
    346				nvidia,function = "uartb";
    347				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    348				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    349				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    350				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    351			};
    352			uart2_rts_pg2 {
    353				nvidia,pins = "uart2_rts_pg2";
    354				nvidia,function = "rsvd2";
    355				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    356				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    357				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    358				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    359			};
    360			uart2_cts_pg3 {
    361				nvidia,pins = "uart2_cts_pg3";
    362				nvidia,function = "rsvd2";
    363				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    364				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    365				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    366				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    367			};
    368			wifi_en_ph0 {
    369				nvidia,pins = "wifi_en_ph0";
    370				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    371				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    372				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    373				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    374			};
    375			wifi_rst_ph1 {
    376				nvidia,pins = "wifi_rst_ph1";
    377				nvidia,function = "rsvd0";
    378				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    379				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    380				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    381				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    382			};
    383			wifi_wake_ap_ph2 {
    384				nvidia,pins = "wifi_wake_ap_ph2";
    385				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    386				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    387				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    388				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    389			};
    390			ap_wake_bt_ph3 {
    391				nvidia,pins = "ap_wake_bt_ph3";
    392				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    393				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    394				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    395				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    396			};
    397			bt_rst_ph4 {
    398				nvidia,pins = "bt_rst_ph4";
    399				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    400				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    401				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    402				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    403			};
    404			bt_wake_ap_ph5 {
    405				nvidia,pins = "bt_wake_ap_ph5";
    406				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    407				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    408				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    409				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    410			};
    411			ph6 {
    412				nvidia,pins = "ph6";
    413				nvidia,function = "rsvd0";
    414				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    415				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    416				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    417				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    418			};
    419			ap_wake_nfc_ph7 {
    420				nvidia,pins = "ap_wake_nfc_ph7";
    421				nvidia,function = "rsvd0";
    422				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    423				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    424				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    425				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    426			};
    427			nfc_en_pi0 {
    428				nvidia,pins = "nfc_en_pi0";
    429				nvidia,function = "rsvd0";
    430				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    431				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    432				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    433				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    434			};
    435			nfc_int_pi1 {
    436				nvidia,pins = "nfc_int_pi1";
    437				nvidia,function = "rsvd0";
    438				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    439				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    440				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    441				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    442			};
    443			gps_en_pi2 {
    444				nvidia,pins = "gps_en_pi2";
    445				nvidia,function = "rsvd0";
    446				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    447				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    448				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    449				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    450			};
    451			gps_rst_pi3 {
    452				nvidia,pins = "gps_rst_pi3";
    453				nvidia,function = "rsvd0";
    454				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    455				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    456				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    457				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    458			};
    459			uart4_tx_pi4 {
    460				nvidia,pins = "uart4_tx_pi4";
    461				nvidia,function = "uartd";
    462				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    463				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    464				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    465				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    466			};
    467			uart4_rx_pi5 {
    468				nvidia,pins = "uart4_rx_pi5";
    469				nvidia,function = "uartd";
    470				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    471				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    472				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    473				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    474			};
    475			uart4_rts_pi6 {
    476				nvidia,pins = "uart4_rts_pi6";
    477				nvidia,function = "uartd";
    478				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    479				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    480				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    481				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    482			};
    483			uart4_cts_pi7 {
    484				nvidia,pins = "uart4_cts_pi7";
    485				nvidia,function = "uartd";
    486				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    487				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    488				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    489				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    490			};
    491			gen1_i2c_sda_pj0 {
    492				nvidia,pins = "gen1_i2c_sda_pj0";
    493				nvidia,function = "i2c1";
    494				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    495				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    496				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    497				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    498				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    499			};
    500			gen1_i2c_scl_pj1 {
    501				nvidia,pins = "gen1_i2c_scl_pj1";
    502				nvidia,function = "i2c1";
    503				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    504				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    505				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    506				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    507				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    508			};
    509			gen2_i2c_scl_pj2 {
    510				nvidia,pins = "gen2_i2c_scl_pj2";
    511				nvidia,function = "i2c2";
    512				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    513				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    514				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    515				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    516				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
    517			};
    518			gen2_i2c_sda_pj3 {
    519				nvidia,pins = "gen2_i2c_sda_pj3";
    520				nvidia,function = "i2c2";
    521				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    522				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    523				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    524				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    525				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
    526			};
    527			dap4_fs_pj4 {
    528				nvidia,pins = "dap4_fs_pj4";
    529				nvidia,function = "rsvd1";
    530				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    531				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    532				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    533				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    534			};
    535			dap4_din_pj5 {
    536				nvidia,pins = "dap4_din_pj5";
    537				nvidia,function = "rsvd1";
    538				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    539				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    540				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    541				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    542			};
    543			dap4_dout_pj6 {
    544				nvidia,pins = "dap4_dout_pj6";
    545				nvidia,function = "rsvd1";
    546				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    547				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    548				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    549				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    550			};
    551			dap4_sclk_pj7 {
    552				nvidia,pins = "dap4_sclk_pj7";
    553				nvidia,function = "rsvd1";
    554				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    555				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    556				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    557				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    558			};
    559			pk0 {
    560				nvidia,pins = "pk0";
    561				nvidia,function = "rsvd2";
    562				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    563				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    564				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    565				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    566			};
    567			pk1 {
    568				nvidia,pins = "pk1";
    569				nvidia,function = "rsvd2";
    570				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    571				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    572				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    573				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    574			};
    575			pk2 {
    576				nvidia,pins = "pk2";
    577				nvidia,function = "rsvd2";
    578				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    579				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    580				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    581				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    582			};
    583			pk3 {
    584				nvidia,pins = "pk3";
    585				nvidia,function = "rsvd2";
    586				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    587				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    588				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    589				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    590			};
    591			pk4 {
    592				nvidia,pins = "pk4";
    593				nvidia,function = "rsvd1";
    594				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    595				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    596				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    597				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    598			};
    599			pk5 {
    600				nvidia,pins = "pk5";
    601				nvidia,function = "rsvd1";
    602				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    603				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    604				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    605				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    606			};
    607			pk6 {
    608				nvidia,pins = "pk6";
    609				nvidia,function = "rsvd1";
    610				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    611				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    612				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    613				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    614			};
    615			pk7 {
    616				nvidia,pins = "pk7";
    617				nvidia,function = "rsvd1";
    618				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    619				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    620				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    621				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    622			};
    623			pl0 {
    624				nvidia,pins = "pl0";
    625				nvidia,function = "rsvd0";
    626				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    627				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    628				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    629				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    630			};
    631			pl1 {
    632				nvidia,pins = "pl1";
    633				nvidia,function = "rsvd1";
    634				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    635				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    636				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    637				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    638			};
    639			sdmmc1_clk_pm0 {
    640				nvidia,pins = "sdmmc1_clk_pm0";
    641				nvidia,function = "rsvd1";
    642				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    643				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    644				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    645				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    646			};
    647			sdmmc1_cmd_pm1 {
    648				nvidia,pins = "sdmmc1_cmd_pm1";
    649				nvidia,function = "rsvd2";
    650				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    651				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    652				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    653				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    654			};
    655			sdmmc1_dat3_pm2 {
    656				nvidia,pins = "sdmmc1_dat3_pm2";
    657				nvidia,function = "rsvd2";
    658				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    659				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    660				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    661				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    662			};
    663			sdmmc1_dat2_pm3 {
    664				nvidia,pins = "sdmmc1_dat2_pm3";
    665				nvidia,function = "rsvd2";
    666				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    667				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    668				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    669				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    670			};
    671			sdmmc1_dat1_pm4 {
    672				nvidia,pins = "sdmmc1_dat1_pm4";
    673				nvidia,function = "rsvd2";
    674				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    675				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    676				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    677				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    678			};
    679			sdmmc1_dat0_pm5 {
    680				nvidia,pins = "sdmmc1_dat0_pm5";
    681				nvidia,function = "rsvd1";
    682				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    683				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    684				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    685				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    686			};
    687			sdmmc3_clk_pp0 {
    688				nvidia,pins = "sdmmc3_clk_pp0";
    689				nvidia,function = "rsvd1";
    690				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    691				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    692				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    693				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    694			};
    695			sdmmc3_cmd_pp1 {
    696				nvidia,pins = "sdmmc3_cmd_pp1";
    697				nvidia,function = "rsvd1";
    698				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    699				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    700				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    701				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    702			};
    703			sdmmc3_dat3_pp2 {
    704				nvidia,pins = "sdmmc3_dat3_pp2";
    705				nvidia,function = "rsvd1";
    706				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    707				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    708				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    709				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    710			};
    711			sdmmc3_dat2_pp3 {
    712				nvidia,pins = "sdmmc3_dat2_pp3";
    713				nvidia,function = "rsvd1";
    714				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    715				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    716				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    717				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    718			};
    719			sdmmc3_dat1_pp4 {
    720				nvidia,pins = "sdmmc3_dat1_pp4";
    721				nvidia,function = "rsvd1";
    722				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    723				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    724				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    725				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    726			};
    727			sdmmc3_dat0_pp5 {
    728				nvidia,pins = "sdmmc3_dat0_pp5";
    729				nvidia,function = "rsvd1";
    730				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    731				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    732				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    733				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    734			};
    735			cam1_mclk_ps0 {
    736				nvidia,pins = "cam1_mclk_ps0";
    737				nvidia,function = "rsvd1";
    738				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    739				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    740				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    741				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    742			};
    743			cam2_mclk_ps1 {
    744				nvidia,pins = "cam2_mclk_ps1";
    745				nvidia,function = "rsvd1";
    746				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    747				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    748				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    749				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    750			};
    751			cam_i2c_scl_ps2 {
    752				nvidia,pins = "cam_i2c_scl_ps2";
    753				nvidia,function = "rsvd2";
    754				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    755				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    756				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    757				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    758				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    759			};
    760			cam_i2c_sda_ps3 {
    761				nvidia,pins = "cam_i2c_sda_ps3";
    762				nvidia,function = "rsvd2";
    763				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    764				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    765				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    766				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    767				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
    768			};
    769			cam_rst_ps4 {
    770				nvidia,pins = "cam_rst_ps4";
    771				nvidia,function = "rsvd1";
    772				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    773				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    774				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    775				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    776			};
    777			cam_af_en_ps5 {
    778				nvidia,pins = "cam_af_en_ps5";
    779				nvidia,function = "rsvd2";
    780				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    781				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    782				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    783				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    784			};
    785			cam_flash_en_ps6 {
    786				nvidia,pins = "cam_flash_en_ps6";
    787				nvidia,function = "rsvd2";
    788				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    789				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    790				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    791				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    792			};
    793			cam1_pwdn_ps7 {
    794				nvidia,pins = "cam1_pwdn_ps7";
    795				nvidia,function = "rsvd1";
    796				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    797				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    798				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    799				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    800			};
    801			cam2_pwdn_pt0 {
    802				nvidia,pins = "cam2_pwdn_pt0";
    803				nvidia,function = "rsvd1";
    804				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    805				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    806				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    807				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    808			};
    809			cam1_strobe_pt1 {
    810				nvidia,pins = "cam1_strobe_pt1";
    811				nvidia,function = "rsvd1";
    812				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    813				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    814				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    815				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    816			};
    817			uart1_tx_pu0 {
    818				nvidia,pins = "uart1_tx_pu0";
    819				nvidia,function = "uarta";
    820				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    821				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    822				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    823				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    824			};
    825			uart1_rx_pu1 {
    826				nvidia,pins = "uart1_rx_pu1";
    827				nvidia,function = "uarta";
    828				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    829				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    830				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    831				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    832			};
    833			uart1_rts_pu2 {
    834				nvidia,pins = "uart1_rts_pu2";
    835				nvidia,function = "uarta";
    836				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    837				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    838				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    839				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    840			};
    841			uart1_cts_pu3 {
    842				nvidia,pins = "uart1_cts_pu3";
    843				nvidia,function = "uarta";
    844				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    845				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    846				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    847				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    848			};
    849			lcd_bl_pwm_pv0 {
    850				nvidia,pins = "lcd_bl_pwm_pv0";
    851				nvidia,function = "pwm0";
    852				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    853				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    854				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    855				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    856			};
    857			lcd_bl_en_pv1 {
    858				nvidia,pins = "lcd_bl_en_pv1";
    859				nvidia,function = "rsvd0";
    860				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    861				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    862				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    863				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    864			};
    865			lcd_rst_pv2 {
    866				nvidia,pins = "lcd_rst_pv2";
    867				nvidia,function = "rsvd0";
    868				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    869				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    870				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    871				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    872			};
    873			lcd_gpio1_pv3 {
    874				nvidia,pins = "lcd_gpio1_pv3";
    875				nvidia,function = "rsvd1";
    876				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    877				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    878				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    879				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    880			};
    881			lcd_gpio2_pv4 {
    882				nvidia,pins = "lcd_gpio2_pv4";
    883				nvidia,function = "pwm1";
    884				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    885				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    886				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    887				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    888			};
    889			ap_ready_pv5 {
    890				nvidia,pins = "ap_ready_pv5";
    891				nvidia,function = "rsvd0";
    892				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    893				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    894				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    895				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    896			};
    897			touch_rst_pv6 {
    898				nvidia,pins = "touch_rst_pv6";
    899				nvidia,function = "rsvd0";
    900				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    901				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    902				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    903				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    904			};
    905			touch_clk_pv7 {
    906				nvidia,pins = "touch_clk_pv7";
    907				nvidia,function = "rsvd1";
    908				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    909				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    910				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    911				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    912			};
    913			modem_wake_ap_px0 {
    914				nvidia,pins = "modem_wake_ap_px0";
    915				nvidia,function = "rsvd0";
    916				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    917				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    918				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    919				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    920			};
    921			touch_int_px1 {
    922				nvidia,pins = "touch_int_px1";
    923				nvidia,function = "rsvd0";
    924				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    925				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    926				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    927				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    928			};
    929			motion_int_px2 {
    930				nvidia,pins = "motion_int_px2";
    931				nvidia,function = "rsvd0";
    932				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    933				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    934				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    935				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    936			};
    937			als_prox_int_px3 {
    938				nvidia,pins = "als_prox_int_px3";
    939				nvidia,function = "rsvd0";
    940				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    941				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    942				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    943				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    944			};
    945			temp_alert_px4 {
    946				nvidia,pins = "temp_alert_px4";
    947				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    948				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    949				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    950				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    951			};
    952			button_power_on_px5 {
    953				nvidia,pins = "button_power_on_px5";
    954				nvidia,function = "rsvd0";
    955				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    956				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    957				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    958				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    959			};
    960			button_vol_up_px6 {
    961				nvidia,pins = "button_vol_up_px6";
    962				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    963				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    964				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    965				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    966			};
    967			button_vol_down_px7 {
    968				nvidia,pins = "button_vol_down_px7";
    969				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    970				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    971				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    972				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    973			};
    974			button_slide_sw_py0 {
    975				nvidia,pins = "button_slide_sw_py0";
    976				nvidia,function = "rsvd0";
    977				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    978				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    979				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    980				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    981			};
    982			button_home_py1 {
    983				nvidia,pins = "button_home_py1";
    984				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    985				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    986				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    987				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    988			};
    989			lcd_te_py2 {
    990				nvidia,pins = "lcd_te_py2";
    991				nvidia,function = "rsvd1";
    992				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    993				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    994				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    995				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    996			};
    997			pwr_i2c_scl_py3 {
    998				nvidia,pins = "pwr_i2c_scl_py3";
    999				nvidia,function = "i2cpmu";
   1000				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1001				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1002				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1003				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1004				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
   1005			};
   1006			pwr_i2c_sda_py4 {
   1007				nvidia,pins = "pwr_i2c_sda_py4";
   1008				nvidia,function = "i2cpmu";
   1009				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1010				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1011				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1012				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1013				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
   1014			};
   1015			clk_32k_out_py5 {
   1016				nvidia,pins = "clk_32k_out_py5";
   1017				nvidia,function = "rsvd2";
   1018				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1019				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1020				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1021				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1022			};
   1023			pz0 {
   1024				nvidia,pins = "pz0";
   1025				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1026				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1027				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1028				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1029			};
   1030			pz1 {
   1031				nvidia,pins = "pz1";
   1032				nvidia,function = "rsvd2";
   1033				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1034				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1035				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1036				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1037			};
   1038			pz2 {
   1039				nvidia,pins = "pz2";
   1040				nvidia,function = "rsvd2";
   1041				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1042				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1043				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1044				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1045			};
   1046			pz3 {
   1047				nvidia,pins = "pz3";
   1048				nvidia,function = "rsvd1";
   1049				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1050				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1051				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1052				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1053			};
   1054			pz4 {
   1055				nvidia,pins = "pz4";
   1056				nvidia,function = "rsvd1";
   1057				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1058				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1059				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1060				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1061			};
   1062			pz5 {
   1063				nvidia,pins = "pz5";
   1064				nvidia,function = "soc";
   1065				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1066				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1067				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1068				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1069			};
   1070			dap2_fs_paa0 {
   1071				nvidia,pins = "dap2_fs_paa0";
   1072				nvidia,function = "i2s2";
   1073				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1074				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1075				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1076				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1077			};
   1078			dap2_sclk_paa1 {
   1079				nvidia,pins = "dap2_sclk_paa1";
   1080				nvidia,function = "i2s2";
   1081				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1082				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1083				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1084				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1085			};
   1086			dap2_din_paa2 {
   1087				nvidia,pins = "dap2_din_paa2";
   1088				nvidia,function = "i2s2";
   1089				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1090				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1091				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1092				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1093			};
   1094			dap2_dout_paa3 {
   1095				nvidia,pins = "dap2_dout_paa3";
   1096				nvidia,function = "i2s2";
   1097				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1098				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1099				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1100				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1101			};
   1102			aud_mclk_pbb0 {
   1103				nvidia,pins = "aud_mclk_pbb0";
   1104				nvidia,function = "rsvd1";
   1105				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1106				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1107				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1108				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1109			};
   1110			dvfs_pwm_pbb1 {
   1111				nvidia,pins = "dvfs_pwm_pbb1";
   1112				nvidia,function = "cldvfs";
   1113				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1114				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1115				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1116				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1117			};
   1118			dvfs_clk_pbb2 {
   1119				nvidia,pins = "dvfs_clk_pbb2";
   1120				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1121				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1122				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1123				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1124			};
   1125			gpio_x1_aud_pbb3 {
   1126				nvidia,pins = "gpio_x1_aud_pbb3";
   1127				nvidia,function = "rsvd0";
   1128				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1129				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1130				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1131				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1132			};
   1133			gpio_x3_aud_pbb4 {
   1134				nvidia,pins = "gpio_x3_aud_pbb4";
   1135				nvidia,function = "rsvd0";
   1136				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1137				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1138				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1139				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1140			};
   1141			hdmi_cec_pcc0 {
   1142				nvidia,pins = "hdmi_cec_pcc0";
   1143				nvidia,function = "cec";
   1144				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1145				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1146				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1147				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1148				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
   1149			};
   1150			hdmi_int_dp_hpd_pcc1 {
   1151				nvidia,pins = "hdmi_int_dp_hpd_pcc1";
   1152				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1153				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1154				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1155				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1156				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
   1157			};
   1158			spdif_out_pcc2 {
   1159				nvidia,pins = "spdif_out_pcc2";
   1160				nvidia,function = "rsvd1";
   1161				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1162				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1163				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1164				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1165			};
   1166			spdif_in_pcc3 {
   1167				nvidia,pins = "spdif_in_pcc3";
   1168				nvidia,function = "rsvd1";
   1169				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1170				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1171				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1172				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1173			};
   1174			usb_vbus_en0_pcc4 {
   1175				nvidia,pins = "usb_vbus_en0_pcc4";
   1176				nvidia,function = "usb";
   1177				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1178				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1179				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1180				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1181				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
   1182			};
   1183			usb_vbus_en1_pcc5 {
   1184				nvidia,pins = "usb_vbus_en1_pcc5";
   1185				nvidia,function = "usb";
   1186				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1187				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1188				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1189				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1190				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
   1191			};
   1192			dp_hpd0_pcc6 {
   1193				nvidia,pins = "dp_hpd0_pcc6";
   1194				nvidia,function = "rsvd1";
   1195				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1196				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1197				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1198				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1199			};
   1200			pcc7 {
   1201				nvidia,pins = "pcc7";
   1202				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1203				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1204				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1205				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1206				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
   1207			};
   1208			spi2_cs1_pdd0 {
   1209				nvidia,pins = "spi2_cs1_pdd0";
   1210				nvidia,function = "rsvd1";
   1211				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1212				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1213				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1214				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1215			};
   1216			qspi_sck_pee0 {
   1217				nvidia,pins = "qspi_sck_pee0";
   1218				nvidia,function = "rsvd1";
   1219				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1220				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1221				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1222				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1223			};
   1224			qspi_cs_n_pee1 {
   1225				nvidia,pins = "qspi_cs_n_pee1";
   1226				nvidia,function = "rsvd1";
   1227				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1228				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1229				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1230				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1231			};
   1232			qspi_io0_pee2 {
   1233				nvidia,pins = "qspi_io0_pee2";
   1234				nvidia,function = "rsvd1";
   1235				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1236				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1237				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1238				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1239			};
   1240			qspi_io1_pee3 {
   1241				nvidia,pins = "qspi_io1_pee3";
   1242				nvidia,function = "rsvd1";
   1243				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1244				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1245				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1246				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1247			};
   1248			qspi_io2_pee4 {
   1249				nvidia,pins = "qspi_io2_pee4";
   1250				nvidia,function = "rsvd1";
   1251				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1252				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1253				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1254				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1255			};
   1256			qspi_io3_pee5 {
   1257				nvidia,pins = "qspi_io3_pee5";
   1258				nvidia,function = "rsvd1";
   1259				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1260				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1261				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1262				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1263			};
   1264			core_pwr_req {
   1265				nvidia,pins = "core_pwr_req";
   1266				nvidia,function = "core";
   1267				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1268				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1269				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1270				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1271			};
   1272			cpu_pwr_req {
   1273				nvidia,pins = "cpu_pwr_req";
   1274				nvidia,function = "rsvd1";
   1275				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1276				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1277				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1278				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1279			};
   1280			pwr_int_n {
   1281				nvidia,pins = "pwr_int_n";
   1282				nvidia,function = "pmi";
   1283				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1284				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1285				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1286				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1287			};
   1288			clk_32k_in {
   1289				nvidia,pins = "clk_32k_in";
   1290				nvidia,function = "clk";
   1291				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1292				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1293				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1294				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1295			};
   1296			jtag_rtck {
   1297				nvidia,pins = "jtag_rtck";
   1298				nvidia,function = "jtag";
   1299				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1300				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1301				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1302				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1303			};
   1304			clk_req {
   1305				nvidia,pins = "clk_req";
   1306				nvidia,function = "rsvd1";
   1307				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1308				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1309				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1310				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1311			};
   1312			shutdown {
   1313				nvidia,pins = "shutdown";
   1314				nvidia,function = "shutdown";
   1315				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1316				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1317				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1318				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1319			};
   1320		};
   1321	};
   1322
   1323	serial@70006000 {
   1324		status = "okay";
   1325	};
   1326
   1327	i2c@7000d000 {
   1328		status = "okay";
   1329		clock-frequency = <400000>;
   1330
   1331		pmic: pmic@3c {
   1332			compatible = "maxim,max77620";
   1333			reg = <0x3c>;
   1334			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
   1335
   1336			#interrupt-cells = <2>;
   1337			interrupt-controller;
   1338
   1339			gpio-controller;
   1340			#gpio-cells = <2>;
   1341
   1342			pinctrl-names = "default";
   1343			pinctrl-0 = <&max77620_default>;
   1344
   1345			max77620_default: pinmux@0 {
   1346				gpio0 {
   1347					pins = "gpio0";
   1348					function = "gpio";
   1349				};
   1350
   1351				gpio1 {
   1352					pins = "gpio1";
   1353					function = "fps-out";
   1354					drive-push-pull = <1>;
   1355					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1356					maxim,active-fps-power-up-slot = <7>;
   1357					maxim,active-fps-power-down-slot = <0>;
   1358				};
   1359
   1360				gpio2 {
   1361					pins = "gpio2";
   1362					function = "fps-out";
   1363					drive-open-drain = <1>;
   1364					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1365				};
   1366
   1367				gpio3 {
   1368					pins = "gpio3";
   1369					function = "fps-out";
   1370					drive-open-drain = <1>;
   1371					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1372				};
   1373
   1374				gpio4 {
   1375					pins = "gpio4";
   1376					function = "32k-out1";
   1377				};
   1378
   1379				gpio5_6_7 {
   1380					pins = "gpio5", "gpio6", "gpio7";
   1381					function = "gpio";
   1382					drive-push-pull = <1>;
   1383				};
   1384			};
   1385
   1386			hog-0 {
   1387				gpio-hog;
   1388				output-high;
   1389				gpios = <2 GPIO_ACTIVE_HIGH>,
   1390					<7 GPIO_ACTIVE_HIGH>;
   1391			};
   1392
   1393			fps {
   1394				#address-cells = <1>;
   1395				#size-cells = <0>;
   1396
   1397				fps0 {
   1398					reg = <0>;
   1399					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
   1400				};
   1401
   1402				fps1 {
   1403					reg = <1>;
   1404					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
   1405					maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
   1406				};
   1407
   1408				fps2 {
   1409					reg = <2>;
   1410					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
   1411				};
   1412			};
   1413
   1414			regulators {
   1415				in-ldo0-1-supply = <&max77620_sd2>;
   1416				in-ldo7-8-supply = <&max77620_sd2>;
   1417
   1418				max77620_sd0: sd0 {
   1419					regulator-name = "vdd-core";
   1420					regulator-enable-ramp-delay = <146>;
   1421					regulator-min-microvolt = <600000>;
   1422					regulator-max-microvolt = <1400000>;
   1423					regulator-ramp-delay = <27500>;
   1424					regulator-always-on;
   1425					regulator-boot-on;
   1426
   1427					maxim,active-fps-power-up-slot = <0>;
   1428					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
   1429				};
   1430
   1431				max77620_sd1: sd1 {
   1432					regulator-name = "vddio-ddr";
   1433					regulator-enable-ramp-delay = <130>;
   1434					regulator-ramp-delay = <27500>;
   1435					regulator-always-on;
   1436					regulator-boot-on;
   1437
   1438					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1439				};
   1440
   1441				max77620_sd2: sd2 {
   1442					regulator-name = "vdd-pre-reg";
   1443					regulator-enable-ramp-delay = <176>;
   1444					regulator-min-microvolt = <3000000>;
   1445					regulator-max-microvolt = <3000000>;
   1446					regulator-ramp-delay = <27500>;
   1447					regulator-always-on;
   1448					regulator-boot-on;
   1449
   1450					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
   1451					maxim,suspend-fps-source = <MAX77620_FPS_SRC_NONE>;
   1452				};
   1453
   1454				max77620_sd3: sd3 {
   1455					regulator-name = "vdd-1v8";
   1456					regulator-enable-ramp-delay = <242>;
   1457					regulator-min-microvolt = <1800000>;
   1458					regulator-max-microvolt = <1800000>;
   1459					regulator-ramp-delay = <27500>;
   1460					regulator-always-on;
   1461					regulator-boot-on;
   1462
   1463					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1464				};
   1465
   1466				max77620_ldo0: ldo0 {
   1467					regulator-name = "avdd-sys";
   1468					regulator-enable-ramp-delay = <26>;
   1469					regulator-min-microvolt = <1200000>;
   1470					regulator-max-microvolt = <1200000>;
   1471					regulator-ramp-delay = <100000>;
   1472					regulator-boot-on;
   1473
   1474					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1475				};
   1476
   1477				max77620_ldo1: ldo1 {
   1478					regulator-name = "vdd-pex";
   1479					regulator-enable-ramp-delay = <22>;
   1480					regulator-min-microvolt = <1075000>;
   1481					regulator-max-microvolt = <1075000>;
   1482					regulator-ramp-delay = <100000>;
   1483					regulator-always-on;
   1484
   1485					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1486				};
   1487
   1488				max77620_ldo2: ldo2 {
   1489					regulator-name = "vddio-sdmmc3";
   1490					regulator-enable-ramp-delay = <62>;
   1491					regulator-min-microvolt = <1800000>;
   1492					regulator-max-microvolt = <3300000>;
   1493					regulator-ramp-delay = <100000>;
   1494
   1495					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1496				};
   1497
   1498				max77620_ldo3: ldo3 {
   1499					regulator-name = "vdd-3v3-eth";
   1500					regulator-enable-ramp-delay = <50>;
   1501					regulator-min-microvolt = <3300000>;
   1502					regulator-max-microvolt = <3300000>;
   1503					regulator-ramp-delay = <100000>;
   1504					regulator-always-on;
   1505					regulator-boot-on;
   1506
   1507					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1508				};
   1509
   1510				max77620_ldo4: ldo4 {
   1511					regulator-name = "vdd-rtc";
   1512					regulator-enable-ramp-delay = <22>;
   1513					regulator-min-microvolt = <850000>;
   1514					regulator-max-microvolt = <850000>;
   1515					regulator-ramp-delay = <100000>;
   1516					regulator-always-on;
   1517					regulator-boot-on;
   1518
   1519					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
   1520				};
   1521
   1522				max77620_ldo5: ldo5 {
   1523					regulator-name = "avdd-ts-hv";
   1524					regulator-enable-ramp-delay = <62>;
   1525					regulator-min-microvolt = <3300000>;
   1526					regulator-max-microvolt = <3300000>;
   1527					regulator-ramp-delay = <100000>;
   1528
   1529					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1530				};
   1531
   1532				max77620_ldo6: ldo6 {
   1533					regulator-name = "vdd-ts";
   1534					regulator-enable-ramp-delay = <36>;
   1535					regulator-min-microvolt = <1800000>;
   1536					regulator-max-microvolt = <1800000>;
   1537					regulator-ramp-delay = <100000>;
   1538					regulator-boot-on;
   1539
   1540					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
   1541				};
   1542
   1543				max77620_ldo7: ldo7 {
   1544					regulator-name = "vdd-gen-pll-edp";
   1545					regulator-enable-ramp-delay = <24>;
   1546					regulator-min-microvolt = <1050000>;
   1547					regulator-max-microvolt = <1050000>;
   1548					regulator-ramp-delay = <100000>;
   1549					regulator-always-on;
   1550					regulator-boot-on;
   1551
   1552					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
   1553					maxim,suspend-fps-source = <MAX77620_FPS_SRC_NONE>;
   1554				};
   1555
   1556				max77620_ldo8: ldo8 {
   1557					regulator-name = "vdd-hdmi-dp";
   1558					regulator-enable-ramp-delay = <22>;
   1559					regulator-min-microvolt = <1050000>;
   1560					regulator-max-microvolt = <1050000>;
   1561					regulator-ramp-delay = <100000>;
   1562					regulator-always-on;
   1563					regulator-boot-on;
   1564
   1565					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
   1566				};
   1567			};
   1568		};
   1569	};
   1570
   1571	pmc@7000e400 {
   1572		nvidia,invert-interrupt;
   1573		nvidia,suspend-mode = <0>;
   1574		nvidia,cpu-pwr-good-time = <0>;
   1575		nvidia,cpu-pwr-off-time = <0>;
   1576		nvidia,core-pwr-good-time = <4587 3876>;
   1577		nvidia,core-pwr-off-time = <39065>;
   1578		nvidia,core-power-req-active-high;
   1579		nvidia,sys-clock-req-active-high;
   1580		status = "okay";
   1581	};
   1582
   1583	mmc@700b0600 {
   1584		bus-width = <8>;
   1585		non-removable;
   1586		status = "okay";
   1587	};
   1588
   1589	clk32k_in: clock-32k {
   1590		compatible = "fixed-clock";
   1591		clock-frequency = <32768>;
   1592		#clock-cells = <0>;
   1593	};
   1594
   1595	gpio-keys {
   1596		compatible = "gpio-keys";
   1597		status = "okay";
   1598
   1599		power {
   1600			debounce-interval = <30>;
   1601			gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
   1602			label = "Power";
   1603			linux,code = <KEY_POWER>;
   1604			wakeup-event-action = <EV_ACT_ASSERTED>;
   1605			wakeup-source;
   1606		};
   1607	};
   1608
   1609	cpus {
   1610		cpu@0 {
   1611			enable-method = "psci";
   1612		};
   1613
   1614		cpu@1 {
   1615			enable-method = "psci";
   1616		};
   1617
   1618		cpu@2 {
   1619			enable-method = "psci";
   1620		};
   1621
   1622		cpu@3 {
   1623			enable-method = "psci";
   1624		};
   1625
   1626		idle-states {
   1627			cpu-sleep {
   1628				status = "okay";
   1629			};
   1630		};
   1631	};
   1632
   1633	psci {
   1634		compatible = "arm,psci-1.0";
   1635		method = "smc";
   1636	};
   1637
   1638	battery_reg: regulator-vdd-ac-bat {
   1639		compatible = "regulator-fixed";
   1640		regulator-name = "vdd-ac-bat";
   1641		regulator-min-microvolt = <5000000>;
   1642		regulator-max-microvolt = <5000000>;
   1643		regulator-always-on;
   1644	};
   1645
   1646	vdd_3v3: regulator-vdd-3v3 {
   1647		compatible = "regulator-fixed";
   1648		regulator-name = "vdd-3v3";
   1649		regulator-enable-ramp-delay = <160>;
   1650		regulator-min-microvolt = <3300000>;
   1651		regulator-max-microvolt = <3300000>;
   1652		regulator-always-on;
   1653
   1654		gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
   1655		enable-active-high;
   1656	};
   1657
   1658	max77620_gpio7: regulator-max77620-gpio7 {
   1659		compatible = "regulator-fixed";
   1660		regulator-name = "max77620-gpio7";
   1661		regulator-enable-ramp-delay = <240>;
   1662		regulator-min-microvolt = <1200000>;
   1663		regulator-max-microvolt = <1200000>;
   1664		vin-supply = <&max77620_ldo0>;
   1665		regulator-always-on;
   1666		regulator-boot-on;
   1667
   1668		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
   1669		enable-active-high;
   1670	};
   1671
   1672	lcd_bl_en: regulator-lcd-bl-en {
   1673		compatible = "regulator-fixed";
   1674		regulator-name = "lcd-bl-en";
   1675		regulator-min-microvolt = <1800000>;
   1676		regulator-max-microvolt = <1800000>;
   1677		regulator-boot-on;
   1678
   1679		gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
   1680		enable-active-high;
   1681	};
   1682
   1683	en_vdd_sd: regulator-vdd-sd {
   1684		compatible = "regulator-fixed";
   1685		regulator-name = "en-vdd-sd";
   1686		regulator-enable-ramp-delay = <472>;
   1687		regulator-min-microvolt = <3300000>;
   1688		regulator-max-microvolt = <3300000>;
   1689		vin-supply = <&vdd_3v3>;
   1690
   1691		gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
   1692		enable-active-high;
   1693	};
   1694
   1695	en_vdd_cam: regulator-vdd-cam {
   1696		compatible = "regulator-fixed";
   1697		regulator-name = "en-vdd-cam";
   1698		regulator-min-microvolt = <1800000>;
   1699		regulator-max-microvolt = <1800000>;
   1700
   1701		gpio = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
   1702		enable-active-high;
   1703	};
   1704
   1705	vdd_sys_boost: regulator-vdd-sys-boost {
   1706		compatible = "regulator-fixed";
   1707		regulator-name = "vdd-sys-boost";
   1708		regulator-enable-ramp-delay = <3090>;
   1709		regulator-min-microvolt = <5000000>;
   1710		regulator-max-microvolt = <5000000>;
   1711		regulator-always-on;
   1712
   1713		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
   1714		enable-active-high;
   1715	};
   1716
   1717	vdd_hdmi: regulator-vdd-hdmi {
   1718		compatible = "regulator-fixed";
   1719		regulator-name = "vdd-hdmi";
   1720		regulator-enable-ramp-delay = <468>;
   1721		regulator-min-microvolt = <5000000>;
   1722		regulator-max-microvolt = <5000000>;
   1723		vin-supply = <&vdd_sys_boost>;
   1724		regulator-boot-on;
   1725
   1726		gpio = <&gpio TEGRA_GPIO(CC, 7) GPIO_ACTIVE_HIGH>;
   1727		enable-active-high;
   1728	};
   1729
   1730	en_vdd_cpu_fixed: regulator-vdd-cpu-fixed {
   1731		compatible = "regulator-fixed";
   1732		regulator-name = "vdd-cpu-fixed";
   1733		regulator-min-microvolt = <1000000>;
   1734		regulator-max-microvolt = <1000000>;
   1735	};
   1736
   1737	vdd_aux_3v3: regulator-vdd-aux-3v3 {
   1738		compatible = "regulator-fixed";
   1739		regulator-name = "aux-3v3";
   1740		regulator-min-microvolt = <3300000>;
   1741		regulator-max-microvolt = <3300000>;
   1742	};
   1743
   1744	vdd_snsr_pm: regulator-vdd-snsr-pm {
   1745		compatible = "regulator-fixed";
   1746		regulator-name = "snsr_pm";
   1747		regulator-min-microvolt = <3300000>;
   1748		regulator-max-microvolt = <3300000>;
   1749
   1750		enable-active-high;
   1751	};
   1752
   1753	vdd_usb_5v0: regulator-vdd-usb-5v0 {
   1754		compatible = "regulator-fixed";
   1755		status = "disabled";
   1756		regulator-name = "vdd-usb-5v0";
   1757		regulator-min-microvolt = <5000000>;
   1758		regulator-max-microvolt = <5000000>;
   1759		vin-supply = <&vdd_3v3>;
   1760
   1761		enable-active-high;
   1762	};
   1763
   1764	vdd_cdc_1v2_aud: regulator-vdd-cdc-1v2-aud {
   1765		compatible = "regulator-fixed";
   1766		status = "disabled";
   1767		regulator-name = "vdd_cdc_1v2_aud";
   1768		regulator-min-microvolt = <1200000>;
   1769		regulator-max-microvolt = <1200000>;
   1770		startup-delay-us = <250000>;
   1771
   1772		enable-active-high;
   1773	};
   1774
   1775	vdd_disp_3v0: regulator-vdd-disp-3v0 {
   1776		compatible = "regulator-fixed";
   1777		regulator-name = "vdd-disp-3v0";
   1778		regulator-enable-ramp-delay = <232>;
   1779		regulator-min-microvolt = <3000000>;
   1780		regulator-max-microvolt = <3000000>;
   1781		regulator-always-on;
   1782
   1783		gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
   1784		enable-active-high;
   1785	};
   1786
   1787	vdd_fan: regulator-vdd-fan {
   1788		compatible = "regulator-fixed";
   1789		regulator-name = "vdd-fan";
   1790		regulator-enable-ramp-delay = <284>;
   1791		regulator-min-microvolt = <5000000>;
   1792		regulator-max-microvolt = <5000000>;
   1793
   1794		gpio = <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
   1795		enable-active-high;
   1796	};
   1797
   1798	usb_vbus1: regulator-usb-vbus1 {
   1799		compatible = "regulator-fixed";
   1800		regulator-name = "usb-vbus1";
   1801		regulator-min-microvolt = <5000000>;
   1802		regulator-max-microvolt = <5000000>;
   1803
   1804		gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
   1805		enable-active-high;
   1806		gpio-open-drain;
   1807	};
   1808
   1809	usb_vbus2: regulator-usb-vbus2 {
   1810		compatible = "regulator-fixed";
   1811		regulator-name = "usb-vbus2";
   1812		regulator-min-microvolt = <5000000>;
   1813		regulator-max-microvolt = <5000000>;
   1814
   1815		gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
   1816		enable-active-high;
   1817		gpio-open-drain;
   1818	};
   1819
   1820	vdd_3v3_eth: regulator-vdd-3v3-eth {
   1821		compatible = "regulator-fixed";
   1822		regulator-name = "vdd-3v3-eth-a02";
   1823		regulator-min-microvolt = <3300000>;
   1824		regulator-max-microvolt = <3300000>;
   1825		regulator-always-on;
   1826		regulator-boot-on;
   1827
   1828		gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
   1829		enable-active-high;
   1830		gpio-open-drain;
   1831	};
   1832};