cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ipq6018-cp01-c1.dts (1332B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
      2/*
      3 * IPQ6018 CP01 board device tree source
      4 *
      5 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
      6 */
      7
      8/dts-v1/;
      9
     10#include "ipq6018.dtsi"
     11
     12/ {
     13	model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
     14	compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
     15
     16	aliases {
     17		serial0 = &blsp1_uart3;
     18	};
     19
     20	chosen {
     21		stdout-path = "serial0:115200n8";
     22		bootargs-append = " swiotlb=1";
     23	};
     24};
     25
     26&blsp1_uart3 {
     27	pinctrl-0 = <&serial_3_pins>;
     28	pinctrl-names = "default";
     29	status = "okay";
     30};
     31
     32&i2c_1 {
     33	pinctrl-0 = <&i2c_1_pins>;
     34	pinctrl-names = "default";
     35	status = "okay";
     36};
     37
     38&spi_0 {
     39	cs-select = <0>;
     40	status = "okay";
     41
     42	flash@0 {
     43		#address-cells = <1>;
     44		#size-cells = <1>;
     45		reg = <0>;
     46		compatible = "n25q128a11";
     47		spi-max-frequency = <50000000>;
     48	};
     49};
     50
     51&tlmm {
     52	i2c_1_pins: i2c-1-pins {
     53		pins = "gpio42", "gpio43";
     54		function = "blsp2_i2c";
     55		drive-strength = <8>;
     56	};
     57
     58	spi_0_pins: spi-0-pins {
     59		pins = "gpio38", "gpio39", "gpio40", "gpio41";
     60		function = "blsp0_spi";
     61		drive-strength = <8>;
     62		bias-pull-down;
     63	};
     64};
     65
     66&qpic_bam {
     67	status = "okay";
     68};
     69
     70&qpic_nand {
     71	status = "okay";
     72
     73	nand@0 {
     74		reg = <0>;
     75
     76		nand-ecc-strength = <4>;
     77		nand-ecc-step-size = <512>;
     78		nand-bus-width = <8>;
     79	};
     80};
     81
     82&qusb_phy_1 {
     83	status = "ok";
     84};
     85
     86&usb2 {
     87	status = "ok";
     88};