msm8998-oneplus-common.dtsi (12250B)
1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi 4 * 5 * Copyright (c) 2021, Jami Kettunen <jamipkettunen@gmail.com> 6 * Copyright (c) 2016, The Linux Foundation. All rights reserved. 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 13#include "msm8998.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16#include "pm8005.dtsi" 17 18/ { 19 /* Required for bootloader to select correct board */ 20 qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */ 21 22 chosen { 23 #address-cells = <2>; 24 #size-cells = <2>; 25 ranges; 26 27 /* Use display framebuffer setup by the UEFI XBL bootloader for simplefb */ 28 framebuffer0: framebuffer@9d400000 { 29 compatible = "simple-framebuffer"; 30 reg = <0x0 0x9d400000 0x0 0x2400000>; 31 width = <1080>; 32 height = <1920>; 33 stride = <(1080 * 4)>; 34 format = "a8r8g8b8"; 35 }; 36 }; 37 38 reserved-memory { 39 /* Bootloader display framebuffer region */ 40 cont_splash_mem: memory@9d400000 { 41 reg = <0x0 0x9d400000 0x0 0x2400000>; 42 no-map; 43 }; 44 45 /* For getting crash logs using Android downstream kernels */ 46 ramoops@ac000000 { 47 compatible = "ramoops"; 48 reg = <0x0 0xac000000 0x0 0x200000>; 49 console-size = <0x80000>; 50 pmsg-size = <0x40000>; 51 record-size = <0x8000>; 52 ftrace-size = <0x20000>; 53 }; 54 55 /* 56 * The following memory regions on downstream are "dynamically allocated" 57 * but given the same addresses every time. Hard code them as these addresses 58 * are where the OnePlus signed firmware expects them to be. 59 */ 60 ipa_fws_region: ipa@f6800000 { 61 compatible = "shared-dma-pool"; 62 reg = <0x0 0xf6800000 0x0 0x5000>; 63 no-map; 64 }; 65 zap_shader_region: gpu@f6900000 { 66 compatible = "shared-dma-pool"; 67 reg = <0x0 0xf6900000 0x0 0x2000>; 68 no-map; 69 }; 70 }; 71 72 gpio-keys { 73 compatible = "gpio-keys"; 74 label = "Volume buttons"; 75 autorepeat; 76 77 pinctrl-names = "default"; 78 pinctrl-0 = <&vol_keys_default>; 79 80 vol-down { 81 label = "Volume down"; 82 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>; 83 linux,code = <KEY_VOLUMEDOWN>; 84 debounce-interval = <15>; 85 wakeup-source; 86 }; 87 88 vol-up { 89 label = "Volume up"; 90 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 91 linux,code = <KEY_VOLUMEUP>; 92 debounce-interval = <15>; 93 wakeup-source; 94 }; 95 }; 96 97 gpio-hall-sensor { 98 compatible = "gpio-keys"; 99 label = "Hall effect sensor"; 100 101 pinctrl-names = "default"; 102 pinctrl-0 = <&hall_sensor_default>; 103 104 hall-sensor { 105 label = "Hall Effect Sensor"; 106 gpios = <&tlmm 124 GPIO_ACTIVE_LOW>; 107 linux,input-type = <EV_SW>; 108 linux,code = <SW_LID>; 109 linux,can-disable; 110 wakeup-source; 111 }; 112 }; 113 114 vph_pwr: vph-pwr-regulator { 115 compatible = "regulator-fixed"; 116 regulator-name = "vph_pwr"; 117 regulator-always-on; 118 regulator-boot-on; 119 }; 120}; 121 122/* 123 * OnePlus' ADSP firmware requires 30 MiB in total, so increase the adsp_mem 124 * region by 4 MiB to account for this while relocating the other now 125 * conflicting memory nodes accordingly. 126 */ 127&adsp_mem { 128 reg = <0x0 0x8b200000 0x0 0x1e00000>; 129}; 130&mpss_mem { 131 reg = <0x0 0x8d000000 0x0 0x7000000>; 132}; 133&venus_mem { 134 reg = <0x0 0x94000000 0x0 0x500000>; 135}; 136&mba_mem { 137 reg = <0x0 0x94500000 0x0 0x200000>; 138}; 139&slpi_mem { 140 reg = <0x0 0x94700000 0x0 0xf00000>; 141}; 142&ipa_fw_mem { 143 reg = <0x0 0x95600000 0x0 0x10000>; 144}; 145&ipa_gsi_mem { 146 reg = <0x0 0x95610000 0x0 0x5000>; 147}; 148&gpu_mem { 149 reg = <0x0 0x95615000 0x0 0x100000>; 150}; 151&wlan_msa_mem { 152 reg = <0x0 0x95715000 0x0 0x100000>; 153}; 154 155&blsp1_i2c5 { 156 status = "okay"; 157 158 touchscreen@20 { 159 compatible = "syna,rmi4-i2c"; 160 reg = <0x20>; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 164 interrupt-parent = <&tlmm>; 165 interrupts = <125 IRQ_TYPE_EDGE_FALLING>; 166 167 pinctrl-names = "default"; 168 pinctrl-0 = <&ts_int_active &ts_reset_active>; 169 170 vdd-supply = <&vreg_l28_3p0>; 171 vio-supply = <&vreg_l6a_1p8>; 172 173 syna,reset-delay-ms = <20>; 174 syna,startup-delay-ms = <20>; 175 176 rmi4-f01@1 { 177 reg = <0x01>; 178 syna,nosleep-mode = <1>; 179 }; 180 181 rmi4_f12: rmi4-f12@12 { 182 reg = <0x12>; 183 syna,rezero-wait-ms = <20>; 184 syna,sensor-type = <1>; 185 touchscreen-x-mm = <68>; 186 touchscreen-y-mm = <122>; 187 }; 188 }; 189}; 190 191&blsp1_i2c6 { 192 status = "okay"; 193 194 nfc@28 { 195 compatible = "nxp,nxp-nci-i2c"; 196 reg = <0x28>; 197 198 interrupt-parent = <&tlmm>; 199 interrupts = <92 IRQ_TYPE_LEVEL_HIGH>; 200 201 enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>; 202 203 pinctrl-names = "default"; 204 pinctrl-0 = <&nfc_int_active &nfc_enable_active>; 205 }; 206}; 207 208&blsp1_uart3 { 209 status = "okay"; 210 211 bluetooth { 212 compatible = "qcom,wcn3990-bt"; 213 214 vddio-supply = <&vreg_s4a_1p8>; 215 vddxo-supply = <&vreg_l7a_1p8>; 216 vddrf-supply = <&vreg_l17a_1p3>; 217 vddch0-supply = <&vreg_l25a_3p3>; 218 max-speed = <3200000>; 219 }; 220}; 221 222&blsp1_uart3_on { 223 rx { 224 /delete-property/ bias-disable; 225 /* 226 * Configure a pull-up on 46 (RX). This is needed to 227 * avoid garbage data when the TX pin of the Bluetooth 228 * module is in tri-state (module powered off or not 229 * driving the signal yet). 230 */ 231 bias-pull-up; 232 }; 233 234 cts { 235 /delete-property/ bias-disable; 236 /* 237 * Configure a pull-down on 47 (CTS) to match the pull 238 * of the Bluetooth module. 239 */ 240 bias-pull-down; 241 }; 242}; 243 244&blsp2_uart1 { 245 status = "okay"; 246}; 247 248&pm8005_lsid1 { 249 pm8005-regulators { 250 compatible = "qcom,pm8005-regulators"; 251 252 vdd_s1-supply = <&vph_pwr>; 253 254 pm8005_s1: s1 { /* VDD_GFX supply */ 255 regulator-min-microvolt = <524000>; 256 regulator-max-microvolt = <1100000>; 257 regulator-enable-ramp-delay = <500>; 258 259 /* hack until we rig up the gpu consumer */ 260 regulator-always-on; 261 }; 262 }; 263}; 264 265&pm8998_gpio { 266 vol_keys_default: vol-keys-default { 267 pinconf { 268 pins = "gpio5", "gpio6"; 269 function = "normal"; 270 bias-pull-up; 271 input-enable; 272 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 273 }; 274 }; 275}; 276 277&qusb2phy { 278 status = "okay"; 279 280 vdd-supply = <&vreg_l1a_0p875>; 281 vdda-pll-supply = <&vreg_l12a_1p8>; 282 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 283}; 284 285&rpm_requests { 286 pm8998-regulators { 287 compatible = "qcom,rpm-pm8998-regulators"; 288 289 vdd_s1-supply = <&vph_pwr>; 290 vdd_s2-supply = <&vph_pwr>; 291 vdd_s3-supply = <&vph_pwr>; 292 vdd_s4-supply = <&vph_pwr>; 293 vdd_s5-supply = <&vph_pwr>; 294 vdd_s6-supply = <&vph_pwr>; 295 vdd_s7-supply = <&vph_pwr>; 296 vdd_s8-supply = <&vph_pwr>; 297 vdd_s9-supply = <&vph_pwr>; 298 vdd_s10-supply = <&vph_pwr>; 299 vdd_s11-supply = <&vph_pwr>; 300 vdd_s12-supply = <&vph_pwr>; 301 vdd_s13-supply = <&vph_pwr>; 302 vdd_l1_l27-supply = <&vreg_s7a_1p025>; 303 vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>; 304 vdd_l3_l11-supply = <&vreg_s7a_1p025>; 305 vdd_l4_l5-supply = <&vreg_s7a_1p025>; 306 vdd_l6-supply = <&vreg_s5a_2p04>; 307 vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>; 308 vdd_l9-supply = <&vreg_bob>; 309 vdd_l10_l23_l25-supply = <&vreg_bob>; 310 vdd_l13_l19_l21-supply = <&vreg_bob>; 311 vdd_l16_l28-supply = <&vreg_bob>; 312 vdd_l18_l22-supply = <&vreg_bob>; 313 vdd_l20_l24-supply = <&vreg_bob>; 314 vdd_l26-supply = <&vreg_s3a_1p35>; 315 vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>; 316 317 vreg_s3a_1p35: s3 { 318 regulator-min-microvolt = <1352000>; 319 regulator-max-microvolt = <1352000>; 320 }; 321 vreg_s4a_1p8: s4 { 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <1800000>; 324 regulator-allow-set-load; 325 }; 326 vreg_s5a_2p04: s5 { 327 regulator-min-microvolt = <1904000>; 328 regulator-max-microvolt = <2040000>; 329 }; 330 vreg_s7a_1p025: s7 { 331 regulator-min-microvolt = <900000>; 332 regulator-max-microvolt = <1028000>; 333 }; 334 vreg_l1a_0p875: l1 { 335 regulator-min-microvolt = <880000>; 336 regulator-max-microvolt = <880000>; 337 }; 338 vreg_l2a_1p2: l2 { 339 regulator-min-microvolt = <1200000>; 340 regulator-max-microvolt = <1200000>; 341 }; 342 vreg_l3a_1p0: l3 { 343 regulator-min-microvolt = <1000000>; 344 regulator-max-microvolt = <1000000>; 345 }; 346 vreg_l5a_0p8: l5 { 347 regulator-min-microvolt = <800000>; 348 regulator-max-microvolt = <800000>; 349 }; 350 vreg_l6a_1p8: l6 { 351 regulator-min-microvolt = <1808000>; 352 regulator-max-microvolt = <1808000>; 353 }; 354 vreg_l7a_1p8: l7 { 355 regulator-min-microvolt = <1800000>; 356 regulator-max-microvolt = <1800000>; 357 }; 358 vreg_l8a_1p2: l8 { 359 regulator-min-microvolt = <1200000>; 360 regulator-max-microvolt = <1200000>; 361 }; 362 vreg_l9a_1p8: l9 { 363 regulator-min-microvolt = <1808000>; 364 regulator-max-microvolt = <2960000>; 365 }; 366 vreg_l10a_1p8: l10 { 367 regulator-min-microvolt = <1808000>; 368 regulator-max-microvolt = <2960000>; 369 }; 370 vreg_l11a_1p0: l11 { 371 regulator-min-microvolt = <1000000>; 372 regulator-max-microvolt = <1000000>; 373 }; 374 vreg_l12a_1p8: l12 { 375 regulator-min-microvolt = <1800000>; 376 regulator-max-microvolt = <1800000>; 377 }; 378 vreg_l13a_2p95: l13 { 379 regulator-min-microvolt = <1808000>; 380 regulator-max-microvolt = <2960000>; 381 }; 382 vreg_l14a_1p88: l14 { 383 regulator-min-microvolt = <1880000>; 384 regulator-max-microvolt = <1880000>; 385 }; 386 vreg_l15a_1p8: l15 { 387 regulator-min-microvolt = <1800000>; 388 regulator-max-microvolt = <1800000>; 389 }; 390 vreg_l16a_2p7: l16 { 391 regulator-min-microvolt = <2704000>; 392 regulator-max-microvolt = <2704000>; 393 }; 394 vreg_l17a_1p3: l17 { 395 regulator-min-microvolt = <1304000>; 396 regulator-max-microvolt = <1304000>; 397 }; 398 vreg_l18a_2p7: l18 { 399 regulator-min-microvolt = <2704000>; 400 regulator-max-microvolt = <2704000>; 401 }; 402 vreg_l19a_3p0: l19 { 403 regulator-min-microvolt = <3008000>; 404 regulator-max-microvolt = <3008000>; 405 }; 406 vreg_l20a_2p95: l20 { 407 regulator-min-microvolt = <2960000>; 408 regulator-max-microvolt = <2960000>; 409 regulator-allow-set-load; 410 }; 411 vreg_l21a_2p95: l21 { 412 regulator-min-microvolt = <2960000>; 413 regulator-max-microvolt = <2960000>; 414 regulator-allow-set-load; 415 regulator-system-load = <800000>; 416 }; 417 vreg_l22a_2p85: l22 { 418 regulator-min-microvolt = <2864000>; 419 regulator-max-microvolt = <2864000>; 420 }; 421 vreg_l23a_3p3: l23 { 422 regulator-min-microvolt = <3312000>; 423 regulator-max-microvolt = <3312000>; 424 }; 425 vreg_l24a_3p075: l24 { 426 regulator-min-microvolt = <3088000>; 427 regulator-max-microvolt = <3088000>; 428 }; 429 vreg_l25a_3p3: l25 { 430 regulator-min-microvolt = <3104000>; 431 regulator-max-microvolt = <3312000>; 432 }; 433 vreg_l26a_1p2: l26 { 434 regulator-min-microvolt = <1200000>; 435 regulator-max-microvolt = <1200000>; 436 regulator-allow-set-load; 437 }; 438 vreg_l28_3p0: l28 { 439 regulator-min-microvolt = <3008000>; 440 regulator-max-microvolt = <3008000>; 441 }; 442 vreg_lvs1a_1p8: lvs1 { }; 443 vreg_lvs2a_1p8: lvs2 { }; 444 }; 445 446 pmi8998-regulators { 447 compatible = "qcom,rpm-pmi8998-regulators"; 448 449 vdd_bob-supply = <&vph_pwr>; 450 451 vreg_bob: bob { 452 regulator-min-microvolt = <3312000>; 453 regulator-max-microvolt = <3600000>; 454 }; 455 }; 456}; 457 458&tlmm { 459 gpio-reserved-ranges = <0 4>, <81 4>; 460 461 hall_sensor_default: hall-sensor-default { 462 pins = "gpio124"; 463 function = "gpio"; 464 drive-strength = <2>; 465 bias-disable; 466 input-enable; 467 }; 468 469 ts_int_active: ts-int-active { 470 pins = "gpio125"; 471 function = "gpio"; 472 drive-strength = <8>; 473 bias-pull-up; 474 }; 475 476 ts_reset_active: ts-reset-active { 477 pins = "gpio89"; 478 function = "gpio"; 479 drive-strength = <8>; 480 bias-pull-up; 481 }; 482 483 nfc_int_active: nfc-int-active { 484 pins = "gpio92"; 485 function = "gpio"; 486 drive-strength = <6>; 487 bias-pull-up; 488 }; 489 490 nfc_enable_active: nfc-enable-active { 491 pins = "gpio12", "gpio116"; 492 function = "gpio"; 493 drive-strength = <6>; 494 bias-pull-up; 495 }; 496}; 497 498&ufshc { 499 status = "okay"; 500 501 vcc-supply = <&vreg_l20a_2p95>; 502 vccq-supply = <&vreg_l26a_1p2>; 503 vccq2-supply = <&vreg_s4a_1p8>; 504 vcc-max-microamp = <750000>; 505 vccq-max-microamp = <560000>; 506 vccq2-max-microamp = <750000>; 507}; 508 509&ufsphy { 510 status = "okay"; 511 512 vdda-phy-supply = <&vreg_l1a_0p875>; 513 vdda-pll-supply = <&vreg_l2a_1p2>; 514 vddp-ref-clk-supply = <&vreg_l26a_1p2>; 515}; 516 517&usb3 { 518 status = "okay"; 519 520 /* Disable USB3 clock requirement as the device only supports USB2 */ 521 qcom,select-utmi-as-pipe-clk; 522}; 523 524&usb3_dwc3 { 525 /* Drop the unused USB 3 PHY */ 526 phys = <&qusb2phy>; 527 phy-names = "usb2-phy"; 528 529 /* Fastest mode for USB 2 */ 530 maximum-speed = "high-speed"; 531 532 /* Force to peripheral until we can switch modes */ 533 dr_mode = "peripheral"; 534}; 535 536&wifi { 537 /* Leave disabled until MSS is functional */ 538 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 539 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 540 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 541 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 542};