cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pm8150.dtsi (2968B)

      1// SPDX-License-Identifier: BSD-3-Clause
      2/*
      3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
      4 * Copyright (c) 2019, Linaro Limited
      5 */
      6
      7#include <dt-bindings/input/input.h>
      8#include <dt-bindings/interrupt-controller/irq.h>
      9#include <dt-bindings/spmi/spmi.h>
     10#include <dt-bindings/iio/qcom,spmi-vadc.h>
     11
     12/ {
     13	thermal-zones {
     14		pm8150-thermal {
     15			polling-delay-passive = <100>;
     16			polling-delay = <0>;
     17
     18			thermal-sensors = <&pm8150_temp>;
     19
     20			trips {
     21				trip0 {
     22					temperature = <95000>;
     23					hysteresis = <0>;
     24					type = "passive";
     25				};
     26
     27				trip1 {
     28					temperature = <115000>;
     29					hysteresis = <0>;
     30					type = "hot";
     31				};
     32
     33				trip2 {
     34					temperature = <145000>;
     35					hysteresis = <0>;
     36					type = "critical";
     37				};
     38			};
     39		};
     40	};
     41};
     42
     43&spmi_bus {
     44	pm8150_0: pmic@0 {
     45		compatible = "qcom,pm8150", "qcom,spmi-pmic";
     46		reg = <0x0 SPMI_USID>;
     47		#address-cells = <1>;
     48		#size-cells = <0>;
     49
     50		pon: power-on@800 {
     51			compatible = "qcom,pm8998-pon";
     52			reg = <0x0800>;
     53			mode-bootloader = <0x2>;
     54			mode-recovery = <0x1>;
     55
     56			pon_pwrkey: pwrkey {
     57				compatible = "qcom,pm8941-pwrkey";
     58				interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
     59				debounce = <15625>;
     60				bias-pull-up;
     61				linux,code = <KEY_POWER>;
     62
     63				status = "disabled";
     64			};
     65
     66			pon_resin: resin {
     67				compatible = "qcom,pm8941-resin";
     68				interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;
     69				debounce = <15625>;
     70				bias-pull-up;
     71
     72				status = "disabled";
     73			};
     74		};
     75
     76		pm8150_temp: temp-alarm@2400 {
     77			compatible = "qcom,spmi-temp-alarm";
     78			reg = <0x2400>;
     79			interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
     80			io-channels = <&pm8150_adc ADC5_DIE_TEMP>;
     81			io-channel-names = "thermal";
     82			#thermal-sensor-cells = <0>;
     83		};
     84
     85		pm8150_adc: adc@3100 {
     86			compatible = "qcom,spmi-adc5";
     87			reg = <0x3100>;
     88			#address-cells = <1>;
     89			#size-cells = <0>;
     90			#io-channel-cells = <1>;
     91			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
     92
     93			ref-gnd@0 {
     94				reg = <ADC5_REF_GND>;
     95				qcom,pre-scaling = <1 1>;
     96				label = "ref_gnd";
     97			};
     98
     99			vref-1p25@1 {
    100				reg = <ADC5_1P25VREF>;
    101				qcom,pre-scaling = <1 1>;
    102				label = "vref_1p25";
    103			};
    104
    105			die-temp@6 {
    106				reg = <ADC5_DIE_TEMP>;
    107				qcom,pre-scaling = <1 1>;
    108				label = "die_temp";
    109			};
    110		};
    111
    112		pm8150_adc_tm: adc-tm@3500 {
    113			compatible = "qcom,spmi-adc-tm5";
    114			reg = <0x3500>;
    115			interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
    116			#thermal-sensor-cells = <1>;
    117			#address-cells = <1>;
    118			#size-cells = <0>;
    119			status = "disabled";
    120		};
    121
    122		rtc@6000 {
    123			compatible = "qcom,pm8941-rtc";
    124			reg = <0x6000>;
    125			reg-names = "rtc", "alarm";
    126			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
    127		};
    128
    129		pm8150_gpios: gpio@c000 {
    130			compatible = "qcom,pm8150-gpio";
    131			reg = <0xc000>;
    132			gpio-controller;
    133			#gpio-cells = <2>;
    134			interrupt-controller;
    135			#interrupt-cells = <2>;
    136		};
    137	};
    138
    139	pmic@1 {
    140		compatible = "qcom,pm8150", "qcom,spmi-pmic";
    141		reg = <0x1 SPMI_USID>;
    142		#address-cells = <1>;
    143		#size-cells = <0>;
    144	};
    145};