cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcs404-evb-4000.dts (1751B)

      1// SPDX-License-Identifier: GPL-2.0
      2// Copyright (c) 2018, Linaro Limited
      3
      4/dts-v1/;
      5
      6#include <dt-bindings/gpio/gpio.h>
      7#include "qcs404-evb.dtsi"
      8
      9/ {
     10	model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
     11	compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
     12		     "qcom,qcs404";
     13};
     14
     15&ethernet {
     16	status = "okay";
     17
     18	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
     19	snps,reset-active-low;
     20	snps,reset-delays-us = <0 10000 10000>;
     21
     22	pinctrl-names = "default";
     23	pinctrl-0 = <&ethernet_defaults>;
     24
     25	phy-handle = <&phy1>;
     26	phy-mode = "rgmii";
     27	mdio {
     28		#address-cells = <0x1>;
     29		#size-cells = <0x0>;
     30		compatible = "snps,dwmac-mdio";
     31		phy1: phy@4 {
     32			compatible = "ethernet-phy-ieee802.3-c22";
     33			device_type = "ethernet-phy";
     34			reg = <0x4>;
     35		};
     36	};
     37};
     38
     39&tlmm {
     40	ethernet_defaults: ethernet-defaults {
     41		int {
     42			pins = "gpio61";
     43			function = "rgmii_int";
     44			bias-disable;
     45			drive-strength = <2>;
     46		};
     47		mdc {
     48			pins = "gpio76";
     49			function = "rgmii_mdc";
     50			bias-pull-up;
     51		};
     52		mdio {
     53			pins = "gpio75";
     54			function = "rgmii_mdio";
     55			bias-pull-up;
     56		};
     57		tx {
     58			pins = "gpio67", "gpio66", "gpio65", "gpio64";
     59			function = "rgmii_tx";
     60			bias-pull-up;
     61			drive-strength = <16>;
     62		};
     63		rx {
     64			pins = "gpio73", "gpio72", "gpio71", "gpio70";
     65			function = "rgmii_rx";
     66			bias-disable;
     67			drive-strength = <2>;
     68		};
     69		tx-ctl {
     70			pins = "gpio68";
     71			function = "rgmii_ctl";
     72			bias-pull-up;
     73			drive-strength = <16>;
     74		};
     75		rx-ctl {
     76			pins = "gpio74";
     77			function = "rgmii_ctl";
     78			bias-disable;
     79			drive-strength = <2>;
     80		};
     81		tx-ck {
     82			pins = "gpio63";
     83			function = "rgmii_ck";
     84			bias-pull-up;
     85			drive-strength = <16>;
     86		};
     87		rx-ck {
     88			pins = "gpio69";
     89			function = "rgmii_ck";
     90			bias-disable;
     91			drive-strength = <2>;
     92		};
     93	};
     94};