cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sc7180-trogdor-coachz.dtsi (5604B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google CoachZ board device tree source
      4 *
      5 * Copyright 2020 Google LLC.
      6 */
      7
      8#include "sc7180-trogdor.dtsi"
      9#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
     10
     11/* Deleted nodes from sc7180-trogdor.dtsi */
     12
     13/delete-node/ &alc5682;
     14/delete-node/ &pp3300_codec;
     15
     16/ {
     17	/* BOARD-SPECIFIC TOP LEVEL NODES */
     18
     19	adau7002: audio-codec-1 {
     20		compatible = "adi,adau7002";
     21		IOVDD-supply = <&pp1800_l15a>;
     22		wakeup-delay-ms = <80>;
     23		#sound-dai-cells = <0>;
     24	};
     25
     26	thermal-zones {
     27		skin_temp_thermal: skin-temp-thermal {
     28			polling-delay-passive = <250>;
     29			polling-delay = <0>;
     30
     31			thermal-sensors = <&pm6150_adc_tm 1>;
     32			sustainable-power = <965>;
     33
     34			trips {
     35				skin_temp_alert0: trip-point0 {
     36					temperature = <42000>;
     37					hysteresis = <1000>;
     38					type = "passive";
     39				};
     40
     41				skin_temp_alert1: trip-point1 {
     42					temperature = <45000>;
     43					hysteresis = <1000>;
     44					type = "passive";
     45				};
     46
     47				skin-temp-crit {
     48					temperature = <60000>;
     49					hysteresis = <1000>;
     50					type = "critical";
     51				};
     52			};
     53
     54			cooling-maps {
     55				map0 {
     56					trip = <&skin_temp_alert0>;
     57					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
     58							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
     59				};
     60
     61				map1 {
     62					trip = <&skin_temp_alert1>;
     63					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
     64							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
     65				};
     66			};
     67		};
     68	};
     69};
     70
     71&ap_spi_fp {
     72	status = "okay";
     73};
     74
     75&backlight {
     76	pwms = <&cros_ec_pwm 0>;
     77};
     78
     79&camcc {
     80	status = "okay";
     81};
     82
     83&cros_ec {
     84	cros_ec_proximity: proximity {
     85		compatible = "google,cros-ec-mkbp-proximity";
     86		label = "proximity-wifi";
     87	};
     88};
     89
     90ap_ts_pen_1v8: &i2c4 {
     91	status = "okay";
     92	clock-frequency = <400000>;
     93
     94	ap_ts: touchscreen@5d {
     95		compatible = "goodix,gt7375p";
     96		reg = <0x5d>;
     97		pinctrl-names = "default";
     98		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
     99
    100		interrupt-parent = <&tlmm>;
    101		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
    102
    103		reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
    104
    105		vdd-supply = <&pp3300_ts>;
    106	};
    107};
    108
    109&i2c9 {
    110	status = "disabled";
    111};
    112
    113&panel {
    114	compatible = "boe,nv110wtm-n61";
    115};
    116
    117&pm6150_adc {
    118	skin-temp-thermistor@4e {
    119		reg = <ADC5_AMUX_THM2_100K_PU>;
    120		qcom,ratiometric;
    121		qcom,hw-settle-time = <200>;
    122	};
    123};
    124
    125&pm6150_adc_tm {
    126	status = "okay";
    127
    128	skin-temp-thermistor@1 {
    129		reg = <1>;
    130		io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>;
    131		qcom,ratiometric;
    132		qcom,hw-settle-time-us = <200>;
    133	};
    134};
    135
    136&pp1800_uf_cam {
    137	status = "okay";
    138};
    139
    140&pp1800_wf_cam {
    141	status = "okay";
    142};
    143
    144&pp2800_uf_cam {
    145	status = "okay";
    146};
    147
    148&pp2800_wf_cam {
    149	status = "okay";
    150};
    151
    152&pp3300_dx_edp {
    153	gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
    154};
    155
    156&sdhc_2 {
    157	status = "okay";
    158};
    159
    160&sn65dsi86_out {
    161	data-lanes = <0 1 2 3>;
    162};
    163
    164&sound {
    165	compatible = "google,sc7180-coachz";
    166	model = "sc7180-adau7002-max98357a";
    167	audio-routing = "PDM_DAT", "DMIC";
    168
    169	pinctrl-names = "default";
    170	pinctrl-0 = <&dmic_clk_en>;
    171};
    172
    173&sound_multimedia0_codec {
    174	sound-dai = <&adau7002>;
    175};
    176
    177/* PINCTRL - modifications to sc7180-trogdor.dtsi */
    178
    179&en_pp3300_dx_edp {
    180	pinmux  {
    181		pins = "gpio67";
    182	};
    183
    184	pinconf {
    185		pins = "gpio67";
    186	};
    187};
    188
    189&ts_reset_l {
    190	pinconf {
    191		/*
    192		 * We want reset state by default and it will be up to the
    193		 * driver to disable this when it's ready.
    194		 */
    195		output-low;
    196	};
    197};
    198
    199/* PINCTRL - board-specific pinctrl */
    200
    201&tlmm {
    202	gpio-line-names = "HUB_RST_L",
    203			  "AP_RAM_ID0",
    204			  "AP_SKU_ID2",
    205			  "AP_RAM_ID1",
    206			  "FP_TO_AP_IRQ_L",
    207			  "AP_RAM_ID2",
    208			  "UF_CAM_EN",
    209			  "WF_CAM_EN",
    210			  "TS_RESET_L",
    211			  "TS_INT_L",
    212			  "FPMCU_BOOT0",
    213			  "EDP_BRIJ_IRQ",
    214			  "AP_EDP_BKLTEN",
    215			  "UF_CAM_MCLK",
    216			  "WF_CAM_CLK",
    217			  "EDP_BRIJ_I2C_SDA",
    218			  "EDP_BRIJ_I2C_SCL",
    219			  "UF_CAM_SDA",
    220			  "UF_CAM_SCL",
    221			  "WF_CAM_SDA",
    222			  "WF_CAM_SCL",
    223			  "WLC_IRQ",
    224			  "FP_RST_L",
    225			  "AMP_EN",
    226			  "WLC_NRST",
    227			  "AP_SAR_SENSOR_SDA",
    228			  "AP_SAR_SENSOR_SCL",
    229			  "",
    230			  "",
    231			  "WF_CAM_RST_L",
    232			  "UF_CAM_RST_L",
    233			  "AP_BRD_ID2",
    234			  "BRIJ_SUSPEND",
    235			  "AP_BRD_ID0",
    236			  "AP_H1_SPI_MISO",
    237			  "AP_H1_SPI_MOSI",
    238			  "AP_H1_SPI_CLK",
    239			  "AP_H1_SPI_CS_L",
    240			  "",
    241			  "",
    242			  "",
    243			  "",
    244			  "H1_AP_INT_ODL",
    245			  "",
    246			  "UART_AP_TX_DBG_RX",
    247			  "UART_DBG_TX_AP_RX",
    248			  "",
    249			  "",
    250			  "FORCED_USB_BOOT",
    251			  "AMP_BCLK",
    252			  "AMP_LRCLK",
    253			  "AMP_DIN",
    254			  "",
    255			  "HP_BCLK",
    256			  "HP_LRCLK",
    257			  "HP_DOUT",
    258			  "HP_DIN",
    259			  "HP_MCLK",
    260			  "AP_SKU_ID0",
    261			  "AP_EC_SPI_MISO",
    262			  "AP_EC_SPI_MOSI",
    263			  "AP_EC_SPI_CLK",
    264			  "AP_EC_SPI_CS_L",
    265			  "AP_SPI_CLK",
    266			  "AP_SPI_MOSI",
    267			  "AP_SPI_MISO",
    268			  /*
    269			   * AP_FLASH_WP_L is crossystem ABI. Schematics
    270			   * call it BIOS_FLASH_WP_L.
    271			   */
    272			  "AP_FLASH_WP_L",
    273			  "EN_PP3300_DX_EDP",
    274			  "AP_SPI_CS0_L",
    275			  "SD_CD_ODL",
    276			  "",
    277			  "",
    278			  "",
    279			  "",
    280			  "EN_FP_RAILS",
    281			  "UIM2_DATA",
    282			  "UIM2_CLK",
    283			  "UIM2_RST",
    284			  "UIM2_PRESENT_L",
    285			  "UIM1_DATA",
    286			  "UIM1_CLK",
    287			  "UIM1_RST",
    288			  "",
    289			  "",
    290			  "HUB_EN",
    291			  "",
    292			  "AP_SPI_FP_MISO",
    293			  "AP_SPI_FP_MOSI",
    294			  "AP_SPI_FP_CLK",
    295			  "AP_SPI_FP_CS_L",
    296			  "AP_SKU_ID1",
    297			  "AP_RST_REQ",
    298			  "",
    299			  "AP_BRD_ID1",
    300			  "AP_EC_INT_L",
    301			  "",
    302			  "",
    303			  "",
    304			  "",
    305			  "",
    306			  "",
    307			  "",
    308			  "",
    309			  "",
    310			  "EDP_BRIJ_EN",
    311			  "",
    312			  "",
    313			  "",
    314			  "",
    315			  "",
    316			  "",
    317			  "",
    318			  "",
    319			  "",
    320			  "",
    321			  "AP_TS_PEN_I2C_SDA",
    322			  "AP_TS_PEN_I2C_SCL",
    323			  "DP_HOT_PLUG_DET",
    324			  "EC_IN_RW_ODL";
    325
    326	dmic_clk_en: dmic_clk_en {
    327		pinmux {
    328			pins = "gpio83";
    329			function = "gpio";
    330		};
    331
    332		pinconf {
    333			pins = "gpio83";
    334			drive-strength = <8>;
    335			bias-pull-up;
    336		};
    337	};
    338};