cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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sc7280-herobrine.dtsi (17913B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google Herobrine baseboard device tree source
      4 *
      5 * The set of things in this file is a bit loosely defined. It's roughly
      6 * defined as the set of things that the child boards happen to have in
      7 * common. Since all of the child boards started from the same original
      8 * design this is hopefully a large set of things but as more derivatives
      9 * appear things may "bubble down" out of this file. For things that are
     10 * part of the reference design but might not exist on child nodes we will
     11 * follow the lead of the SoC dtsi files and leave their status as "disabled".
     12 *
     13 * Copyright 2022 Google LLC.
     14 */
     15
     16#include <dt-bindings/input/gpio-keys.h>
     17#include <dt-bindings/input/input.h>
     18
     19#include "sc7280-qcard.dtsi"
     20#include "sc7280-chrome-common.dtsi"
     21
     22/ {
     23	chosen {
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	/*
     28	 * FIXED REGULATORS
     29	 *
     30	 * Sort order:
     31	 * 1. parents above children.
     32	 * 2. higher voltage above lower voltage.
     33	 * 3. alphabetically by node name.
     34	 */
     35
     36	/* This is the top level supply and variable voltage */
     37	ppvar_sys: ppvar-sys-regulator {
     38		compatible = "regulator-fixed";
     39		regulator-name = "ppvar_sys";
     40		regulator-always-on;
     41		regulator-boot-on;
     42	};
     43
     44	/* This divides ppvar_sys by 2, so voltage is variable */
     45	src_vph_pwr: src-vph-pwr-regulator {
     46		compatible = "regulator-fixed";
     47		regulator-name = "src_vph_pwr";
     48
     49		/* EC turns on with switchcap_on; always on for AP */
     50		regulator-always-on;
     51		regulator-boot-on;
     52
     53		vin-supply = <&ppvar_sys>;
     54	};
     55
     56	pp5000_s5: pp5000-s5-regulator {
     57		compatible = "regulator-fixed";
     58		regulator-name = "pp5000_s5";
     59
     60		/* EC turns on with en_pp5000_s5; always on for AP */
     61		regulator-always-on;
     62		regulator-boot-on;
     63		regulator-min-microvolt = <5000000>;
     64		regulator-max-microvolt = <5000000>;
     65
     66		vin-supply = <&ppvar_sys>;
     67	};
     68
     69	pp3300_z1: pp3300-z1-regulator {
     70		compatible = "regulator-fixed";
     71		regulator-name = "pp3300_z1";
     72
     73		/* EC turns on with en_pp3300_z1; always on for AP */
     74		regulator-always-on;
     75		regulator-boot-on;
     76		regulator-min-microvolt = <3300000>;
     77		regulator-max-microvolt = <3300000>;
     78
     79		vin-supply = <&ppvar_sys>;
     80	};
     81
     82	pp3300_codec: pp3300-codec-regulator {
     83		compatible = "regulator-fixed";
     84		regulator-name = "pp3300_codec";
     85
     86		regulator-min-microvolt = <3300000>;
     87		regulator-max-microvolt = <3300000>;
     88
     89		gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
     90		enable-active-high;
     91		pinctrl-names = "default";
     92		pinctrl-0 = <&en_pp3300_codec>;
     93
     94		vin-supply = <&pp3300_z1>;
     95		status = "disabled";
     96	};
     97
     98	pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
     99		compatible = "regulator-fixed";
    100		regulator-name = "pp3300_left_in_mlb";
    101
    102		regulator-min-microvolt = <3300000>;
    103		regulator-max-microvolt = <3300000>;
    104
    105		gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
    106		enable-active-high;
    107		pinctrl-names = "default";
    108		pinctrl-0 = <&en_pp3300_dx_edp>;
    109
    110		vin-supply = <&pp3300_z1>;
    111	};
    112
    113	pp3300_mcu_fp:
    114	pp3300_fp_ls:
    115	pp3300_fp_mcu: pp3300-fp-regulator {
    116		compatible = "regulator-fixed";
    117		regulator-name = "pp3300_fp";
    118
    119		regulator-min-microvolt = <3300000>;
    120		regulator-max-microvolt = <3300000>;
    121
    122		regulator-boot-on;
    123		regulator-always-on;
    124
    125		/*
    126		 * WARNING: it is intentional that GPIO 77 isn't listed here.
    127		 * The userspace script for updating the fingerprint firmware
    128		 * needs to control the FP regulators during a FW update,
    129		 * hence the signal can't be owned by the kernel regulator.
    130		 */
    131
    132		pinctrl-names = "default";
    133		pinctrl-0 = <&en_fp_rails>;
    134
    135		vin-supply = <&pp3300_z1>;
    136		status = "disabled";
    137	};
    138
    139	pp3300_hub: pp3300-hub-regulator {
    140		compatible = "regulator-fixed";
    141		regulator-name = "pp3300_hub";
    142
    143		regulator-min-microvolt = <3300000>;
    144		regulator-max-microvolt = <3300000>;
    145
    146		regulator-boot-on;
    147		regulator-always-on;
    148
    149		gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
    150		enable-active-high;
    151		pinctrl-names = "default";
    152		pinctrl-0 = <&hub_en>;
    153
    154		vin-supply = <&pp3300_z1>;
    155	};
    156
    157	pp3300_tp: pp3300-tp-regulator {
    158		compatible = "regulator-fixed";
    159		regulator-name = "pp3300_tp";
    160
    161		regulator-min-microvolt = <3300000>;
    162		regulator-max-microvolt = <3300000>;
    163
    164		/* AP turns on with PP1800_L18B_S0; always on for AP */
    165		regulator-always-on;
    166		regulator-boot-on;
    167
    168		vin-supply = <&pp3300_z1>;
    169	};
    170
    171	pp3300_ssd: pp3300-ssd-regulator {
    172		compatible = "regulator-fixed";
    173		regulator-name = "pp3300_ssd";
    174
    175		regulator-min-microvolt = <3300000>;
    176		regulator-max-microvolt = <3300000>;
    177
    178		gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
    179		enable-active-high;
    180		pinctrl-names = "default";
    181		pinctrl-0 = <&ssd_en>;
    182
    183		/*
    184		 * The bootloaer may have left PCIe configured. Powering this
    185		 * off while the PCIe clocks are still running isn't great,
    186		 * so it's better to default to this regulator being on.
    187		 */
    188		regulator-boot-on;
    189
    190		vin-supply = <&pp3300_z1>;
    191	};
    192
    193	pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
    194		compatible = "regulator-fixed";
    195		regulator-name = "pp2850_vcm_wf_cam";
    196
    197		regulator-min-microvolt = <2850000>;
    198		regulator-max-microvolt = <2850000>;
    199
    200		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
    201		enable-active-high;
    202		pinctrl-names = "default";
    203		pinctrl-0 = <&wf_cam_en>;
    204
    205		vin-supply = <&pp3300_z1>;
    206		status = "disabled";
    207	};
    208
    209	pp2850_wf_cam: pp2850-wf-cam-regulator {
    210		compatible = "regulator-fixed";
    211		regulator-name = "pp2850_wf_cam";
    212
    213		regulator-min-microvolt = <2850000>;
    214		regulator-max-microvolt = <2850000>;
    215
    216		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
    217		enable-active-high;
    218		/*
    219		 * The pinconf can only be referenced once so we put it on the
    220		 * first regulator and comment it out here.
    221		 *
    222		 * pinctrl-names = "default";
    223		 * pinctrl-0 = <&wf_cam_en>;
    224		 */
    225
    226		vin-supply = <&pp3300_z1>;
    227		status = "disabled";
    228	};
    229
    230	pp1800_fp: pp1800-fp-regulator {
    231		compatible = "regulator-fixed";
    232		regulator-name = "pp1800_fp";
    233
    234		regulator-min-microvolt = <1800000>;
    235		regulator-max-microvolt = <1800000>;
    236
    237		regulator-boot-on;
    238		regulator-always-on;
    239
    240		/*
    241		 * WARNING: it is intentional that GPIO 77 isn't listed here.
    242		 * The userspace script for updating the fingerprint firmware
    243		 * needs to control the FP regulators during a FW update,
    244		 * hence the signal can't be owned by the kernel regulator.
    245		 */
    246
    247		pinctrl-names = "default";
    248		pinctrl-0 = <&en_fp_rails>;
    249
    250		vin-supply = <&pp1800_l18b_s0>;
    251		status = "disabled";
    252	};
    253
    254	pp1800_wf_cam: pp1800-wf-cam-regulator {
    255		compatible = "regulator-fixed";
    256		regulator-name = "pp1800_wf_cam";
    257
    258		regulator-min-microvolt = <1800000>;
    259		regulator-max-microvolt = <1800000>;
    260
    261		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
    262		enable-active-high;
    263		/*
    264		 * The pinconf can only be referenced once so we put it on the
    265		 * first regulator and comment it out here.
    266		 *
    267		 * pinctrl-names = "default";
    268		 * pinctrl-0 = <&wf_cam_en>;
    269		 */
    270
    271		vin-supply = <&vreg_l19b_s0>;
    272		status = "disabled";
    273	};
    274
    275	pp1200_wf_cam: pp1200-wf-cam-regulator {
    276		compatible = "regulator-fixed";
    277		regulator-name = "pp1200_wf_cam";
    278
    279		regulator-min-microvolt = <1200000>;
    280		regulator-max-microvolt = <1200000>;
    281
    282		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
    283		enable-active-high;
    284		/*
    285		 * The pinconf can only be referenced once so we put it on the
    286		 * first regulator and comment it out here.
    287		 *
    288		 * pinctrl-names = "default";
    289		 * pinctrl-0 = <&wf_cam_en>;
    290		 */
    291
    292		vin-supply = <&pp3300_z1>;
    293		status = "disabled";
    294	};
    295
    296	/* BOARD-SPECIFIC TOP LEVEL NODES */
    297
    298	pwmleds {
    299		compatible = "pwm-leds";
    300		status = "disabled";
    301		keyboard_backlight: keyboard-backlight {
    302			status = "disabled";
    303			label = "cros_ec::kbd_backlight";
    304			pwms = <&cros_ec_pwm 0>;
    305			max-brightness = <1023>;
    306		};
    307	};
    308};
    309
    310/*
    311 * ADJUSTMENTS TO QCARD REGULATORS
    312 *
    313 * Mostly this is just board-local names for regulators that come from
    314 * Qcard, but this also has some minor regulator overrides.
    315 *
    316 * Names are only listed here if regulators go somewhere other than a
    317 * testpoint.
    318 */
    319
    320/* From Qcard to our board; ordered by PMIC-ID / rail number */
    321
    322pp1256_s8b: &vreg_s8b_1p256 {};
    323
    324pp1800_l18b_s0: &vreg_l18b_1p8 {};
    325pp1800_l18b:    &vreg_l18b_1p8 {};
    326
    327vreg_l19b_s0: &vreg_l19b_1p8 {};
    328
    329pp1800_alc5682: &vreg_l2c_1p8 {};
    330pp1800_l2c:     &vreg_l2c_1p8 {};
    331
    332vreg_l4c: &vreg_l4c_1p8_3p0 {};
    333
    334ppvar_l6c: &vreg_l6c_2p96 {};
    335
    336pp3000_l7c: &vreg_l7c_3p0 {};
    337
    338pp1800_prox: &vreg_l8c_1p8 {};
    339pp1800_l8c:  &vreg_l8c_1p8 {};
    340
    341pp2950_l9c: &vreg_l9c_2p96 {};
    342
    343pp1800_lcm:  &vreg_l12c_1p8 {};
    344pp1800_mipi: &vreg_l12c_1p8 {};
    345pp1800_l12c: &vreg_l12c_1p8 {};
    346
    347pp3300_lcm:  &vreg_l13c_3p0 {};
    348pp3300_mipi: &vreg_l13c_3p0 {};
    349pp3300_l13c: &vreg_l13c_3p0 {};
    350
    351/* From our board to Qcard; ordered same as node definition above */
    352
    353vreg_edp_bl: &ppvar_sys {};
    354
    355ts_avdd:      &pp3300_left_in_mlb {};
    356vreg_edp_3p3: &pp3300_left_in_mlb {};
    357
    358/* Regulator overrides from Qcard */
    359
    360/*
    361 * Herobrine boards only use l2c to power an external audio codec (like
    362 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
    363 */
    364&vreg_l2c_1p8 {
    365	regulator-min-microvolt = <1800000>;
    366};
    367
    368/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
    369
    370&edp_panel {
    371	/* Our board provides power to the qcard for the eDP panel. */
    372	power-supply = <&vreg_edp_3p3>;
    373};
    374
    375ap_sar_sensor_i2c: &i2c1 {
    376	clock-frequency = <400000>;
    377	status = "disabled";
    378
    379	ap_sar_sensor0: proximity@28 {
    380		compatible = "semtech,sx9324";
    381		reg = <0x28>;
    382		#io-channel-cells = <1>;
    383		pinctrl-names = "default";
    384		pinctrl-0 = <&sar0_irq_odl>;
    385
    386		interrupt-parent = <&tlmm>;
    387		interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
    388
    389		vdd-supply = <&pp1800_prox>;
    390
    391		label = "proximity-wifi-lte0";
    392		status = "disabled";
    393	};
    394
    395	ap_sar_sensor1: proximity@2c {
    396		compatible = "semtech,sx9324";
    397		reg = <0x2c>;
    398		#io-channel-cells = <1>;
    399		pinctrl-names = "default";
    400		pinctrl-0 = <&sar1_irq_odl>;
    401
    402		interrupt-parent = <&tlmm>;
    403		interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
    404
    405		vdd-supply = <&pp1800_prox>;
    406
    407		label = "proximity-wifi-lte1";
    408		status = "disabled";
    409	};
    410};
    411
    412ap_i2c_tpm: &i2c14 {
    413	status = "okay";
    414	clock-frequency = <400000>;
    415
    416	tpm@50 {
    417		compatible = "google,cr50";
    418		reg = <0x50>;
    419
    420		pinctrl-names = "default";
    421		pinctrl-0 = <&gsc_ap_int_odl>;
    422
    423		interrupt-parent = <&tlmm>;
    424		interrupts = <104 IRQ_TYPE_EDGE_RISING>;
    425	};
    426};
    427
    428&mdss {
    429	status = "okay";
    430};
    431
    432&mdss_mdp {
    433	status = "okay";
    434};
    435
    436/* NVMe drive, enabled on a per-board basis */
    437&pcie1 {
    438	pinctrl-names = "default";
    439	pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
    440
    441	perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
    442	vddpe-3v3-supply = <&pp3300_ssd>;
    443};
    444
    445&pm8350c_pwm {
    446	status = "okay";
    447};
    448
    449&pm8350c_pwm_backlight {
    450	status = "okay";
    451
    452	/* Our board provides power to the qcard for the backlight */
    453	power-supply = <&vreg_edp_bl>;
    454};
    455
    456&pmk8350_rtc {
    457	status = "disabled";
    458};
    459
    460&qupv3_id_0 {
    461	status = "okay";
    462};
    463
    464&qupv3_id_1 {
    465	status = "okay";
    466};
    467
    468/* SD Card, enabled on a per-board basis */
    469&sdhc_2 {
    470	pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
    471	pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
    472
    473	vmmc-supply = <&pp2950_l9c>;
    474	vqmmc-supply = <&ppvar_l6c>;
    475
    476	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
    477};
    478
    479/* Fingerprint, enabled on a per-board basis */
    480ap_spi_fp: &spi9 {
    481	pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
    482
    483	cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
    484
    485	cros_ec_fp: ec@0 {
    486		compatible = "google,cros-ec-spi";
    487		reg = <0>;
    488		interrupt-parent = <&tlmm>;
    489		interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
    490		pinctrl-names = "default";
    491		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
    492		spi-max-frequency = <3000000>;
    493	};
    494};
    495
    496ap_ec_spi: &spi10 {
    497	status = "okay";
    498	pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
    499
    500	cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
    501
    502	cros_ec: ec@0 {
    503		compatible = "google,cros-ec-spi";
    504		reg = <0>;
    505		interrupt-parent = <&tlmm>;
    506		interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
    507		pinctrl-names = "default";
    508		pinctrl-0 = <&ap_ec_int_l>;
    509		spi-max-frequency = <3000000>;
    510
    511		cros_ec_pwm: pwm {
    512			compatible = "google,cros-ec-pwm";
    513			#pwm-cells = <1>;
    514		};
    515
    516		i2c_tunnel: i2c-tunnel {
    517			compatible = "google,cros-ec-i2c-tunnel";
    518			google,remote-bus = <0>;
    519			#address-cells = <1>;
    520			#size-cells = <0>;
    521		};
    522
    523		typec {
    524			compatible = "google,cros-ec-typec";
    525			#address-cells = <1>;
    526			#size-cells = <0>;
    527
    528			usb_c0: connector@0 {
    529				compatible = "usb-c-connector";
    530				reg = <0>;
    531				label = "left";
    532				power-role = "dual";
    533				data-role = "host";
    534				try-power-role = "source";
    535			};
    536
    537			usb_c1: connector@1 {
    538				compatible = "usb-c-connector";
    539				reg = <1>;
    540				label = "right";
    541				power-role = "dual";
    542				data-role = "host";
    543				try-power-role = "source";
    544			};
    545		};
    546	};
    547};
    548
    549#include <arm/cros-ec-keyboard.dtsi>
    550#include <arm/cros-ec-sbs.dtsi>
    551
    552&keyboard_controller {
    553	function-row-physmap = <
    554		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */
    555		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */
    556		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */
    557		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */
    558		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */
    559		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */
    560		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */
    561		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */
    562		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */
    563		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */
    564	>;
    565	linux,keymap = <
    566		MATRIX_KEY(0x00, 0x02, KEY_BACK)
    567		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
    568		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
    569		MATRIX_KEY(0x01, 0x02, KEY_SCALE)
    570		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
    571		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
    572		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
    573		MATRIX_KEY(0x02, 0x09, KEY_MUTE)
    574		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
    575		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
    576
    577		CROS_STD_MAIN_KEYMAP
    578	>;
    579};
    580
    581&usb_1 {
    582	status = "okay";
    583};
    584
    585&usb_1_dwc3 {
    586	dr_mode = "host";
    587};
    588
    589&usb_1_hsphy {
    590	status = "okay";
    591};
    592
    593&usb_1_qmpphy {
    594	status = "okay";
    595};
    596
    597&usb_2 {
    598	status = "okay";
    599};
    600
    601&usb_2_dwc3 {
    602	dr_mode = "host";
    603};
    604
    605&usb_2_hsphy {
    606	status = "okay";
    607};
    608
    609/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
    610
    611&dp_hot_plug_det {
    612	bias-disable;
    613};
    614
    615&pcie1_clkreq_n {
    616	bias-pull-up;
    617	drive-strength = <2>;
    618};
    619
    620&qspi_cs0 {
    621	bias-disable;
    622	drive-strength = <8>;
    623};
    624
    625&qspi_clk {
    626	bias-disable;
    627	drive-strength = <8>;
    628};
    629
    630&qspi_data01 {
    631	/* High-Z when no transfers; nice to park the lines */
    632	bias-pull-up;
    633	drive-strength = <8>;
    634};
    635
    636/* For ap_tp_i2c */
    637&qup_i2c0_data_clk {
    638	/* Has external pull */
    639	bias-disable;
    640	drive-strength = <2>;
    641};
    642
    643/* For ap_i2c_tpm */
    644&qup_i2c14_data_clk {
    645	/* Has external pull */
    646	bias-disable;
    647	drive-strength = <2>;
    648};
    649
    650/* For ap_spi_fp */
    651&qup_spi9_data_clk {
    652	bias-disable;
    653	drive-strength = <2>;
    654};
    655
    656/* For ap_spi_fp */
    657&qup_spi9_cs_gpio {
    658	bias-disable;
    659	drive-strength = <2>;
    660};
    661
    662/* For ap_ec_spi */
    663&qup_spi10_data_clk {
    664	bias-disable;
    665	drive-strength = <2>;
    666};
    667
    668/* For ap_ec_spi */
    669&qup_spi10_cs_gpio {
    670	bias-disable;
    671	drive-strength = <2>;
    672};
    673
    674/* For uart_dbg */
    675&qup_uart5_rx {
    676	bias-pull-up;
    677};
    678
    679/* For uart_dbg */
    680&qup_uart5_tx {
    681	bias-disable;
    682	drive-strength = <2>;
    683};
    684
    685&sdc2_clk {
    686	bias-disable;
    687	drive-strength = <16>;
    688};
    689
    690&sdc2_cmd {
    691	bias-pull-up;
    692	drive-strength = <10>;
    693};
    694
    695&sdc2_data {
    696	bias-pull-up;
    697	drive-strength = <10>;
    698};
    699
    700/* PINCTRL - board-specific pinctrl */
    701
    702&pm7325_gpios {
    703	/*
    704	 * On a quick glance it might look like KYPD_VOL_UP_N is used, but
    705	 * that only passes through to a debug connector and not to the actual
    706	 * volume up key.
    707	 */
    708	status = "disabled"; /* No GPIOs are connected */
    709};
    710
    711&pmk8350_gpios {
    712	status = "disabled"; /* No GPIOs are connected */
    713};
    714
    715&tlmm {
    716	/* pinctrl settings for pins that have no real owners. */
    717	pinctrl-names = "default";
    718	pinctrl-0 = <&bios_flash_wp_od>;
    719
    720	amp_en: amp-en {
    721		pins = "gpio63";
    722		function = "gpio";
    723		bias-disable;
    724		drive-strength = <2>;
    725	};
    726
    727	ap_ec_int_l: ap-ec-int-l {
    728		pins = "gpio18";
    729		function = "gpio";
    730		bias-pull-up;
    731	};
    732
    733	bios_flash_wp_od: bios-flash-wp-od {
    734		pins = "gpio16";
    735		function = "gpio";
    736		/* Has external pull */
    737		bias-disable;
    738	};
    739
    740	en_fp_rails: en-fp-rails {
    741		pins = "gpio77";
    742		function = "gpio";
    743		bias-disable;
    744		drive-strength = <2>;
    745		output-high;
    746	};
    747
    748	en_pp3300_codec: en-pp3300-codec {
    749		pins = "gpio105";
    750		function = "gpio";
    751		bias-disable;
    752		drive-strength = <2>;
    753	};
    754
    755	en_pp3300_dx_edp: en-pp3300-dx-edp {
    756		pins = "gpio80";
    757		function = "gpio";
    758		bias-disable;
    759		drive-strength = <2>;
    760	};
    761
    762	fp_rst_l: fp-rst-l {
    763		pins = "gpio78";
    764		function = "gpio";
    765		bias-disable;
    766		drive-strength = <2>;
    767	};
    768
    769	fp_to_ap_irq_l: fp-to-ap-irq-l {
    770		pins = "gpio61";
    771		function = "gpio";
    772		/* Has external pullup */
    773		bias-disable;
    774	};
    775
    776	fpmcu_boot0: fpmcu-boot0 {
    777		pins = "gpio68";
    778		function = "gpio";
    779		bias-disable;
    780	};
    781
    782	gsc_ap_int_odl: gsc-ap-int-odl {
    783		pins = "gpio104";
    784		function = "gpio";
    785		bias-pull-up;
    786	};
    787
    788	hp_irq: hp-irq {
    789		pins = "gpio101";
    790		function = "gpio";
    791		bias-pull-up;
    792	};
    793
    794	hub_en: hub-en {
    795		pins = "gpio157";
    796		function = "gpio";
    797		bias-disable;
    798		drive-strength = <2>;
    799	};
    800
    801	pe_wake_odl: pe-wake-odl {
    802		pins = "gpio3";
    803		function = "gpio";
    804		/* Has external pull */
    805		bias-disable;
    806		drive-strength = <2>;
    807	};
    808
    809	/* For ap_spi_fp */
    810	qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high {
    811		pins = "gpio39";
    812		function = "gpio";
    813		output-high;
    814	};
    815
    816	/* For ap_ec_spi */
    817	qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
    818		pins = "gpio43";
    819		function = "gpio";
    820		output-high;
    821	};
    822
    823	sar0_irq_odl: sar0-irq-odl {
    824		pins = "gpio141";
    825		function = "gpio";
    826		bias-pull-up;
    827	};
    828
    829	sar1_irq_odl: sar1-irq-odl {
    830		pins = "gpio140";
    831		function = "gpio";
    832		bias-pull-up;
    833	};
    834
    835	sd_cd_odl: sd-cd-odl {
    836		pins = "gpio91";
    837		function = "gpio";
    838		bias-pull-up;
    839	};
    840
    841	ssd_en: ssd-en {
    842		pins = "gpio51";
    843		function = "gpio";
    844		bias-disable;
    845		drive-strength = <2>;
    846	};
    847
    848	ssd_rst_l: ssd-rst-l {
    849		pins = "gpio2";
    850		function = "gpio";
    851		bias-disable;
    852		drive-strength = <2>;
    853		output-low;
    854	};
    855
    856	tp_int_odl: tp-int-odl {
    857		pins = "gpio7";
    858		function = "gpio";
    859		/* Has external pullup */
    860		bias-disable;
    861	};
    862
    863	wf_cam_en: wf-cam-en {
    864		pins = "gpio119";
    865		function = "gpio";
    866		/* Has external pulldown */
    867		bias-disable;
    868		drive-strength = <2>;
    869	};
    870};