cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sdm845-db845c.dts (23813B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2019, Linaro Ltd.
      4 */
      5
      6/dts-v1/;
      7
      8#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
      9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
     10#include <dt-bindings/sound/qcom,q6afe.h>
     11#include <dt-bindings/sound/qcom,q6asm.h>
     12#include "sdm845.dtsi"
     13#include "pm8998.dtsi"
     14#include "pmi8998.dtsi"
     15
     16/ {
     17	model = "Thundercomm Dragonboard 845c";
     18	compatible = "thundercomm,db845c", "qcom,sdm845";
     19	qcom,msm-id = <341 0x20001>;
     20	qcom,board-id = <8 0>;
     21
     22	aliases {
     23		serial0 = &uart9;
     24		hsuart0 = &uart6;
     25	};
     26
     27	chosen {
     28		stdout-path = "serial0:115200n8";
     29	};
     30
     31	/* Fixed crystal oscillator dedicated to MCP2517FD */
     32	clk40M: can-clock {
     33		compatible = "fixed-clock";
     34		#clock-cells = <0>;
     35		clock-frequency = <40000000>;
     36	};
     37
     38	dc12v: dc12v-regulator {
     39		compatible = "regulator-fixed";
     40		regulator-name = "DC12V";
     41		regulator-min-microvolt = <12000000>;
     42		regulator-max-microvolt = <12000000>;
     43		regulator-always-on;
     44	};
     45
     46	gpio_keys {
     47		compatible = "gpio-keys";
     48		autorepeat;
     49
     50		pinctrl-names = "default";
     51		pinctrl-0 = <&vol_up_pin_a>;
     52
     53		vol-up {
     54			label = "Volume Up";
     55			linux,code = <KEY_VOLUMEUP>;
     56			gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
     57		};
     58	};
     59
     60	leds {
     61		compatible = "gpio-leds";
     62
     63		user4 {
     64			label = "green:user4";
     65			gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
     66			linux,default-trigger = "panic-indicator";
     67			default-state = "off";
     68		};
     69
     70		wlan {
     71			label = "yellow:wlan";
     72			gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
     73			linux,default-trigger = "phy0tx";
     74			default-state = "off";
     75		};
     76
     77		bt {
     78			label = "blue:bt";
     79			gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
     80			linux,default-trigger = "bluetooth-power";
     81			default-state = "off";
     82		};
     83	};
     84
     85	hdmi-out {
     86		compatible = "hdmi-connector";
     87		type = "a";
     88
     89		port {
     90			hdmi_con: endpoint {
     91				remote-endpoint = <&lt9611_out>;
     92			};
     93		};
     94	};
     95
     96	lt9611_1v8: lt9611-vdd18-regulator {
     97		compatible = "regulator-fixed";
     98		regulator-name = "LT9611_1V8";
     99
    100		vin-supply = <&vdc_5v>;
    101		regulator-min-microvolt = <1800000>;
    102		regulator-max-microvolt = <1800000>;
    103
    104		gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
    105		enable-active-high;
    106	};
    107
    108	lt9611_3v3: lt9611-3v3 {
    109		compatible = "regulator-fixed";
    110		regulator-name = "LT9611_3V3";
    111
    112		vin-supply = <&vdc_3v3>;
    113		regulator-min-microvolt = <3300000>;
    114		regulator-max-microvolt = <3300000>;
    115
    116		// TODO: make it possible to drive same GPIO from two clients
    117		// gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
    118		// enable-active-high;
    119	};
    120
    121	pcie0_1p05v: pcie-0-1p05v-regulator {
    122		compatible = "regulator-fixed";
    123		regulator-name = "PCIE0_1.05V";
    124
    125		vin-supply = <&vbat>;
    126		regulator-min-microvolt = <1050000>;
    127		regulator-max-microvolt = <1050000>;
    128
    129		// TODO: make it possible to drive same GPIO from two clients
    130		// gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
    131		// enable-active-high;
    132	};
    133
    134	cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
    135		compatible = "regulator-fixed";
    136		regulator-name = "CAM0_DVDD_1V2";
    137		regulator-min-microvolt = <1200000>;
    138		regulator-max-microvolt = <1200000>;
    139		enable-active-high;
    140		gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
    141		pinctrl-names = "default";
    142		pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
    143		vin-supply = <&vbat>;
    144	};
    145
    146	cam0_avdd_2v8: reg_cam0_avdd_2v8 {
    147		compatible = "regulator-fixed";
    148		regulator-name = "CAM0_AVDD_2V8";
    149		regulator-min-microvolt = <2800000>;
    150		regulator-max-microvolt = <2800000>;
    151		enable-active-high;
    152		gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
    153		pinctrl-names = "default";
    154		pinctrl-0 = <&cam0_avdd_2v8_en_default>;
    155		vin-supply = <&vbat>;
    156	};
    157
    158	/* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
    159	cam3_avdd_2v8: reg_cam3_avdd_2v8 {
    160		compatible = "regulator-fixed";
    161		regulator-name = "CAM3_AVDD_2V8";
    162		regulator-min-microvolt = <2800000>;
    163		regulator-max-microvolt = <2800000>;
    164		regulator-always-on;
    165		vin-supply = <&vbat>;
    166	};
    167
    168	pcie0_3p3v_dual: vldo-3v3-regulator {
    169		compatible = "regulator-fixed";
    170		regulator-name = "VLDO_3V3";
    171
    172		vin-supply = <&vbat>;
    173		regulator-min-microvolt = <3300000>;
    174		regulator-max-microvolt = <3300000>;
    175
    176		gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
    177		enable-active-high;
    178
    179		pinctrl-names = "default";
    180		pinctrl-0 = <&pcie0_pwren_state>;
    181	};
    182
    183	v5p0_hdmiout: v5p0-hdmiout-regulator {
    184		compatible = "regulator-fixed";
    185		regulator-name = "V5P0_HDMIOUT";
    186
    187		vin-supply = <&vdc_5v>;
    188		regulator-min-microvolt = <500000>;
    189		regulator-max-microvolt = <500000>;
    190
    191		// TODO: make it possible to drive same GPIO from two clients
    192		// gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
    193		// enable-active-high;
    194	};
    195
    196	vbat: vbat-regulator {
    197		compatible = "regulator-fixed";
    198		regulator-name = "VBAT";
    199
    200		vin-supply = <&dc12v>;
    201		regulator-min-microvolt = <4200000>;
    202		regulator-max-microvolt = <4200000>;
    203		regulator-always-on;
    204	};
    205
    206	vbat_som: vbat-som-regulator {
    207		compatible = "regulator-fixed";
    208		regulator-name = "VBAT_SOM";
    209
    210		vin-supply = <&dc12v>;
    211		regulator-min-microvolt = <4200000>;
    212		regulator-max-microvolt = <4200000>;
    213		regulator-always-on;
    214	};
    215
    216	vdc_3v3: vdc-3v3-regulator {
    217		compatible = "regulator-fixed";
    218		regulator-name = "VDC_3V3";
    219		vin-supply = <&dc12v>;
    220		regulator-min-microvolt = <3300000>;
    221		regulator-max-microvolt = <3300000>;
    222		regulator-always-on;
    223	};
    224
    225	vdc_5v: vdc-5v-regulator {
    226		compatible = "regulator-fixed";
    227		regulator-name = "VDC_5V";
    228
    229		vin-supply = <&dc12v>;
    230		regulator-min-microvolt = <500000>;
    231		regulator-max-microvolt = <500000>;
    232		regulator-always-on;
    233	};
    234
    235	vreg_s4a_1p8: vreg-s4a-1p8 {
    236		compatible = "regulator-fixed";
    237		regulator-name = "vreg_s4a_1p8";
    238
    239		regulator-min-microvolt = <1800000>;
    240		regulator-max-microvolt = <1800000>;
    241		regulator-always-on;
    242	};
    243
    244	vph_pwr: vph-pwr-regulator {
    245		compatible = "regulator-fixed";
    246		regulator-name = "vph_pwr";
    247
    248		vin-supply = <&vbat_som>;
    249	};
    250};
    251
    252&adsp_pas {
    253	status = "okay";
    254
    255	firmware-name = "qcom/sdm845/adsp.mbn";
    256};
    257
    258&apps_rsc {
    259	pm8998-rpmh-regulators {
    260		compatible = "qcom,pm8998-rpmh-regulators";
    261		qcom,pmic-id = "a";
    262		vdd-s1-supply = <&vph_pwr>;
    263		vdd-s2-supply = <&vph_pwr>;
    264		vdd-s3-supply = <&vph_pwr>;
    265		vdd-s4-supply = <&vph_pwr>;
    266		vdd-s5-supply = <&vph_pwr>;
    267		vdd-s6-supply = <&vph_pwr>;
    268		vdd-s7-supply = <&vph_pwr>;
    269		vdd-s8-supply = <&vph_pwr>;
    270		vdd-s9-supply = <&vph_pwr>;
    271		vdd-s10-supply = <&vph_pwr>;
    272		vdd-s11-supply = <&vph_pwr>;
    273		vdd-s12-supply = <&vph_pwr>;
    274		vdd-s13-supply = <&vph_pwr>;
    275		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
    276		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
    277		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
    278		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
    279		vdd-l6-supply = <&vph_pwr>;
    280		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
    281		vdd-l9-supply = <&vreg_bob>;
    282		vdd-l10-l23-l25-supply = <&vreg_bob>;
    283		vdd-l13-l19-l21-supply = <&vreg_bob>;
    284		vdd-l16-l28-supply = <&vreg_bob>;
    285		vdd-l18-l22-supply = <&vreg_bob>;
    286		vdd-l20-l24-supply = <&vreg_bob>;
    287		vdd-l26-supply = <&vreg_s3a_1p35>;
    288		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
    289
    290		vreg_s3a_1p35: smps3 {
    291			regulator-min-microvolt = <1352000>;
    292			regulator-max-microvolt = <1352000>;
    293		};
    294
    295		vreg_s5a_2p04: smps5 {
    296			regulator-min-microvolt = <1904000>;
    297			regulator-max-microvolt = <2040000>;
    298		};
    299
    300		vreg_s7a_1p025: smps7 {
    301			regulator-min-microvolt = <900000>;
    302			regulator-max-microvolt = <1028000>;
    303		};
    304
    305		vreg_l1a_0p875: ldo1 {
    306			regulator-min-microvolt = <880000>;
    307			regulator-max-microvolt = <880000>;
    308			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    309		};
    310
    311		vreg_l5a_0p8: ldo5 {
    312			regulator-min-microvolt = <800000>;
    313			regulator-max-microvolt = <800000>;
    314			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    315		};
    316
    317		vreg_l12a_1p8: ldo12 {
    318			regulator-min-microvolt = <1800000>;
    319			regulator-max-microvolt = <1800000>;
    320			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    321		};
    322
    323		vreg_l7a_1p8: ldo7 {
    324			regulator-min-microvolt = <1800000>;
    325			regulator-max-microvolt = <1800000>;
    326			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    327		};
    328
    329		vreg_l13a_2p95: ldo13 {
    330			regulator-min-microvolt = <1800000>;
    331			regulator-max-microvolt = <2960000>;
    332			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    333		};
    334
    335		vreg_l17a_1p3: ldo17 {
    336			regulator-min-microvolt = <1304000>;
    337			regulator-max-microvolt = <1304000>;
    338			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    339		};
    340
    341		vreg_l20a_2p95: ldo20 {
    342			regulator-min-microvolt = <2960000>;
    343			regulator-max-microvolt = <2968000>;
    344			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    345		};
    346
    347		vreg_l21a_2p95: ldo21 {
    348			regulator-min-microvolt = <2960000>;
    349			regulator-max-microvolt = <2968000>;
    350			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    351		};
    352
    353		vreg_l24a_3p075: ldo24 {
    354			regulator-min-microvolt = <3088000>;
    355			regulator-max-microvolt = <3088000>;
    356			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    357		};
    358
    359		vreg_l25a_3p3: ldo25 {
    360			regulator-min-microvolt = <3300000>;
    361			regulator-max-microvolt = <3312000>;
    362			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    363		};
    364
    365		vreg_l26a_1p2: ldo26 {
    366			regulator-min-microvolt = <1200000>;
    367			regulator-max-microvolt = <1200000>;
    368			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    369		};
    370
    371		vreg_lvs1a_1p8: lvs1 {
    372			regulator-min-microvolt = <1800000>;
    373			regulator-max-microvolt = <1800000>;
    374			regulator-always-on;
    375		};
    376
    377		vreg_lvs2a_1p8: lvs2 {
    378			regulator-min-microvolt = <1800000>;
    379			regulator-max-microvolt = <1800000>;
    380			regulator-always-on;
    381		};
    382	};
    383
    384	pmi8998-rpmh-regulators {
    385		compatible = "qcom,pmi8998-rpmh-regulators";
    386		qcom,pmic-id = "b";
    387
    388		vdd-bob-supply = <&vph_pwr>;
    389
    390		vreg_bob: bob {
    391			regulator-min-microvolt = <3312000>;
    392			regulator-max-microvolt = <3600000>;
    393			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
    394			regulator-allow-bypass;
    395		};
    396	};
    397};
    398
    399&cdsp_pas {
    400	status = "okay";
    401	firmware-name = "qcom/sdm845/cdsp.mbn";
    402};
    403
    404&dsi0 {
    405	status = "okay";
    406	vdda-supply = <&vreg_l26a_1p2>;
    407
    408	ports {
    409		port@1 {
    410			endpoint {
    411				remote-endpoint = <&lt9611_a>;
    412				data-lanes = <0 1 2 3>;
    413			};
    414		};
    415	};
    416};
    417
    418&dsi0_phy {
    419	status = "okay";
    420	vdds-supply = <&vreg_l1a_0p875>;
    421};
    422
    423&gcc {
    424	protected-clocks = <GCC_QSPI_CORE_CLK>,
    425			   <GCC_QSPI_CORE_CLK_SRC>,
    426			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
    427			   <GCC_LPASS_Q6_AXI_CLK>,
    428			   <GCC_LPASS_SWAY_CLK>;
    429};
    430
    431&gmu {
    432	status = "okay";
    433};
    434
    435&gpi_dma0 {
    436	status = "okay";
    437};
    438
    439&gpu {
    440	status = "okay";
    441	zap-shader {
    442		memory-region = <&gpu_mem>;
    443		firmware-name = "qcom/sdm845/a630_zap.mbn";
    444	};
    445};
    446
    447&i2c10 {
    448	status = "okay";
    449	clock-frequency = <400000>;
    450
    451	lt9611_codec: hdmi-bridge@3b {
    452		compatible = "lontium,lt9611";
    453		reg = <0x3b>;
    454		#sound-dai-cells = <1>;
    455
    456		interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
    457
    458		reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
    459
    460		vdd-supply = <&lt9611_1v8>;
    461		vcc-supply = <&lt9611_3v3>;
    462
    463		pinctrl-names = "default";
    464		pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
    465
    466		ports {
    467			#address-cells = <1>;
    468			#size-cells = <0>;
    469
    470			port@0 {
    471				reg = <0>;
    472
    473				lt9611_a: endpoint {
    474					remote-endpoint = <&dsi0_out>;
    475				};
    476			};
    477
    478			port@2 {
    479				reg = <2>;
    480
    481				lt9611_out: endpoint {
    482					remote-endpoint = <&hdmi_con>;
    483				};
    484			};
    485		};
    486	};
    487};
    488
    489&i2c11 {
    490	/* On Low speed expansion */
    491	label = "LS-I2C1";
    492	status = "okay";
    493};
    494
    495&i2c14 {
    496	/* On Low speed expansion */
    497	label = "LS-I2C0";
    498	status = "okay";
    499};
    500
    501&mdss {
    502	status = "okay";
    503};
    504
    505&mss_pil {
    506	status = "okay";
    507	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
    508};
    509
    510&pcie0 {
    511	status = "okay";
    512	perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
    513	enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
    514
    515	vddpe-3v3-supply = <&pcie0_3p3v_dual>;
    516
    517	pinctrl-names = "default";
    518	pinctrl-0 = <&pcie0_default_state>;
    519};
    520
    521&pcie0_phy {
    522	status = "okay";
    523
    524	vdda-phy-supply = <&vreg_l1a_0p875>;
    525	vdda-pll-supply = <&vreg_l26a_1p2>;
    526};
    527
    528&pcie1 {
    529	status = "okay";
    530	perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
    531
    532	pinctrl-names = "default";
    533	pinctrl-0 = <&pcie1_default_state>;
    534};
    535
    536&pcie1_phy {
    537	status = "okay";
    538
    539	vdda-phy-supply = <&vreg_l1a_0p875>;
    540	vdda-pll-supply = <&vreg_l26a_1p2>;
    541};
    542
    543&pm8998_gpio {
    544	gpio-line-names =
    545		"NC",
    546		"NC",
    547		"WLAN_SW_CTRL",
    548		"NC",
    549		"PM_GPIO5_BLUE_BT_LED",
    550		"VOL_UP_N",
    551		"NC",
    552		"ADC_IN1",
    553		"PM_GPIO9_YEL_WIFI_LED",
    554		"CAM0_AVDD_EN",
    555		"NC",
    556		"CAM0_DVDD_EN",
    557		"PM_GPIO13_GREEN_U4_LED",
    558		"DIV_CLK2",
    559		"NC",
    560		"NC",
    561		"NC",
    562		"SMB_STAT",
    563		"NC",
    564		"NC",
    565		"ADC_IN2",
    566		"OPTION1",
    567		"WCSS_PWR_REQ",
    568		"PM845_GPIO24",
    569		"OPTION2",
    570		"PM845_SLB";
    571
    572	cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
    573		pins = "gpio12";
    574		function = "normal";
    575
    576		bias-pull-up;
    577		drive-push-pull;
    578		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
    579	};
    580
    581	cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
    582		pins = "gpio10";
    583		function = "normal";
    584
    585		bias-pull-up;
    586		drive-push-pull;
    587		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
    588	};
    589
    590	vol_up_pin_a: vol-up-active {
    591		pins = "gpio6";
    592		function = "normal";
    593		input-enable;
    594		bias-pull-up;
    595		qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
    596	};
    597};
    598
    599&pm8998_pon {
    600	resin {
    601		compatible = "qcom,pm8941-resin";
    602		interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
    603		debounce = <15625>;
    604		bias-pull-up;
    605		linux,code = <KEY_VOLUMEDOWN>;
    606	};
    607};
    608
    609/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
    610&q6afedai {
    611	qi2s@22 {
    612		reg = <22>;
    613		qcom,sd-lines = <0 1 2 3>;
    614	};
    615};
    616
    617&q6asmdai {
    618	dai@0 {
    619		reg = <0>;
    620	};
    621
    622	dai@1 {
    623		reg = <1>;
    624	};
    625
    626	dai@2 {
    627		reg = <2>;
    628	};
    629
    630	dai@3 {
    631		reg = <3>;
    632		direction = <2>;
    633		is-compress-dai;
    634	};
    635};
    636
    637&qupv3_id_0 {
    638	status = "okay";
    639};
    640
    641&qupv3_id_1 {
    642	status = "okay";
    643};
    644
    645&sdhc_2 {
    646	status = "okay";
    647
    648	pinctrl-names = "default";
    649	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
    650
    651	vmmc-supply = <&vreg_l21a_2p95>;
    652	vqmmc-supply = <&vreg_l13a_2p95>;
    653
    654	bus-width = <4>;
    655	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
    656};
    657
    658&sound {
    659	compatible = "qcom,db845c-sndcard";
    660	pinctrl-0 = <&quat_mi2s_active
    661			 &quat_mi2s_sd0_active
    662			 &quat_mi2s_sd1_active
    663			 &quat_mi2s_sd2_active
    664			 &quat_mi2s_sd3_active>;
    665	pinctrl-names = "default";
    666	model = "DB845c";
    667	audio-routing =
    668		"RX_BIAS", "MCLK",
    669		"AMIC1", "MIC BIAS1",
    670		"AMIC2", "MIC BIAS2",
    671		"DMIC0", "MIC BIAS1",
    672		"DMIC1", "MIC BIAS1",
    673		"DMIC2", "MIC BIAS3",
    674		"DMIC3", "MIC BIAS3",
    675		"SpkrLeft IN", "SPK1 OUT",
    676		"SpkrRight IN", "SPK2 OUT",
    677		"MM_DL1",  "MultiMedia1 Playback",
    678		"MM_DL2",  "MultiMedia2 Playback",
    679		"MM_DL4",  "MultiMedia4 Playback",
    680		"MultiMedia3 Capture", "MM_UL3";
    681
    682	mm1-dai-link {
    683		link-name = "MultiMedia1";
    684		cpu {
    685			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
    686		};
    687	};
    688
    689	mm2-dai-link {
    690		link-name = "MultiMedia2";
    691		cpu {
    692			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
    693		};
    694	};
    695
    696	mm3-dai-link {
    697		link-name = "MultiMedia3";
    698		cpu {
    699			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
    700		};
    701	};
    702
    703	mm4-dai-link {
    704		link-name = "MultiMedia4";
    705		cpu {
    706			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA4>;
    707		};
    708	};
    709
    710	hdmi-dai-link {
    711		link-name = "HDMI Playback";
    712		cpu {
    713			sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
    714		};
    715
    716		platform {
    717			sound-dai = <&q6routing>;
    718		};
    719
    720		codec {
    721			sound-dai =  <&lt9611_codec 0>;
    722		};
    723	};
    724
    725	slim-dai-link {
    726		link-name = "SLIM Playback";
    727		cpu {
    728			sound-dai = <&q6afedai SLIMBUS_0_RX>;
    729		};
    730
    731		platform {
    732			sound-dai = <&q6routing>;
    733		};
    734
    735		codec {
    736			sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
    737		};
    738	};
    739
    740	slimcap-dai-link {
    741		link-name = "SLIM Capture";
    742		cpu {
    743			sound-dai = <&q6afedai SLIMBUS_0_TX>;
    744		};
    745
    746		platform {
    747			sound-dai = <&q6routing>;
    748		};
    749
    750		codec {
    751			sound-dai = <&wcd9340 1>;
    752		};
    753	};
    754};
    755
    756&spi0 {
    757	status = "okay";
    758	pinctrl-names = "default";
    759	pinctrl-0 = <&qup_spi0_default>;
    760	cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
    761
    762	can@0 {
    763		compatible = "microchip,mcp2517fd";
    764		reg = <0>;
    765		clocks = <&clk40M>;
    766		interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
    767		spi-max-frequency = <10000000>;
    768		vdd-supply = <&vdc_5v>;
    769		xceiver-supply = <&vdc_5v>;
    770	};
    771};
    772
    773&spi2 {
    774	/* On Low speed expansion */
    775	label = "LS-SPI0";
    776	status = "okay";
    777};
    778
    779&tlmm {
    780	cam0_default: cam0_default {
    781		rst {
    782			pins = "gpio9";
    783			function = "gpio";
    784
    785			drive-strength = <16>;
    786			bias-disable;
    787		};
    788
    789		mclk0 {
    790			pins = "gpio13";
    791			function = "cam_mclk";
    792
    793			drive-strength = <16>;
    794			bias-disable;
    795		};
    796	};
    797
    798	cam3_default: cam3_default {
    799		rst {
    800			function = "gpio";
    801			pins = "gpio21";
    802
    803			drive-strength = <16>;
    804			bias-disable;
    805		};
    806
    807		mclk3 {
    808			function = "cam_mclk";
    809			pins = "gpio16";
    810
    811			drive-strength = <16>;
    812			bias-disable;
    813		};
    814	};
    815
    816	dsi_sw_sel: dsi-sw-sel {
    817		pins = "gpio120";
    818		function = "gpio";
    819
    820		drive-strength = <2>;
    821		bias-disable;
    822		output-high;
    823	};
    824
    825	lt9611_irq_pin: lt9611-irq {
    826		pins = "gpio84";
    827		function = "gpio";
    828		bias-disable;
    829	};
    830
    831	pcie0_default_state: pcie0-default {
    832		clkreq {
    833			pins = "gpio36";
    834			function = "pci_e0";
    835			bias-pull-up;
    836		};
    837
    838		reset-n {
    839			pins = "gpio35";
    840			function = "gpio";
    841
    842			drive-strength = <2>;
    843			output-low;
    844			bias-pull-down;
    845		};
    846
    847		wake-n {
    848			pins = "gpio37";
    849			function = "gpio";
    850
    851			drive-strength = <2>;
    852			bias-pull-up;
    853		};
    854	};
    855
    856	pcie0_pwren_state: pcie0-pwren {
    857		pins = "gpio90";
    858		function = "gpio";
    859
    860		drive-strength = <2>;
    861		bias-disable;
    862	};
    863
    864	pcie1_default_state: pcie1-default {
    865		perst-n {
    866			pins = "gpio102";
    867			function = "gpio";
    868
    869			drive-strength = <16>;
    870			bias-disable;
    871		};
    872
    873		clkreq {
    874			pins = "gpio103";
    875			function = "pci_e1";
    876			bias-pull-up;
    877		};
    878
    879		wake-n {
    880			pins = "gpio11";
    881			function = "gpio";
    882
    883			drive-strength = <2>;
    884			bias-pull-up;
    885		};
    886
    887		reset-n {
    888			pins = "gpio75";
    889			function = "gpio";
    890
    891			drive-strength = <16>;
    892			bias-pull-up;
    893			output-high;
    894		};
    895	};
    896
    897	sdc2_default_state: sdc2-default {
    898		clk {
    899			pins = "sdc2_clk";
    900			bias-disable;
    901
    902			/*
    903			 * It seems that mmc_test reports errors if drive
    904			 * strength is not 16 on clk, cmd, and data pins.
    905			 */
    906			drive-strength = <16>;
    907		};
    908
    909		cmd {
    910			pins = "sdc2_cmd";
    911			bias-pull-up;
    912			drive-strength = <10>;
    913		};
    914
    915		data {
    916			pins = "sdc2_data";
    917			bias-pull-up;
    918			drive-strength = <10>;
    919		};
    920	};
    921
    922	sdc2_card_det_n: sd-card-det-n {
    923		pins = "gpio126";
    924		function = "gpio";
    925		bias-pull-up;
    926	};
    927
    928	wcd_intr_default: wcd_intr_default {
    929		pins = <54>;
    930		function = "gpio";
    931
    932		input-enable;
    933		bias-pull-down;
    934		drive-strength = <2>;
    935	};
    936};
    937
    938&uart3 {
    939	label = "LS-UART0";
    940	status = "disabled";
    941};
    942
    943&uart6 {
    944	status = "okay";
    945
    946	bluetooth {
    947		compatible = "qcom,wcn3990-bt";
    948
    949		vddio-supply = <&vreg_s4a_1p8>;
    950		vddxo-supply = <&vreg_l7a_1p8>;
    951		vddrf-supply = <&vreg_l17a_1p3>;
    952		vddch0-supply = <&vreg_l25a_3p3>;
    953		max-speed = <3200000>;
    954	};
    955};
    956
    957&uart9 {
    958	label = "LS-UART1";
    959	status = "okay";
    960};
    961
    962&usb_1 {
    963	status = "okay";
    964};
    965
    966&usb_1_dwc3 {
    967	dr_mode = "peripheral";
    968};
    969
    970&usb_1_hsphy {
    971	status = "okay";
    972
    973	vdd-supply = <&vreg_l1a_0p875>;
    974	vdda-pll-supply = <&vreg_l12a_1p8>;
    975	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
    976
    977	qcom,imp-res-offset-value = <8>;
    978	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
    979	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
    980	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
    981};
    982
    983&usb_1_qmpphy {
    984	status = "okay";
    985
    986	vdda-phy-supply = <&vreg_l26a_1p2>;
    987	vdda-pll-supply = <&vreg_l1a_0p875>;
    988};
    989
    990&usb_2 {
    991	status = "okay";
    992};
    993
    994&usb_2_dwc3 {
    995	dr_mode = "host";
    996};
    997
    998&usb_2_hsphy {
    999	status = "okay";
   1000
   1001	vdd-supply = <&vreg_l1a_0p875>;
   1002	vdda-pll-supply = <&vreg_l12a_1p8>;
   1003	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
   1004
   1005	qcom,imp-res-offset-value = <8>;
   1006	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
   1007};
   1008
   1009&usb_2_qmpphy {
   1010	status = "okay";
   1011
   1012	vdda-phy-supply = <&vreg_l26a_1p2>;
   1013	vdda-pll-supply = <&vreg_l1a_0p875>;
   1014};
   1015
   1016&ufs_mem_hc {
   1017	status = "okay";
   1018
   1019	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
   1020
   1021	vcc-supply = <&vreg_l20a_2p95>;
   1022	vcc-max-microamp = <800000>;
   1023};
   1024
   1025&ufs_mem_phy {
   1026	status = "okay";
   1027
   1028	vdda-phy-supply = <&vreg_l1a_0p875>;
   1029	vdda-pll-supply = <&vreg_l26a_1p2>;
   1030};
   1031
   1032&venus {
   1033	status = "okay";
   1034};
   1035
   1036&wcd9340{
   1037	pinctrl-0 = <&wcd_intr_default>;
   1038	pinctrl-names = "default";
   1039	clock-names = "extclk";
   1040	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
   1041	reset-gpios = <&tlmm 64 0>;
   1042	vdd-buck-supply = <&vreg_s4a_1p8>;
   1043	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
   1044	vdd-tx-supply = <&vreg_s4a_1p8>;
   1045	vdd-rx-supply = <&vreg_s4a_1p8>;
   1046	vdd-io-supply = <&vreg_s4a_1p8>;
   1047
   1048	swm: swm@c85 {
   1049		left_spkr: wsa8810-left{
   1050			compatible = "sdw10217201000";
   1051			reg = <0 1>;
   1052			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
   1053			#thermal-sensor-cells = <0>;
   1054			sound-name-prefix = "SpkrLeft";
   1055			#sound-dai-cells = <0>;
   1056		};
   1057
   1058		right_spkr: wsa8810-right{
   1059			compatible = "sdw10217201000";
   1060			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
   1061			reg = <0 2>;
   1062			#thermal-sensor-cells = <0>;
   1063			sound-name-prefix = "SpkrRight";
   1064			#sound-dai-cells = <0>;
   1065		};
   1066	};
   1067};
   1068
   1069&wifi {
   1070	status = "okay";
   1071
   1072	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
   1073	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
   1074	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
   1075	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
   1076
   1077	qcom,snoc-host-cap-8bit-quirk;
   1078	qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
   1079};
   1080
   1081/* PINCTRL - additions to nodes defined in sdm845.dtsi */
   1082&qup_spi2_default {
   1083	drive-strength = <16>;
   1084};
   1085
   1086&qup_uart3_default{
   1087	pinmux {
   1088		pins = "gpio41", "gpio42", "gpio43", "gpio44";
   1089		function = "qup3";
   1090	};
   1091};
   1092
   1093&qup_i2c10_default {
   1094	pinconf {
   1095		pins = "gpio55", "gpio56";
   1096		drive-strength = <2>;
   1097		bias-disable;
   1098	};
   1099};
   1100
   1101&qup_uart6_default {
   1102	pinmux {
   1103		pins = "gpio45", "gpio46", "gpio47", "gpio48";
   1104		function = "qup6";
   1105	};
   1106
   1107	cts {
   1108		pins = "gpio45";
   1109		bias-disable;
   1110	};
   1111
   1112	rts-tx {
   1113		pins = "gpio46", "gpio47";
   1114		drive-strength = <2>;
   1115		bias-disable;
   1116	};
   1117
   1118	rx {
   1119		pins = "gpio48";
   1120		bias-pull-up;
   1121	};
   1122};
   1123
   1124&qup_uart9_default {
   1125	pinconf-tx {
   1126		pins = "gpio4";
   1127		drive-strength = <2>;
   1128		bias-disable;
   1129	};
   1130
   1131	pinconf-rx {
   1132		pins = "gpio5";
   1133		drive-strength = <2>;
   1134		bias-pull-up;
   1135	};
   1136};
   1137
   1138&pm8998_gpio {
   1139
   1140};
   1141
   1142&cci {
   1143	status = "okay";
   1144};
   1145
   1146&camss {
   1147	vdda-supply = <&vreg_l1a_0p875>;
   1148
   1149	status = "ok";
   1150
   1151	ports {
   1152		#address-cells = <1>;
   1153		#size-cells = <0>;
   1154		port@0 {
   1155			reg = <0>;
   1156			csiphy0_ep: endpoint {
   1157				data-lanes = <0 1 2 3>;
   1158				remote-endpoint = <&ov8856_ep>;
   1159			};
   1160		};
   1161	};
   1162};
   1163
   1164&cci_i2c0 {
   1165	camera@10 {
   1166		compatible = "ovti,ov8856";
   1167		reg = <0x10>;
   1168
   1169		// CAM0_RST_N
   1170		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
   1171		pinctrl-names = "default";
   1172		pinctrl-0 = <&cam0_default>;
   1173		gpios = <&tlmm 13 0>,
   1174			<&tlmm 9 GPIO_ACTIVE_LOW>;
   1175
   1176		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
   1177		clock-names = "xvclk";
   1178		clock-frequency = <19200000>;
   1179
   1180		/* The &vreg_s4a_1p8 trace is powered on as a,
   1181		 * so it is represented by a fixed regulator.
   1182		 *
   1183		 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
   1184		 * both have to be enabled through the power management
   1185		 * gpios.
   1186		 */
   1187		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
   1188
   1189		dovdd-supply = <&vreg_lvs1a_1p8>;
   1190		avdd-supply = <&cam0_avdd_2v8>;
   1191		dvdd-supply = <&cam0_dvdd_1v2>;
   1192
   1193		status = "ok";
   1194
   1195		port {
   1196			ov8856_ep: endpoint {
   1197				link-frequencies = /bits/ 64
   1198					<360000000 180000000>;
   1199				data-lanes = <1 2 3 4>;
   1200				remote-endpoint = <&csiphy0_ep>;
   1201			};
   1202		};
   1203	};
   1204};
   1205
   1206&cci_i2c1 {
   1207	camera@60 {
   1208		compatible = "ovti,ov7251";
   1209
   1210		// I2C address as per ov7251.txt linux documentation
   1211		reg = <0x60>;
   1212
   1213		// CAM3_RST_N
   1214		enable-gpios = <&tlmm 21 0>;
   1215		pinctrl-names = "default";
   1216		pinctrl-0 = <&cam3_default>;
   1217		gpios = <&tlmm 16 0>,
   1218			<&tlmm 21 0>;
   1219
   1220		clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
   1221		clock-names = "xclk";
   1222		clock-frequency = <24000000>;
   1223
   1224		/* The &vreg_s4a_1p8 trace always powered on.
   1225		 *
   1226		 * The 2.8V vdda-supply regulator is enabled when the
   1227		 * vreg_s4a_1p8 trace is pulled high.
   1228		 * It too is represented by a fixed regulator.
   1229		 *
   1230		 * No 1.2V vddd-supply regulator is used.
   1231		 */
   1232		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
   1233
   1234		vdddo-supply = <&vreg_lvs1a_1p8>;
   1235		vdda-supply = <&cam3_avdd_2v8>;
   1236
   1237		status = "disable";
   1238
   1239		port {
   1240			ov7251_ep: endpoint {
   1241				data-lanes = <0 1>;
   1242//				remote-endpoint = <&csiphy3_ep>;
   1243			};
   1244		};
   1245	};
   1246};
   1247
   1248/* PINCTRL - additions to nodes defined in sdm845.dtsi */
   1249&qup_spi0_default {
   1250	config {
   1251		drive-strength = <6>;
   1252		bias-disable;
   1253	};
   1254};