cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sdm850-samsung-w737.dts (14312B)


      1// SPDX-License-Identifier: BSD-3-Clause
      2/*
      3 * Samsung Galaxy Book2
      4 *
      5 * Copyright (c) 2022, Xilin Wu <strongtz@yeah.net>
      6 */
      7
      8/dts-v1/;
      9
     10#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
     11#include <dt-bindings/input/gpio-keys.h>
     12#include <dt-bindings/input/input.h>
     13#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
     14#include <dt-bindings/sound/qcom,q6afe.h>
     15#include <dt-bindings/sound/qcom,q6asm.h>
     16#include "sdm850.dtsi"
     17#include "pm8998.dtsi"
     18
     19/*
     20 * Update following upstream (sdm845.dtsi) reserved
     21 * memory mappings for firmware loading to succeed
     22 */
     23/delete-node/ &qseecom_mem;
     24/delete-node/ &wlan_msa_mem;
     25/delete-node/ &slpi_mem;
     26/delete-node/ &ipa_fw_mem;
     27/delete-node/ &ipa_gsi_mem;
     28/delete-node/ &gpu_mem;
     29/delete-node/ &mpss_region;
     30/delete-node/ &adsp_mem;
     31/delete-node/ &cdsp_mem;
     32/delete-node/ &venus_mem;
     33/delete-node/ &mba_region;
     34/delete-node/ &spss_mem;
     35
     36/ {
     37	model = "Samsung Galaxy Book2";
     38	compatible = "samsung,w737", "qcom,sdm845";
     39	chassis-type = "convertible";
     40
     41	chosen {
     42		#address-cells = <2>;
     43		#size-cells = <2>;
     44		ranges;
     45
     46		// Firmware initialized the display at 1280p instead of 1440p
     47		framebuffer0: framebuffer@80400000 {
     48			compatible = "simple-framebuffer";
     49			reg = <0 0x80400000 0 (1920 * 1280 * 4)>;
     50			width = <1920>;
     51			height = <1280>;
     52			stride = <(1920 * 4)>;
     53			format = "a8r8g8b8";
     54		};
     55	};
     56
     57	aliases {
     58		hsuart0 = &uart6;
     59	};
     60
     61	/* Reserved memory changes */
     62	reserved-memory {
     63		/* Bootloader display framebuffer region */
     64		cont_splash_mem: memory@80400000 {
     65			reg = <0x0 0x80400000 0x0 0x960000>;
     66			no-map;
     67		};
     68
     69		qseecom_mem: memory@8b500000 {
     70			reg = <0 0x8b500000 0 0xa00000>;
     71			no-map;
     72		};
     73
     74		wlan_msa_mem: memory@8c400000 {
     75			reg = <0 0x8c400000 0 0x100000>;
     76			no-map;
     77		};
     78
     79		slpi_mem: memory@8c500000 {
     80			reg = <0 0x8c500000 0 0x1200000>;
     81			no-map;
     82		};
     83
     84		ipa_fw_mem: memory@8d700000 {
     85			reg = <0 0x8d700000 0 0x100000>;
     86			no-map;
     87		};
     88
     89		gpu_mem: memory@8d800000 {
     90			reg = <0 0x8d800000 0 0x5000>;
     91			no-map;
     92		};
     93
     94		mpss_region: memory@8e000000 {
     95			reg = <0 0x8e000000 0 0x8000000>;
     96			no-map;
     97		};
     98
     99		adsp_mem: memory@96000000 {
    100			reg = <0 0x96000000 0 0x2000000>;
    101			no-map;
    102		};
    103
    104		cdsp_mem: memory@98000000 {
    105			reg = <0 0x98000000 0 0x800000>;
    106			no-map;
    107		};
    108
    109		venus_mem: memory@98800000 {
    110			reg = <0 0x98800000 0 0x500000>;
    111			no-map;
    112		};
    113
    114		mba_region: memory@98d00000 {
    115			reg = <0 0x98d00000 0 0x200000>;
    116			no-map;
    117		};
    118
    119		spss_mem: memory@98f00000 {
    120			reg = <0 0x98f00000 0 0x100000>;
    121			no-map;
    122		};
    123	};
    124};
    125
    126&adsp_pas {
    127	firmware-name = "qcom/samsung/w737/qcadsp850.mbn";
    128	status = "okay";
    129};
    130
    131&apps_rsc {
    132	pm8998-rpmh-regulators {
    133		compatible = "qcom,pm8998-rpmh-regulators";
    134		qcom,pmic-id = "a";
    135
    136		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
    137		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
    138
    139		vreg_s2a_1p125: smps2 {
    140		};
    141
    142		vreg_s3a_1p35: smps3 {
    143			regulator-min-microvolt = <1352000>;
    144			regulator-max-microvolt = <1352000>;
    145			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    146		};
    147
    148		vreg_s4a_1p8: smps4 {
    149			regulator-min-microvolt = <1800000>;
    150			regulator-max-microvolt = <1800000>;
    151			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    152		};
    153
    154		vreg_s5a_2p04: smps5 {
    155			regulator-min-microvolt = <2040000>;
    156			regulator-max-microvolt = <2040000>;
    157			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    158		};
    159
    160		vreg_s7a_1p025: smps7 {
    161		};
    162
    163		vdd_qusb_hs0:
    164		vdda_hp_pcie_core:
    165		vdda_mipi_csi0_0p9:
    166		vdda_mipi_csi1_0p9:
    167		vdda_mipi_csi2_0p9:
    168		vdda_mipi_dsi0_pll:
    169		vdda_mipi_dsi1_pll:
    170		vdda_qlink_lv:
    171		vdda_qlink_lv_ck:
    172		vdda_qrefs_0p875:
    173		vdda_pcie_core:
    174		vdda_pll_cc_ebi01:
    175		vdda_pll_cc_ebi23:
    176		vdda_sp_sensor:
    177		vdda_ufs1_core:
    178		vdda_ufs2_core:
    179		vdda_usb1_ss_core:
    180		vdda_usb2_ss_core:
    181		vreg_l1a_0p875: ldo1 {
    182			regulator-min-microvolt = <880000>;
    183			regulator-max-microvolt = <880000>;
    184			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    185		};
    186
    187		vddpx_10:
    188		vreg_l2a_1p2: ldo2 {
    189			regulator-min-microvolt = <1200000>;
    190			regulator-max-microvolt = <1200000>;
    191			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    192			regulator-always-on;
    193		};
    194
    195		vreg_l3a_1p0: ldo3 {
    196		};
    197
    198		vdd_wcss_cx:
    199		vdd_wcss_mx:
    200		vdda_wcss_pll:
    201		vreg_l5a_0p8: ldo5 {
    202			regulator-min-microvolt = <800000>;
    203			regulator-max-microvolt = <800000>;
    204			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    205		};
    206
    207		vddpx_13:
    208		vreg_l6a_1p8: ldo6 {
    209			regulator-min-microvolt = <1800000>;
    210			regulator-max-microvolt = <1800000>;
    211			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    212		};
    213
    214		vreg_l7a_1p8: ldo7 {
    215			regulator-min-microvolt = <1800000>;
    216			regulator-max-microvolt = <1800000>;
    217			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    218		};
    219
    220		vreg_l8a_1p2: ldo8 {
    221		};
    222
    223		vreg_l9a_1p8: ldo9 {
    224		};
    225
    226		vreg_l10a_1p8: ldo10 {
    227		};
    228
    229		vreg_l11a_1p0: ldo11 {
    230		};
    231
    232		vdd_qfprom:
    233		vdd_qfprom_sp:
    234		vdda_apc1_cs_1p8:
    235		vdda_gfx_cs_1p8:
    236		vdda_qrefs_1p8:
    237		vdda_qusb_hs0_1p8:
    238		vddpx_11:
    239		vreg_l12a_1p8: ldo12 {
    240			regulator-min-microvolt = <1800000>;
    241			regulator-max-microvolt = <1800000>;
    242			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    243		};
    244
    245		vddpx_2:
    246		vreg_l13a_2p95: ldo13 {
    247		};
    248
    249		vreg_l14a_1p88: ldo14 {
    250			regulator-min-microvolt = <1880000>;
    251			regulator-max-microvolt = <1880000>;
    252			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    253			regulator-always-on;
    254		};
    255
    256		vreg_l15a_1p8: ldo15 {
    257		};
    258
    259		vreg_l16a_2p7: ldo16 {
    260		};
    261
    262		vreg_l17a_1p3: ldo17 {
    263			regulator-min-microvolt = <1304000>;
    264			regulator-max-microvolt = <1304000>;
    265			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    266		};
    267
    268		vreg_l18a_1p8: ldo18 {
    269		};
    270
    271		vreg_l19a_3p0: ldo19 {
    272			regulator-min-microvolt = <3100000>;
    273			regulator-max-microvolt = <3108000>;
    274			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    275		};
    276
    277		vreg_l20a_2p95: ldo20 {
    278			regulator-min-microvolt = <2960000>;
    279			regulator-max-microvolt = <2960000>;
    280			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    281		};
    282
    283		vreg_l21a_2p95: ldo21 {
    284		};
    285
    286		vreg_l22a_2p85: ldo22 {
    287		};
    288
    289		vreg_l23a_3p3: ldo23 {
    290			regulator-min-microvolt = <3300000>;
    291			regulator-max-microvolt = <3312000>;
    292			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    293		};
    294
    295		vdda_qusb_hs0_3p1:
    296		vreg_l24a_3p075: ldo24 {
    297			regulator-min-microvolt = <3075000>;
    298			regulator-max-microvolt = <3083000>;
    299			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    300		};
    301
    302		vreg_l25a_3p3: ldo25 {
    303			regulator-min-microvolt = <3104000>;
    304			regulator-max-microvolt = <3112000>;
    305			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    306		};
    307
    308		vdda_hp_pcie_1p2:
    309		vdda_hv_ebi0:
    310		vdda_hv_ebi1:
    311		vdda_hv_ebi2:
    312		vdda_hv_ebi3:
    313		vdda_mipi_csi_1p25:
    314		vdda_mipi_dsi0_1p2:
    315		vdda_mipi_dsi1_1p2:
    316		vdda_pcie_1p2:
    317		vdda_ufs1_1p2:
    318		vdda_ufs2_1p2:
    319		vdda_usb1_ss_1p2:
    320		vdda_usb2_ss_1p2:
    321		vreg_l26a_1p2: ldo26 {
    322			regulator-min-microvolt = <1200000>;
    323			regulator-max-microvolt = <1208000>;
    324			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    325		};
    326
    327		vreg_l28a_3p0: ldo28 {
    328		};
    329
    330		vreg_lvs1a_1p8: lvs1 {
    331		};
    332
    333		vreg_lvs2a_1p8: lvs2 {
    334		};
    335	};
    336};
    337
    338&cdsp_pas {
    339	firmware-name = "qcom/samsung/w737/qccdsp850.mbn";
    340	status = "okay";
    341};
    342
    343&gcc {
    344	protected-clocks = <GCC_QSPI_CORE_CLK>,
    345			   <GCC_QSPI_CORE_CLK_SRC>,
    346			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
    347			   <GCC_LPASS_Q6_AXI_CLK>,
    348			   <GCC_LPASS_SWAY_CLK>;
    349};
    350
    351&i2c10 {
    352	status = "okay";
    353	clock-frequency = <400000>;
    354
    355	/* SN65DSI86 @ 0x2c */
    356	/* The panel requires dual DSI, which is not supported by the bridge driver */
    357};
    358
    359&i2c11 {
    360	status = "okay";
    361	clock-frequency = <400000>;
    362
    363	/* HID-I2C Touchscreen @ 0x20 */
    364};
    365
    366&i2c15 {
    367	status = "okay";
    368	clock-frequency = <400000>;
    369
    370	digitizer@9 {
    371		compatible = "wacom,w9013", "hid-over-i2c";
    372		reg = <0x9>;
    373		pinctrl-names = "default";
    374		pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
    375
    376		post-power-on-delay-ms = <120>;
    377
    378		interrupt-parent = <&tlmm>;
    379		interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
    380
    381		hid-descr-addr = <0x1>;
    382	};
    383};
    384
    385&ipa {
    386	status = "okay";
    387	memory-region = <&ipa_fw_mem>;
    388	firmware-name = "qcom/samsung/w737/ipa_fws.elf";
    389};
    390
    391/* No idea why it causes an SError when enabled */
    392&llcc {
    393	status = "disabled";
    394};
    395
    396&mss_pil {
    397	status = "okay";
    398	firmware-name = "qcom/samsung/w737/qcdsp1v2850.mbn", "qcom/samsung/w737/qcdsp2850.mbn";
    399};
    400
    401&qup_i2c10_default {
    402	pinconf {
    403		pins = "gpio55", "gpio56";
    404		drive-strength = <2>;
    405		bias-disable;
    406	};
    407};
    408
    409&qup_i2c11_default {
    410	pinconf {
    411		pins = "gpio31", "gpio32";
    412		drive-strength = <2>;
    413		bias-disable;
    414	};
    415};
    416
    417&qup_i2c12_default {
    418	drive-strength = <2>;
    419	bias-disable;
    420};
    421
    422&qup_uart6_default {
    423	pinmux {
    424		 pins = "gpio45", "gpio46", "gpio47", "gpio48";
    425		 function = "qup6";
    426	};
    427
    428	cts {
    429		pins = "gpio45";
    430		bias-pull-down;
    431	};
    432
    433	rts-tx {
    434		pins = "gpio46", "gpio47";
    435		drive-strength = <2>;
    436		bias-disable;
    437	};
    438
    439	rx {
    440		pins = "gpio48";
    441		bias-pull-up;
    442	};
    443};
    444
    445&qupv3_id_0 {
    446	status = "okay";
    447};
    448
    449&qupv3_id_1 {
    450	status = "okay";
    451};
    452
    453&q6asmdai {
    454	dai@0 {
    455		reg = <0>;
    456	};
    457
    458	dai@1 {
    459		reg = <1>;
    460	};
    461
    462	dai@2 {
    463		reg = <2>;
    464	};
    465};
    466
    467&sound {
    468	compatible = "qcom,sdm845-sndcard";
    469	model = "Samsung-W737";
    470
    471	audio-routing =
    472		"RX_BIAS", "MCLK",
    473		"AMIC2", "MIC BIAS2",
    474		"SpkrLeft IN", "SPK1 OUT",
    475		"SpkrRight IN", "SPK2 OUT",
    476		"MM_DL1",  "MultiMedia1 Playback",
    477		"MM_DL3",  "MultiMedia3 Playback",
    478		"MultiMedia2 Capture", "MM_UL2";
    479
    480	mm1-dai-link {
    481		link-name = "MultiMedia1";
    482		cpu {
    483			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
    484		};
    485	};
    486
    487	mm2-dai-link {
    488		link-name = "MultiMedia2";
    489		cpu {
    490			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
    491		};
    492	};
    493
    494	mm3-dai-link {
    495		link-name = "MultiMedia3";
    496		cpu {
    497			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
    498		};
    499	};
    500
    501	slim-dai-link {
    502		link-name = "SLIM Playback";
    503		cpu {
    504			sound-dai = <&q6afedai SLIMBUS_0_RX>;
    505		};
    506
    507		platform {
    508			sound-dai = <&q6routing>;
    509		};
    510
    511		codec {
    512			sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
    513		};
    514	};
    515
    516	slimcap-dai-link {
    517		link-name = "SLIM Capture";
    518		cpu {
    519			sound-dai = <&q6afedai SLIMBUS_0_TX>;
    520		};
    521
    522		platform {
    523			sound-dai = <&q6routing>;
    524		};
    525
    526		codec {
    527			sound-dai = <&wcd9340 1>;
    528		};
    529	};
    530
    531	slim-wcd-dai-link {
    532		link-name = "SLIM WCD Playback";
    533		cpu {
    534			sound-dai = <&q6afedai SLIMBUS_1_RX>;
    535		};
    536
    537		platform {
    538			sound-dai = <&q6routing>;
    539		};
    540
    541		codec {
    542			sound-dai =  <&wcd9340 2>;
    543		};
    544	};
    545};
    546
    547&tlmm {
    548	gpio-reserved-ranges = <0 6>, <85 4>;
    549
    550	pen_irq_l: pen-irq-l {
    551		pinmux {
    552			pins = "gpio119";
    553			function = "gpio";
    554		};
    555
    556		pinconf {
    557			pins = "gpio119";
    558			bias-disable;
    559		};
    560	};
    561
    562	pen_pdct_l: pen-pdct-l {
    563		pinmux {
    564			pins = "gpio124";
    565			function = "gpio";
    566		};
    567
    568		pinconf {
    569			pins = "gpio124";
    570			bias-disable;
    571			drive-strength = <2>;
    572			output-high;
    573		};
    574	};
    575
    576	pen_rst_l: pen-rst-l {
    577		pinmux  {
    578			pins = "gpio21";
    579			function = "gpio";
    580		};
    581
    582		pinconf {
    583			pins = "gpio21";
    584			bias-disable;
    585			drive-strength = <2>;
    586
    587			/*
    588			 * The pen driver doesn't currently support
    589			 * driving this reset line.  By specifying
    590			 * output-high here we're relying on the fact
    591			 * that this pin has a default pulldown at boot
    592			 * (which makes sure the pen was in reset if it
    593			 * was powered) and then we set it high here to
    594			 * take it out of reset.  Better would be if the
    595			 * pen driver could control this and we could
    596			 * remove "output-high" here.
    597			 */
    598			output-high;
    599		};
    600	};
    601
    602	wcd_intr_default: wcd_intr_default {
    603		pins = "gpio54";
    604		function = "gpio";
    605
    606		input-enable;
    607		bias-pull-down;
    608		drive-strength = <2>;
    609	};
    610};
    611
    612&uart6 {
    613	status = "okay";
    614
    615	bluetooth {
    616		compatible = "qcom,wcn3990-bt";
    617
    618		vddio-supply = <&vreg_s4a_1p8>;
    619		vddxo-supply = <&vreg_l7a_1p8>;
    620		vddrf-supply = <&vreg_l17a_1p3>;
    621		vddch0-supply = <&vreg_l25a_3p3>;
    622		vddch1-supply = <&vreg_l23a_3p3>;
    623		max-speed = <3200000>;
    624	};
    625};
    626
    627&ufs_mem_hc {
    628	status = "okay";
    629
    630	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
    631
    632	vcc-supply = <&vreg_l20a_2p95>;
    633	vcc-max-microamp = <600000>;
    634};
    635
    636&ufs_mem_phy {
    637	status = "okay";
    638
    639	vdda-phy-supply = <&vdda_ufs1_core>;
    640	vdda-pll-supply = <&vdda_ufs1_1p2>;
    641};
    642
    643&usb_1 {
    644	status = "okay";
    645};
    646
    647&usb_1_dwc3 {
    648	dr_mode = "host";
    649};
    650
    651&usb_1_hsphy {
    652	status = "okay";
    653
    654	vdd-supply = <&vdda_usb1_ss_core>;
    655	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
    656	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
    657
    658	qcom,imp-res-offset-value = <8>;
    659	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
    660	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
    661	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
    662};
    663
    664&usb_1_qmpphy {
    665	status = "okay";
    666
    667	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
    668	vdda-pll-supply = <&vdda_usb1_ss_core>;
    669};
    670
    671&usb_2 {
    672	status = "okay";
    673};
    674
    675&usb_2_dwc3 {
    676	dr_mode = "host";
    677};
    678
    679&usb_2_hsphy {
    680	status = "okay";
    681
    682	vdd-supply = <&vdda_usb2_ss_core>;
    683	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
    684	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
    685
    686	qcom,imp-res-offset-value = <8>;
    687	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
    688};
    689
    690&usb_2_qmpphy {
    691	status = "okay";
    692
    693	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
    694	vdda-pll-supply = <&vdda_usb2_ss_core>;
    695};
    696
    697&venus {
    698	status = "okay";
    699	firmware-name = "qcom/samsung/w737/qcvss850.mbn";
    700};
    701
    702&wcd9340{
    703	pinctrl-0 = <&wcd_intr_default>;
    704	pinctrl-names = "default";
    705	clock-names = "extclk";
    706	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
    707	reset-gpios = <&tlmm 64 0>;
    708	vdd-buck-supply = <&vreg_s4a_1p8>;
    709	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
    710	vdd-tx-supply = <&vreg_s4a_1p8>;
    711	vdd-rx-supply = <&vreg_s4a_1p8>;
    712	vdd-io-supply = <&vreg_s4a_1p8>;
    713	qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
    714	qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
    715	qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
    716
    717	swm: swm@c85 {
    718		left_spkr: wsa8810-left{
    719			compatible = "sdw10217211000";
    720			reg = <0 3>;
    721			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
    722			#thermal-sensor-cells = <0>;
    723			sound-name-prefix = "SpkrLeft";
    724			#sound-dai-cells = <0>;
    725		};
    726
    727		right_spkr: wsa8810-right{
    728			compatible = "sdw10217211000";
    729			powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
    730			reg = <0 4>;
    731			#thermal-sensor-cells = <0>;
    732			sound-name-prefix = "SpkrRight";
    733			#sound-dai-cells = <0>;
    734		};
    735	};
    736};
    737
    738&wifi {
    739	status = "okay";
    740
    741	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
    742	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
    743	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
    744	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
    745	vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
    746
    747	qcom,snoc-host-cap-8bit-quirk;
    748};