cachepc-linux

beacon-renesom-som.dtsi (6442B)

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright 2020, Compass Electronics Group, LLC
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clk/versaclock.h>

/ {
	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x78000000>;
	};

	osc_32k: osc_32k {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
		clock-output-names = "osc_32k";
	};

	reg_1p8v: regulator0 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator1 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	wlan_pwrseq: wlan_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
		clocks = <&osc_32k>;
		clock-names = "ext_clock";
		post-power-on-delay-ms = <80>;
	};
};

&avb {
	pinctrl-0 = <&avb_pins>;
	pinctrl-names = "default";
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
	rx-internal-delay-ps = <1800>;
	tx-internal-delay-ps = <2000>;
	clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>;
	clock-names = "fck", "refclk";
	status = "okay";

	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id004d.d074",
			     "ethernet-phy-ieee802.3-c22";
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
	};
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&gpio6 {
	usb-hub-reset-hog {
		gpio-hog;
		gpios = <10 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "usb-hub-reset";
	};
};

&hscif0 {
	pinctrl-0 = <&hscif0_pins>;
	pinctrl-names = "default";
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
		host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
		clocks = <&osc_32k>;
		clock-names = "extclk";
		max-speed = <4000000>;
	};
};

&hscif2 {
	status = "okay";
	pinctrl-0 = <&hscif2_pins>;
	pinctrl-names = "default";
};

&i2c4 {
	status = "okay";
	clock-frequency = <100000>;

	pca9654: gpio@20 {
		compatible = "onnn,pca9654";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
			"i2c4_20_0",
			"wl_reg_on",
			"bt_reg_on",
			"i2c4_20_3",
			"i2c4_20_4",
			"bt_dev_wake",
			"i2c4_20_6",
			"i2c4_20_7";
	};

	pca9654_lte: gpio@21 {
		compatible = "onnn,pca9654";
		reg = <0x21>;
		interrupt-parent = <&gpio5>;
		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names =
			"i2c4_21_0",
			"zoe_pwr_on",
			"zoe_extint",
			"zoe_reset_n",
			"sara_reset",
			"i2c4_21_5",
			"sara_pwr_off",
			"sara_networking_status";
	};

	eeprom@50 {
		compatible = "microchip,24c64", "atmel,24c64";
		pagesize = <32>;
		read-only;	/* Manufacturing EEPROM programmed at factory */
		reg = <0x50>;
	};

	rtc@51 {
		compatible = "nxp,pcf85263";
		reg = <0x51>;
	};

	versaclock5: versaclock_som@6a {
		compatible = "idt,5p49v6965";
		reg = <0x6a>;
		#clock-cells = <1>;
		clocks = <&x304_clk>;
		clock-names = "xin";
		/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
		assigned-clocks = <&versaclock5 1>,
				   <&versaclock5 2>,
				   <&versaclock5 3>,
				   <&versaclock5 4>;

		assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;

		OUT1 {
			idt,mode = <VC5_CMOS>;
			idt,voltage-microvolt = <1800000>;
			idt,slew-percent = <100>;
		};

		OUT2 {
			idt,mode = <VC5_CMOS>;
			idt,voltage-microvolt = <1800000>;
			idt,slew-percent = <100>;
		};

		OUT3 {
			idt,mode = <VC5_CMOS>;
			idt,voltage-microvolt = <1800000>;
			idt,slew-percent = <100>;
		};

		OUT4 {
			idt,mode = <VC5_CMOS>;
			idt,voltage-microvolt = <3300000>;
			idt,slew-percent = <100>;
		};
	};
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	avb_pins: avb {
		mux {
			groups = "avb_link", "avb_mdio", "avb_mii";
			function = "avb";
		};

		pins_mdio {
			groups = "avb_mdio";
			drive-strength = <24>;
		};

		pins_mii_tx {
			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
			drive-strength = <12>;
		};
	};

	scif2_pins: scif2 {
		groups = "scif2_data_a";
		function = "scif2";
	};

	hscif0_pins: hscif0 {
		groups = "hscif0_data", "hscif0_ctrl";
		function = "hscif0";
	};

	hscif1_pins: hscif1 {
		groups = "hscif1_data_a", "hscif1_ctrl_a";
		function = "hscif1";
	};

	hscif2_pins: hscif2 {
		groups = "hscif2_data_a";
		function = "hscif2";
	};

	scif0_pins: scif0 {
		groups = "scif0_data";
		function = "scif0";
	};

	scif5_pins: scif5 {
		groups = "scif5_data_a";
		function = "scif5";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk_a";
		function = "scif_clk";
	};

	i2c0_pins: i2c0 {
		groups = "i2c0";
		function = "i2c0";
	};

	sdhi2_pins: sd2 {
		groups = "sdhi2_data4", "sdhi2_ctrl";
		function = "sdhi2";
		power-source = <1800>;
	};

	sdhi3_pins: sd3 {
		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
		function = "sdhi3";
		power-source = <1800>;
	};
};

&scif_clk {
	clock-frequency = <14745600>;
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sdhi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&sdhi2_pins>;
	bus-width = <4>;
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	non-removable;
	cap-power-off-card;
	keep-power-in-suspend;
	mmc-pwrseq = <&wlan_pwrseq>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	brcmf: bcrmf@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
		interrupt-parent = <&gpio1>;
		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "host-wake";
	};
};

&sdhi3 {
	pinctrl-0 = <&sdhi3_pins>;
	pinctrl-1 = <&sdhi3_pins>;
	pinctrl-names = "default", "state_uhs";
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	bus-width = <8>;
	mmc-hs200-1_8v;
	no-sd;
	no-sdio;
	non-removable;
	fixed-emmc-driver-type = <1>;
	status = "okay";
};

&usb2_clksel {
	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
		  <&versaclock5 3>, <&usb3s0_clk>;
	status = "okay";
};

&usb3s0_clk {
	clock-frequency = <100000000>;
};