cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r8a77960-ulcb.dts (852B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W
      4 *
      5 * Copyright (C) 2016 Renesas Electronics Corp.
      6 * Copyright (C) 2016 Cogent Embedded, Inc.
      7 */
      8
      9/dts-v1/;
     10#include "r8a77960.dtsi"
     11#include "ulcb.dtsi"
     12
     13/ {
     14	model = "Renesas M3ULCB board based on r8a77960";
     15	compatible = "renesas,m3ulcb", "renesas,r8a7796";
     16
     17	memory@48000000 {
     18		device_type = "memory";
     19		/* first 128MB is reserved for secure area. */
     20		reg = <0x0 0x48000000 0x0 0x38000000>;
     21	};
     22
     23	memory@600000000 {
     24		device_type = "memory";
     25		reg = <0x6 0x00000000 0x0 0x40000000>;
     26	};
     27};
     28
     29&du {
     30	clocks = <&cpg CPG_MOD 724>,
     31		 <&cpg CPG_MOD 723>,
     32		 <&cpg CPG_MOD 722>,
     33		 <&versaclock5 1>,
     34		 <&versaclock5 3>,
     35		 <&versaclock5 2>;
     36	clock-names = "du.0", "du.1", "du.2",
     37		      "dclkin.0", "dclkin.1", "dclkin.2";
     38};