cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

r8a779a0-falcon.dts (1652B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U
      4 *
      5 * Copyright (C) 2020 Renesas Electronics Corp.
      6 */
      7
      8/dts-v1/;
      9#include "r8a779a0-falcon-cpu.dtsi"
     10#include "r8a779a0-falcon-csi-dsi.dtsi"
     11#include "r8a779a0-falcon-ethernet.dtsi"
     12
     13/ {
     14	model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
     15	compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
     16
     17	aliases {
     18		ethernet0 = &avb0;
     19	};
     20};
     21
     22&avb0 {
     23	pinctrl-0 = <&avb0_pins>;
     24	pinctrl-names = "default";
     25	phy-handle = <&phy0>;
     26	tx-internal-delay-ps = <2000>;
     27	status = "okay";
     28
     29	phy0: ethernet-phy@0 {
     30		compatible = "ethernet-phy-id0022.1622",
     31			     "ethernet-phy-ieee802.3-c22";
     32		rxc-skew-ps = <1500>;
     33		reg = <0>;
     34		interrupt-parent = <&gpio4>;
     35		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
     36		reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
     37	};
     38};
     39
     40&canfd {
     41	pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>;
     42	pinctrl-names = "default";
     43	status = "okay";
     44
     45	channel0 {
     46		status = "okay";
     47	};
     48
     49	channel1 {
     50		status = "okay";
     51	};
     52};
     53
     54&i2c0 {
     55	eeprom@51 {
     56		compatible = "rohm,br24g01", "atmel,24c01";
     57		label = "breakout-board";
     58		reg = <0x51>;
     59		pagesize = <8>;
     60	};
     61};
     62
     63&pfc {
     64	avb0_pins: avb0 {
     65		mux {
     66			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
     67				 "avb0_txcrefclk";
     68			function = "avb0";
     69		};
     70
     71		pins_mdio {
     72			groups = "avb0_mdio";
     73			drive-strength = <21>;
     74		};
     75
     76		pins_mii {
     77			groups = "avb0_rgmii";
     78			drive-strength = <21>;
     79		};
     80
     81	};
     82
     83	canfd0_pins: canfd0 {
     84		groups = "canfd0_data";
     85		function = "canfd0";
     86	};
     87
     88	canfd1_pins: canfd1 {
     89		groups = "canfd1_data";
     90		function = "canfd1";
     91	};
     92};