cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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salvator-xs.dtsi (1747B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the Salvator-X 2nd version board
      4 *
      5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
      6 */
      7
      8#include "salvator-common.dtsi"
      9
     10/ {
     11	model = "Renesas Salvator-X 2nd version board";
     12	compatible = "renesas,salvator-xs";
     13};
     14
     15&extal_clk {
     16	clock-frequency = <16640000>;
     17};
     18
     19&i2c4 {
     20	clock-frequency = <400000>;
     21
     22	versaclock6: clock-generator@6a {
     23		compatible = "idt,5p49v6901";
     24		reg = <0x6a>;
     25		#clock-cells = <1>;
     26		clocks = <&x23_clk>;
     27		clock-names = "xin";
     28	};
     29};
     30
     31#ifdef SOC_HAS_SATA
     32&pca9654 {
     33	pcie-sata-switch-hog {
     34		gpio-hog;
     35		gpios = <7 GPIO_ACTIVE_HIGH>;
     36		output-low; /* enable SATA by default */
     37		line-name = "PCIE/SATA switch";
     38	};
     39};
     40
     41/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
     42#endif /* SOC_HAS_SATA */
     43
     44#ifdef SOC_HAS_USB2_CH3
     45&ehci3 {
     46	dr_mode = "otg";
     47	status = "okay";
     48};
     49
     50&hsusb3 {
     51	dr_mode = "otg";
     52	status = "okay";
     53};
     54
     55&ohci3 {
     56	dr_mode = "otg";
     57	status = "okay";
     58};
     59
     60&pfc {
     61	/*
     62	 * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
     63	 *   (when SW31 is the default setting on Salvator-XS).
     64	 * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
     65	 *   r8a77951 with Salvator-XS.
     66	 *   Hence the SW31 setting must be changed like 2) below.
     67	 *   1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
     68	 *	- Connect GP6_3[01] to ADV7842.
     69	 *   2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
     70	 *	- Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
     71	 *	- Connect GP6_{04,21} to ADV7842.
     72	 */
     73	usb2_ch3_pins: usb2_ch3 {
     74		groups = "usb2_ch3";
     75		function = "usb2_ch3";
     76	};
     77};
     78
     79&usb2_phy3 {
     80	pinctrl-0 = <&usb2_ch3_pins>;
     81	pinctrl-names = "default";
     82
     83	status = "okay";
     84};
     85#endif /* SOC_HAS_USB2_CH3 */