cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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px30-engicam-px30-core.dtsi (5013B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
      4 * Copyright (c) 2020 Engicam srl
      5 * Copyright (c) 2020 Amarula Solutons
      6 * Copyright (c) 2020 Amarula Solutons(India)
      7 */
      8
      9#include <dt-bindings/gpio/gpio.h>
     10#include <dt-bindings/pinctrl/rockchip.h>
     11
     12/ {
     13	compatible = "engicam,px30-core", "rockchip,px30";
     14
     15	aliases {
     16		mmc0 = &emmc;
     17	};
     18};
     19
     20&cpu0 {
     21	cpu-supply = <&vdd_arm>;
     22};
     23
     24&cpu1 {
     25	cpu-supply = <&vdd_arm>;
     26};
     27
     28&cpu2 {
     29	cpu-supply = <&vdd_arm>;
     30};
     31
     32&cpu3 {
     33	cpu-supply = <&vdd_arm>;
     34};
     35
     36&emmc {
     37	cap-mmc-highspeed;
     38	mmc-hs200-1_8v;
     39	non-removable;
     40	status = "okay";
     41};
     42
     43&i2c0 {
     44	status = "okay";
     45
     46	rk809: pmic@20 {
     47		compatible = "rockchip,rk809";
     48		reg = <0x20>;
     49		interrupt-parent = <&gpio0>;
     50		interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
     51		pinctrl-names = "default";
     52		pinctrl-0 = <&pmic_int>;
     53		rockchip,system-power-controller;
     54		wakeup-source;
     55		#clock-cells = <1>;
     56		clock-output-names = "rk808-clkout1", "rk808-clkout2";
     57
     58		vcc1-supply = <&vcc5v0_sys>;
     59		vcc2-supply = <&vcc5v0_sys>;
     60		vcc3-supply = <&vcc5v0_sys>;
     61		vcc4-supply = <&vcc5v0_sys>;
     62		vcc5-supply = <&vcc3v3_sys>;
     63		vcc6-supply = <&vcc3v3_sys>;
     64		vcc7-supply = <&vcc3v3_sys>;
     65		vcc8-supply = <&vcc3v3_sys>;
     66		vcc9-supply = <&vcc5v0_sys>;
     67
     68		regulators {
     69			vdd_log: DCDC_REG1 {
     70				regulator-name = "vdd_log";
     71				regulator-always-on;
     72				regulator-boot-on;
     73				regulator-min-microvolt = <950000>;
     74				regulator-max-microvolt = <1350000>;
     75				regulator-ramp-delay = <6001>;
     76
     77				regulator-state-mem {
     78					regulator-on-in-suspend;
     79					regulator-suspend-microvolt = <950000>;
     80				};
     81			};
     82
     83			vdd_arm: DCDC_REG2 {
     84				regulator-name = "vdd_arm";
     85				regulator-always-on;
     86				regulator-boot-on;
     87				regulator-min-microvolt = <950000>;
     88				regulator-max-microvolt = <1350000>;
     89				regulator-ramp-delay = <6001>;
     90
     91				regulator-state-mem {
     92					regulator-off-in-suspend;
     93					regulator-suspend-microvolt = <950000>;
     94				};
     95			};
     96
     97			vcc_ddr: DCDC_REG3 {
     98				regulator-name = "vcc_ddr";
     99				regulator-always-on;
    100				regulator-boot-on;
    101
    102				regulator-state-mem {
    103					regulator-on-in-suspend;
    104				};
    105			};
    106
    107			vcc_3v3: DCDC_REG4 {
    108				regulator-name = "vcc_3v3";
    109				regulator-always-on;
    110				regulator-boot-on;
    111				regulator-min-microvolt = <3300000>;
    112				regulator-max-microvolt = <3300000>;
    113
    114				regulator-state-mem {
    115					regulator-on-in-suspend;
    116					regulator-suspend-microvolt = <3300000>;
    117				};
    118			};
    119
    120			vcc3v3_sys: DCDC_REG5 {
    121				regulator-name = "vcc3v3_sys";
    122				regulator-always-on;
    123				regulator-boot-on;
    124				regulator-min-microvolt = <3300000>;
    125				regulator-max-microvolt = <3300000>;
    126
    127				regulator-state-mem {
    128					regulator-on-in-suspend;
    129					regulator-suspend-microvolt = <3300000>;
    130				};
    131			};
    132
    133			vcc_1v0: LDO_REG1 {
    134				regulator-name = "vcc_1v0";
    135				regulator-always-on;
    136				regulator-boot-on;
    137				regulator-min-microvolt = <1000000>;
    138				regulator-max-microvolt = <1000000>;
    139
    140				regulator-state-mem {
    141					regulator-on-in-suspend;
    142					regulator-suspend-microvolt = <1000000>;
    143				};
    144			};
    145
    146			vcc_1v8: LDO_REG2 {
    147				regulator-name = "vcc_1v8";
    148				regulator-always-on;
    149				regulator-boot-on;
    150				regulator-min-microvolt = <1800000>;
    151				regulator-max-microvolt = <1800000>;
    152
    153				regulator-state-mem {
    154					regulator-on-in-suspend;
    155					regulator-suspend-microvolt = <1800000>;
    156				};
    157			};
    158
    159			vdd_1v0: LDO_REG3 {
    160				regulator-name = "vdd_1v0";
    161				regulator-always-on;
    162				regulator-boot-on;
    163				regulator-min-microvolt = <1000000>;
    164				regulator-max-microvolt = <1000000>;
    165
    166				regulator-state-mem {
    167					regulator-on-in-suspend;
    168					regulator-suspend-microvolt = <1000000>;
    169				};
    170			};
    171
    172			vcc3v0_pmu: LDO_REG4 {
    173				regulator-name = "vcc3v0_pmu";
    174				regulator-always-on;
    175				regulator-boot-on;
    176				regulator-min-microvolt = <3300000>;
    177				regulator-max-microvolt = <3300000>;
    178
    179				regulator-state-mem {
    180					regulator-on-in-suspend;
    181					regulator-suspend-microvolt = <3300000>;
    182
    183				};
    184			};
    185
    186			vccio_sd: LDO_REG5 {
    187				regulator-name = "vccio_sd";
    188				regulator-always-on;
    189				regulator-boot-on;
    190				regulator-min-microvolt = <1800000>;
    191				regulator-max-microvolt = <3300000>;
    192
    193				regulator-state-mem {
    194					regulator-on-in-suspend;
    195					regulator-suspend-microvolt = <3300000>;
    196				};
    197			};
    198
    199			vcc3v3_lcd: SWITCH_REG1 {
    200				regulator-boot-on;
    201				regulator-name = "vcc3v3_lcd";
    202			};
    203
    204			vcc5v0_host: SWITCH_REG2 {
    205				regulator-name = "vcc5v0_host";
    206				regulator-always-on;
    207				regulator-boot-on;
    208			};
    209		};
    210	};
    211};
    212
    213&io_domains {
    214	vccio1-supply = <&vcc_3v3>;
    215	vccio2-supply = <&vcc_3v3>;
    216	vccio3-supply = <&vcc_3v3>;
    217	vccio4-supply = <&vcc_3v3>;
    218	vccio5-supply = <&vcc_3v3>;
    219	vccio6-supply = <&vcc_1v8>;
    220	status = "okay";
    221};
    222
    223&pinctrl {
    224	pmic {
    225		pmic_int: pmic_int {
    226			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
    227		};
    228	};
    229};
    230
    231&pmu_io_domains {
    232	pmuio1-supply = <&vcc_3v3>;
    233	pmuio2-supply = <&vcc_3v3>;
    234	status = "okay";
    235};
    236
    237&tsadc {
    238	rockchip,hw-tshut-mode = <1>;
    239	rockchip,hw-tshut-polarity = <1>;
    240	status = "okay";
    241};