cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rk3399-gru-kevin.dts (7452B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google Gru-Kevin Rev 6+ board device tree source
      4 *
      5 * Copyright 2016-2017 Google, Inc
      6 */
      7
      8/dts-v1/;
      9#include "rk3399-gru-chromebook.dtsi"
     10#include <dt-bindings/input/linux-event-codes.h>
     11
     12/*
     13 * Kevin-specific things
     14 *
     15 * Things in this section should use names from Kevin schematic since no
     16 * equivalent exists in Gru schematic.  If referring to signals that exist
     17 * in Gru we use the Gru names, though.  Confusing enough for you?
     18 */
     19/ {
     20	model = "Google Kevin";
     21	compatible = "google,kevin-rev15", "google,kevin-rev14",
     22		     "google,kevin-rev13", "google,kevin-rev12",
     23		     "google,kevin-rev11", "google,kevin-rev10",
     24		     "google,kevin-rev9", "google,kevin-rev8",
     25		     "google,kevin-rev7", "google,kevin-rev6",
     26		     "google,kevin", "google,gru", "rockchip,rk3399";
     27	chassis-type = "convertible";
     28
     29	/* Power tree */
     30
     31	p3_3v_dig: p3-3v-dig {
     32		compatible = "regulator-fixed";
     33		regulator-name = "p3.3v_dig";
     34		pinctrl-names = "default";
     35		pinctrl-0 = <&cpu3_pen_pwr_en>;
     36
     37		enable-active-high;
     38		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
     39		vin-supply = <&pp3300>;
     40	};
     41
     42	edp_panel: edp-panel {
     43		compatible = "sharp,lq123p1jx31";
     44		backlight = <&backlight>;
     45		power-supply = <&pp3300_disp>;
     46
     47		panel-timing {
     48			clock-frequency = <266666667>;
     49			hactive = <2400>;
     50			hfront-porch = <48>;
     51			hback-porch = <84>;
     52			hsync-len = <32>;
     53			hsync-active = <0>;
     54			vactive = <1600>;
     55			vfront-porch = <3>;
     56			vback-porch = <120>;
     57			vsync-len = <10>;
     58			vsync-active = <0>;
     59		};
     60
     61		port {
     62			panel_in_edp: endpoint {
     63				remote-endpoint = <&edp_out_panel>;
     64			};
     65		};
     66	};
     67
     68	thermistor_ppvar_bigcpu: thermistor-ppvar-bigcpu {
     69		compatible = "murata,ncp15wb473";
     70		pullup-uv = <1800000>;
     71		pullup-ohm = <25500>;
     72		pulldown-ohm = <0>;
     73		io-channels = <&saradc 2>;
     74		#thermal-sensor-cells = <0>;
     75	};
     76
     77	thermistor_ppvar_litcpu: thermistor-ppvar-litcpu {
     78		compatible = "murata,ncp15wb473";
     79		pullup-uv = <1800000>;
     80		pullup-ohm = <25500>;
     81		pulldown-ohm = <0>;
     82		io-channels = <&saradc 3>;
     83		#thermal-sensor-cells = <0>;
     84	};
     85};
     86
     87&backlight {
     88	pwms = <&cros_ec_pwm 1>;
     89};
     90
     91&gpio_keys {
     92	pinctrl-names = "default";
     93	pinctrl-0 = <&bt_host_wake_l>, <&cpu1_pen_eject>;
     94
     95	pen-insert {
     96		label = "Pen Insert";
     97		/* Insert = low, eject = high */
     98		gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
     99		linux,code = <SW_PEN_INSERTED>;
    100		linux,input-type = <EV_SW>;
    101		wakeup-source;
    102	};
    103};
    104
    105&thermal_zones {
    106	bigcpu_reg_thermal: bigcpu-reg-thermal {
    107		polling-delay-passive = <100>; /* milliseconds */
    108		polling-delay = <1000>; /* milliseconds */
    109		thermal-sensors = <&thermistor_ppvar_bigcpu 0>;
    110		sustainable-power = <4000>;
    111
    112		ppvar_bigcpu_trips: trips {
    113			ppvar_bigcpu_on: ppvar-bigcpu-on {
    114				temperature = <40000>;	/* millicelsius */
    115				hysteresis = <2000>;	/* millicelsius */
    116				type = "passive";
    117			};
    118
    119			ppvar_bigcpu_alert: ppvar-bigcpu-alert {
    120				temperature = <50000>;	/* millicelsius */
    121				hysteresis = <2000>;	/* millicelsius */
    122				type = "passive";
    123			};
    124
    125			ppvar_bigcpu_crit: ppvar-bigcpu-crit {
    126				temperature = <90000>;	/* millicelsius */
    127				hysteresis = <0>;	/* millicelsius */
    128				type = "critical";
    129			};
    130		};
    131
    132		cooling-maps {
    133			map0 {
    134				trip = <&ppvar_bigcpu_alert>;
    135				cooling-device =
    136					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    137					<&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    138					<&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    139					<&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    140				contribution = <4096>;
    141			};
    142			map1 {
    143				trip = <&ppvar_bigcpu_alert>;
    144				cooling-device =
    145					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    146					<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    147				contribution = <1024>;
    148			};
    149		};
    150	};
    151
    152	litcpu_reg_thermal: litcpu-reg-thermal {
    153		polling-delay-passive = <100>; /* milliseconds */
    154		polling-delay = <1000>; /* milliseconds */
    155		thermal-sensors = <&thermistor_ppvar_litcpu 0>;
    156		sustainable-power = <4000>;
    157
    158		ppvar_litcpu_trips: trips {
    159			ppvar_litcpu_on: ppvar-litcpu-on {
    160				temperature = <40000>;	/* millicelsius */
    161				hysteresis = <2000>;	/* millicelsius */
    162				type = "passive";
    163			};
    164
    165			ppvar_litcpu_alert: ppvar-litcpu-alert {
    166				temperature = <50000>;	/* millicelsius */
    167				hysteresis = <2000>;	/* millicelsius */
    168				type = "passive";
    169			};
    170
    171			ppvar_litcpu_crit: ppvar-litcpu-crit {
    172				temperature = <90000>;	/* millicelsius */
    173				hysteresis = <0>;	/* millicelsius */
    174				type = "critical";
    175			};
    176		};
    177	};
    178};
    179
    180ap_i2c_tpm: &i2c0 {
    181	status = "okay";
    182
    183	clock-frequency = <400000>;
    184
    185	/* These are relatively safe rise/fall times. */
    186	i2c-scl-falling-time-ns = <50>;
    187	i2c-scl-rising-time-ns = <300>;
    188
    189	tpm: tpm@20 {
    190		compatible = "infineon,slb9645tt";
    191		reg = <0x20>;
    192		powered-while-suspended;
    193	};
    194};
    195
    196ap_i2c_dig: &i2c2 {
    197	status = "okay";
    198
    199	clock-frequency = <400000>;
    200
    201	/* These are relatively safe rise/fall times. */
    202	i2c-scl-falling-time-ns = <50>;
    203	i2c-scl-rising-time-ns = <300>;
    204
    205	digitizer: digitizer@9 {
    206		/* wacom,w9013 */
    207		compatible = "hid-over-i2c";
    208		reg = <0x9>;
    209		pinctrl-names = "default";
    210		pinctrl-0 = <&cpu1_dig_irq_l &cpu1_dig_pdct_l>;
    211
    212		vdd-supply = <&p3_3v_dig>;
    213		post-power-on-delay-ms = <100>;
    214
    215		interrupt-parent = <&gpio2>;
    216		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
    217
    218		hid-descr-addr = <0x1>;
    219	};
    220};
    221
    222/* Adjustments to things in the gru baseboard */
    223
    224&ap_i2c_tp {
    225	trackpad@4a {
    226		compatible = "atmel,maxtouch";
    227		reg = <0x4a>;
    228		pinctrl-names = "default";
    229		pinctrl-0 = <&trackpad_int_l>;
    230		interrupt-parent = <&gpio1>;
    231		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
    232		linux,gpio-keymap = <KEY_RESERVED
    233				     KEY_RESERVED
    234				     KEY_RESERVED
    235				     BTN_LEFT>;
    236		wakeup-source;
    237	};
    238};
    239
    240&ap_i2c_ts {
    241	touchscreen@4b {
    242		compatible = "atmel,maxtouch";
    243		reg = <0x4b>;
    244		pinctrl-names = "default";
    245		pinctrl-0 = <&touch_int_l>;
    246		interrupt-parent = <&gpio3>;
    247		interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
    248	};
    249};
    250
    251&ppvar_bigcpu_pwm {
    252	regulator-min-microvolt = <798674>;
    253	regulator-max-microvolt = <1302172>;
    254};
    255
    256&ppvar_bigcpu {
    257	regulator-min-microvolt = <798674>;
    258	regulator-max-microvolt = <1302172>;
    259	ctrl-voltage-range = <798674 1302172>;
    260};
    261
    262&ppvar_litcpu_pwm {
    263	regulator-min-microvolt = <799065>;
    264	regulator-max-microvolt = <1303738>;
    265};
    266
    267&ppvar_litcpu {
    268	regulator-min-microvolt = <799065>;
    269	regulator-max-microvolt = <1303738>;
    270	ctrl-voltage-range = <799065 1303738>;
    271};
    272
    273&ppvar_gpu_pwm {
    274	regulator-min-microvolt = <785782>;
    275	regulator-max-microvolt = <1217729>;
    276};
    277
    278&ppvar_gpu {
    279	regulator-min-microvolt = <785782>;
    280	regulator-max-microvolt = <1217729>;
    281	ctrl-voltage-range = <785782 1217729>;
    282};
    283
    284&ppvar_centerlogic_pwm {
    285	regulator-min-microvolt = <800069>;
    286	regulator-max-microvolt = <1049692>;
    287};
    288
    289&ppvar_centerlogic {
    290	regulator-min-microvolt = <800069>;
    291	regulator-max-microvolt = <1049692>;
    292	ctrl-voltage-range = <800069 1049692>;
    293};
    294
    295&saradc {
    296	status = "okay";
    297	vref-supply = <&pp1800_ap_io>;
    298};
    299
    300&mvl_wifi {
    301	marvell,wakeup-pin = <14>; /* GPIO_14 on Marvell */
    302};
    303
    304&pinctrl {
    305	digitizer {
    306		/* Has external pullup */
    307		cpu1_dig_irq_l: cpu1-dig-irq-l {
    308			rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
    309		};
    310
    311		/* Has external pullup */
    312		cpu1_dig_pdct_l: cpu1-dig-pdct-l {
    313			rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
    314		};
    315	};
    316
    317	discrete-regulators {
    318		cpu3_pen_pwr_en: cpu3-pen-pwr-en {
    319			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
    320		};
    321	};
    322
    323	pen {
    324		cpu1_pen_eject: cpu1-pen-eject {
    325			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
    326		};
    327	};
    328};