cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rk3399-puma.dtsi (10435B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
      4 */
      5
      6#include <dt-bindings/pwm/pwm.h>
      7#include "rk3399.dtsi"
      8#include "rk3399-opp.dtsi"
      9
     10/ {
     11	aliases {
     12		mmc0 = &sdhci;
     13	};
     14
     15	leds {
     16		compatible = "gpio-leds";
     17		pinctrl-names = "default";
     18		pinctrl-0 = <&module_led_pin>;
     19
     20		module_led: led-0 {
     21			label = "module_led";
     22			gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
     23			linux,default-trigger = "heartbeat";
     24			panic-indicator;
     25		};
     26	};
     27
     28	extcon_usb3: extcon-usb3 {
     29		compatible = "linux,extcon-usb-gpio";
     30		id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
     31		pinctrl-names = "default";
     32		pinctrl-0 = <&usb3_id>;
     33	};
     34
     35	clkin_gmac: external-gmac-clock {
     36		compatible = "fixed-clock";
     37		clock-frequency = <125000000>;
     38		clock-output-names = "clkin_gmac";
     39		#clock-cells = <0>;
     40	};
     41
     42	vcc1v2_phy: vcc1v2-phy {
     43		compatible = "regulator-fixed";
     44		regulator-name = "vcc1v2_phy";
     45		regulator-always-on;
     46		regulator-boot-on;
     47		regulator-min-microvolt = <1200000>;
     48		regulator-max-microvolt = <1200000>;
     49		vin-supply = <&vcc5v0_sys>;
     50	};
     51
     52	vcc3v3_sys: vcc3v3-sys {
     53		compatible = "regulator-fixed";
     54		regulator-name = "vcc3v3_sys";
     55		regulator-always-on;
     56		regulator-boot-on;
     57		regulator-min-microvolt = <3300000>;
     58		regulator-max-microvolt = <3300000>;
     59		vin-supply = <&vcc5v0_sys>;
     60	};
     61
     62	vcc5v0_host: vcc5v0-host-regulator {
     63		compatible = "regulator-fixed";
     64		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
     65		enable-active-low;
     66		pinctrl-names = "default";
     67		pinctrl-0 = <&vcc5v0_host_en>;
     68		regulator-name = "vcc5v0_host";
     69		regulator-always-on;
     70		vin-supply = <&vcc5v0_sys>;
     71	};
     72
     73	vcc5v0_sys: vcc5v0-sys {
     74		compatible = "regulator-fixed";
     75		regulator-name = "vcc5v0_sys";
     76		regulator-always-on;
     77		regulator-boot-on;
     78		regulator-min-microvolt = <5000000>;
     79		regulator-max-microvolt = <5000000>;
     80	};
     81
     82	vdd_log: vdd-log {
     83		compatible = "pwm-regulator";
     84		pwms = <&pwm2 0 25000 1>;
     85		pwm-supply = <&vcc5v0_sys>;
     86		regulator-name = "vdd_log";
     87		regulator-min-microvolt = <800000>;
     88		regulator-max-microvolt = <1400000>;
     89		regulator-always-on;
     90		regulator-boot-on;
     91	};
     92};
     93
     94&cpu_b0 {
     95	cpu-supply = <&vdd_cpu_b>;
     96};
     97
     98&cpu_b1 {
     99	cpu-supply = <&vdd_cpu_b>;
    100};
    101
    102&cpu_l0 {
    103	cpu-supply = <&vdd_cpu_l>;
    104};
    105
    106&cpu_l1 {
    107	cpu-supply = <&vdd_cpu_l>;
    108};
    109
    110&cpu_l2 {
    111	cpu-supply = <&vdd_cpu_l>;
    112};
    113
    114&cpu_l3 {
    115	cpu-supply = <&vdd_cpu_l>;
    116};
    117
    118&emmc_phy {
    119	status = "okay";
    120	drive-impedance-ohm = <33>;
    121};
    122
    123&gmac {
    124	assigned-clocks = <&cru SCLK_RMII_SRC>;
    125	assigned-clock-parents = <&clkin_gmac>;
    126	clock_in_out = "input";
    127	phy-supply = <&vcc1v2_phy>;
    128	phy-mode = "rgmii";
    129	pinctrl-names = "default";
    130	pinctrl-0 = <&rgmii_pins>;
    131	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
    132	snps,reset-active-low;
    133	snps,reset-delays-us = <0 10000 50000>;
    134	tx_delay = <0x10>;
    135	rx_delay = <0x10>;
    136	status = "okay";
    137};
    138
    139&gpu {
    140	mali-supply = <&vdd_gpu>;
    141	status = "okay";
    142};
    143
    144&i2c0 {
    145	status = "okay";
    146	i2c-scl-rising-time-ns = <168>;
    147	i2c-scl-falling-time-ns = <4>;
    148	clock-frequency = <400000>;
    149
    150	rk808: pmic@1b {
    151		compatible = "rockchip,rk808";
    152		reg = <0x1b>;
    153		interrupt-parent = <&gpio1>;
    154		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
    155		#clock-cells = <1>;
    156		clock-output-names = "xin32k", "rk808-clkout2";
    157		pinctrl-names = "default";
    158		pinctrl-0 = <&pmic_int_l>;
    159		rockchip,system-power-controller;
    160		wakeup-source;
    161
    162		vcc1-supply = <&vcc5v0_sys>;
    163		vcc2-supply = <&vcc5v0_sys>;
    164		vcc3-supply = <&vcc5v0_sys>;
    165		vcc4-supply = <&vcc5v0_sys>;
    166		vcc6-supply = <&vcc5v0_sys>;
    167		vcc7-supply = <&vcc5v0_sys>;
    168		vcc8-supply = <&vcc3v3_sys>;
    169		vcc9-supply = <&vcc5v0_sys>;
    170		vcc10-supply = <&vcc5v0_sys>;
    171		vcc11-supply = <&vcc5v0_sys>;
    172		vcc12-supply = <&vcc3v3_sys>;
    173		vddio-supply = <&vcc1v8_pmu>;
    174
    175		regulators {
    176			vdd_center: DCDC_REG1 {
    177				regulator-name = "vdd_center";
    178				regulator-min-microvolt = <750000>;
    179				regulator-max-microvolt = <1350000>;
    180				regulator-ramp-delay = <6001>;
    181				regulator-always-on;
    182				regulator-boot-on;
    183				regulator-state-mem {
    184					regulator-off-in-suspend;
    185				};
    186			};
    187
    188			vdd_cpu_l: DCDC_REG2 {
    189				regulator-name = "vdd_cpu_l";
    190				regulator-min-microvolt = <750000>;
    191				regulator-max-microvolt = <1350000>;
    192				regulator-ramp-delay = <6001>;
    193				regulator-always-on;
    194				regulator-boot-on;
    195				regulator-state-mem {
    196					regulator-off-in-suspend;
    197				};
    198			};
    199
    200			vcc_ddr: DCDC_REG3 {
    201				regulator-name = "vcc_ddr";
    202				regulator-always-on;
    203				regulator-boot-on;
    204				regulator-state-mem {
    205					regulator-on-in-suspend;
    206				};
    207			};
    208
    209			vcc_1v8: DCDC_REG4 {
    210				regulator-name = "vcc_1v8";
    211				regulator-min-microvolt = <1800000>;
    212				regulator-max-microvolt = <1800000>;
    213				regulator-always-on;
    214				regulator-boot-on;
    215				regulator-state-mem {
    216					regulator-on-in-suspend;
    217					regulator-suspend-microvolt = <1800000>;
    218				};
    219			};
    220
    221			vcc_ldo1: LDO_REG1 {
    222				regulator-name = "vcc_ldo1";
    223				regulator-min-microvolt = <1800000>;
    224				regulator-max-microvolt = <1800000>;
    225				regulator-boot-on;
    226				regulator-state-mem {
    227					regulator-off-in-suspend;
    228				};
    229			};
    230
    231			vcc1v8_hdmi: LDO_REG2 {
    232				regulator-name = "vcc1v8_hdmi";
    233				regulator-min-microvolt = <1800000>;
    234				regulator-max-microvolt = <1800000>;
    235				regulator-always-on;
    236				regulator-boot-on;
    237				regulator-state-mem {
    238					regulator-off-in-suspend;
    239				};
    240			};
    241
    242			vcc1v8_pmu: LDO_REG3 {
    243				regulator-name = "vcc1v8_pmu";
    244				regulator-min-microvolt = <1800000>;
    245				regulator-max-microvolt = <1800000>;
    246				regulator-always-on;
    247				regulator-boot-on;
    248				regulator-state-mem {
    249					regulator-on-in-suspend;
    250					regulator-suspend-microvolt = <1800000>;
    251				};
    252			};
    253
    254			vcc_sd: LDO_REG4 {
    255				regulator-name = "vcc_sd";
    256				regulator-min-microvolt = <1800000>;
    257				regulator-max-microvolt = <3000000>;
    258				regulator-always-on;
    259				regulator-boot-on;
    260				regulator-state-mem {
    261					regulator-on-in-suspend;
    262					regulator-suspend-microvolt = <3000000>;
    263				};
    264			};
    265
    266			vcc_ldo5: LDO_REG5 {
    267				regulator-name = "vcc_ldo5";
    268				regulator-min-microvolt = <3000000>;
    269				regulator-max-microvolt = <3000000>;
    270				regulator-boot-on;
    271				regulator-state-mem {
    272					regulator-off-in-suspend;
    273				};
    274			};
    275
    276			vcc_ldo6: LDO_REG6 {
    277				regulator-name = "vcc_ldo6";
    278				regulator-min-microvolt = <1500000>;
    279				regulator-max-microvolt = <1500000>;
    280				regulator-boot-on;
    281				regulator-state-mem {
    282					regulator-off-in-suspend;
    283				};
    284			};
    285
    286			vcc0v9_hdmi: LDO_REG7 {
    287				regulator-name = "vcc0v9_hdmi";
    288				regulator-min-microvolt = <900000>;
    289				regulator-max-microvolt = <900000>;
    290				regulator-always-on;
    291				regulator-boot-on;
    292				regulator-state-mem {
    293					regulator-off-in-suspend;
    294				};
    295			};
    296
    297			vcc_efuse: LDO_REG8 {
    298				regulator-name = "vcc_efuse";
    299				regulator-min-microvolt = <1800000>;
    300				regulator-max-microvolt = <1800000>;
    301				regulator-always-on;
    302				regulator-boot-on;
    303				regulator-state-mem {
    304					regulator-off-in-suspend;
    305				};
    306			};
    307
    308			vcc3v3_s3: SWITCH_REG1 {
    309				regulator-name = "vcc3v3_s3";
    310				regulator-always-on;
    311				regulator-boot-on;
    312				regulator-state-mem {
    313					regulator-off-in-suspend;
    314				};
    315			};
    316
    317			vcc3v3_s0: SWITCH_REG2 {
    318				regulator-name = "vcc3v3_s0";
    319				regulator-always-on;
    320				regulator-boot-on;
    321				regulator-state-mem {
    322					regulator-off-in-suspend;
    323				};
    324			};
    325		};
    326	};
    327
    328	vdd_gpu: regulator@60 {
    329		compatible = "fcs,fan53555";
    330		reg = <0x60>;
    331		fcs,suspend-voltage-selector = <1>;
    332		regulator-name = "vdd_gpu";
    333		regulator-min-microvolt = <600000>;
    334		regulator-max-microvolt = <1230000>;
    335		regulator-ramp-delay = <1000>;
    336		regulator-always-on;
    337		regulator-boot-on;
    338		vin-supply = <&vcc5v0_sys>;
    339	};
    340};
    341
    342&i2c7 {
    343	status = "okay";
    344	clock-frequency = <400000>;
    345
    346	fan: fan@18 {
    347		compatible = "ti,amc6821";
    348		reg = <0x18>;
    349		#cooling-cells = <2>;
    350	};
    351
    352	rtc_twi: rtc@6f {
    353		compatible = "isil,isl1208";
    354		reg = <0x6f>;
    355	};
    356};
    357
    358&i2c8 {
    359	status = "okay";
    360	clock-frequency = <400000>;
    361
    362	vdd_cpu_b: regulator@60 {
    363		compatible = "fcs,fan53555";
    364		reg = <0x60>;
    365		vin-supply = <&vcc5v0_sys>;
    366		regulator-name = "vdd_cpu_b";
    367		regulator-min-microvolt = <600000>;
    368		regulator-max-microvolt = <1230000>;
    369		regulator-ramp-delay = <1000>;
    370		fcs,suspend-voltage-selector = <1>;
    371		regulator-always-on;
    372		regulator-boot-on;
    373	};
    374};
    375
    376&i2s0 {
    377	pinctrl-0 = <&i2s0_2ch_bus>;
    378	rockchip,playback-channels = <2>;
    379	rockchip,capture-channels = <2>;
    380	status = "okay";
    381};
    382
    383/*
    384 * As Q7 does not specify neither a global nor a RX clock for I2S these
    385 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
    386 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
    387 * conflicts.
    388 */
    389&i2s0_2ch_bus {
    390	rockchip,pins =
    391		<3 RK_PD0 1 &pcfg_pull_none>,
    392		<3 RK_PD2 1 &pcfg_pull_none>,
    393		<3 RK_PD3 1 &pcfg_pull_none>,
    394		<3 RK_PD7 1 &pcfg_pull_none>;
    395};
    396
    397&io_domains {
    398	status = "okay";
    399	bt656-supply = <&vcc_1v8>;
    400	audio-supply = <&vcc_1v8>;
    401	sdmmc-supply = <&vcc_sd>;
    402	gpio1830-supply = <&vcc_1v8>;
    403};
    404
    405&pmu_io_domains {
    406	status = "okay";
    407	pmu1830-supply = <&vcc_1v8>;
    408};
    409
    410&pwm2 {
    411	status = "okay";
    412};
    413
    414&pinctrl {
    415	i2c8 {
    416		i2c8_xfer_a: i2c8-xfer {
    417			rockchip,pins =
    418			  <1 RK_PC4 1 &pcfg_pull_up>,
    419			  <1 RK_PC5 1 &pcfg_pull_up>;
    420		};
    421	};
    422
    423	leds {
    424		module_led_pin: module-led-pin {
    425			rockchip,pins =
    426			  <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
    427		};
    428	};
    429
    430	pmic {
    431		pmic_int_l: pmic-int-l {
    432			rockchip,pins =
    433			  <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
    434		};
    435	};
    436
    437	usb2 {
    438		vcc5v0_host_en: vcc5v0-host-en {
    439			rockchip,pins =
    440			  <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
    441		};
    442	};
    443
    444	usb3 {
    445		usb3_id: usb3-id {
    446			rockchip,pins =
    447			  <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
    448		};
    449	};
    450};
    451
    452&sdhci {
    453	/*
    454	 * Signal integrity isn't great at 200MHz but 100MHz has proven stable
    455	 * enough.
    456	 */
    457	max-frequency = <100000000>;
    458
    459	bus-width = <8>;
    460	mmc-hs400-1_8v;
    461	mmc-hs400-enhanced-strobe;
    462	non-removable;
    463	status = "okay";
    464};
    465
    466&sdmmc {
    467	vqmmc-supply = <&vcc_sd>;
    468};
    469
    470&spi1 {
    471	status = "okay";
    472
    473	norflash: flash@0 {
    474		compatible = "jedec,spi-nor";
    475		reg = <0>;
    476		spi-max-frequency = <50000000>;
    477	};
    478};
    479
    480&tcphy1 {
    481	status = "okay";
    482};
    483
    484&tsadc {
    485	rockchip,hw-tshut-mode = <1>;
    486	rockchip,hw-tshut-polarity = <1>;
    487	status = "okay";
    488};
    489
    490&u2phy1 {
    491	status = "okay";
    492
    493	u2phy1_otg: otg-port {
    494		status = "okay";
    495	};
    496
    497	u2phy1_host: host-port {
    498		phy-supply = <&vcc5v0_host>;
    499		status = "okay";
    500	};
    501};
    502
    503&usbdrd3_1 {
    504	status = "okay";
    505};
    506
    507&usbdrd_dwc3_1 {
    508	status = "okay";
    509	dr_mode = "host";
    510};
    511
    512&usb_host1_ehci {
    513	status = "okay";
    514};
    515
    516&usb_host1_ohci {
    517	status = "okay";
    518};