rk3399-rock-pi-4.dtsi (15004B)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com> 4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com> 5 */ 6 7/dts-v1/; 8#include <dt-bindings/input/linux-event-codes.h> 9#include <dt-bindings/pwm/pwm.h> 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 aliases { 15 mmc0 = &sdmmc; 16 mmc1 = &sdhci; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; 28 }; 29 30 sdio_pwrseq: sdio-pwrseq { 31 compatible = "mmc-pwrseq-simple"; 32 clocks = <&rk808 1>; 33 clock-names = "ext_clock"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&wifi_enable_h>; 36 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 37 }; 38 39 sound: sound { 40 compatible = "audio-graph-card"; 41 label = "Analog"; 42 dais = <&i2s0_p0>; 43 }; 44 45 sound-dit { 46 compatible = "audio-graph-card"; 47 label = "SPDIF"; 48 dais = <&spdif_p0>; 49 }; 50 51 spdif-dit { 52 compatible = "linux,spdif-dit"; 53 #sound-dai-cells = <0>; 54 55 port { 56 dit_p0_0: endpoint { 57 remote-endpoint = <&spdif_p0_0>; 58 }; 59 }; 60 }; 61 62 vcc12v_dcin: dc-12v { 63 compatible = "regulator-fixed"; 64 regulator-name = "vcc12v_dcin"; 65 regulator-always-on; 66 regulator-boot-on; 67 regulator-min-microvolt = <12000000>; 68 regulator-max-microvolt = <12000000>; 69 }; 70 71 vcc5v0_sys: vcc-sys { 72 compatible = "regulator-fixed"; 73 regulator-name = "vcc5v0_sys"; 74 regulator-always-on; 75 regulator-boot-on; 76 regulator-min-microvolt = <5000000>; 77 regulator-max-microvolt = <5000000>; 78 vin-supply = <&vcc12v_dcin>; 79 }; 80 81 vcc_0v9: vcc-0v9 { 82 compatible = "regulator-fixed"; 83 regulator-name = "vcc_0v9"; 84 regulator-always-on; 85 regulator-boot-on; 86 regulator-min-microvolt = <900000>; 87 regulator-max-microvolt = <900000>; 88 vin-supply = <&vcc3v3_sys>; 89 }; 90 91 vcc3v3_pcie: vcc3v3-pcie-regulator { 92 compatible = "regulator-fixed"; 93 enable-active-high; 94 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pcie_pwr_en>; 97 regulator-name = "vcc3v3_pcie"; 98 regulator-always-on; 99 regulator-boot-on; 100 vin-supply = <&vcc5v0_sys>; 101 }; 102 103 vcc3v3_sys: vcc3v3-sys { 104 compatible = "regulator-fixed"; 105 regulator-name = "vcc3v3_sys"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-min-microvolt = <3300000>; 109 regulator-max-microvolt = <3300000>; 110 vin-supply = <&vcc5v0_sys>; 111 }; 112 113 vcc5v0_host: vcc5v0-host-regulator { 114 compatible = "regulator-fixed"; 115 enable-active-high; 116 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&vcc5v0_host_en>; 119 regulator-name = "vcc5v0_host"; 120 regulator-always-on; 121 vin-supply = <&vcc5v0_sys>; 122 }; 123 124 vcc5v0_typec: vcc5v0-typec-regulator { 125 compatible = "regulator-fixed"; 126 enable-active-high; 127 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&vcc5v0_typec_en>; 130 regulator-name = "vcc5v0_typec"; 131 regulator-always-on; 132 vin-supply = <&vcc5v0_sys>; 133 }; 134 135 vcc_lan: vcc3v3-phy-regulator { 136 compatible = "regulator-fixed"; 137 regulator-name = "vcc_lan"; 138 regulator-always-on; 139 regulator-boot-on; 140 regulator-min-microvolt = <3300000>; 141 regulator-max-microvolt = <3300000>; 142 }; 143 144 vdd_log: vdd-log { 145 compatible = "pwm-regulator"; 146 pwms = <&pwm2 0 25000 1>; 147 pwm-supply = <&vcc5v0_sys>; 148 regulator-name = "vdd_log"; 149 regulator-always-on; 150 regulator-boot-on; 151 regulator-min-microvolt = <800000>; 152 regulator-max-microvolt = <1400000>; 153 }; 154}; 155 156&cpu_l0 { 157 cpu-supply = <&vdd_cpu_l>; 158}; 159 160&cpu_l1 { 161 cpu-supply = <&vdd_cpu_l>; 162}; 163 164&cpu_l2 { 165 cpu-supply = <&vdd_cpu_l>; 166}; 167 168&cpu_l3 { 169 cpu-supply = <&vdd_cpu_l>; 170}; 171 172&cpu_b0 { 173 cpu-supply = <&vdd_cpu_b>; 174}; 175 176&cpu_b1 { 177 cpu-supply = <&vdd_cpu_b>; 178}; 179 180&emmc_phy { 181 status = "okay"; 182}; 183 184&gmac { 185 assigned-clocks = <&cru SCLK_RMII_SRC>; 186 assigned-clock-parents = <&clkin_gmac>; 187 clock_in_out = "input"; 188 phy-supply = <&vcc_lan>; 189 phy-mode = "rgmii"; 190 pinctrl-names = "default"; 191 pinctrl-0 = <&rgmii_pins>; 192 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 193 snps,reset-active-low; 194 snps,reset-delays-us = <0 10000 50000>; 195 tx_delay = <0x28>; 196 rx_delay = <0x11>; 197 status = "okay"; 198}; 199 200&gpu { 201 mali-supply = <&vdd_gpu>; 202 status = "okay"; 203}; 204 205&hdmi { 206 ddc-i2c-bus = <&i2c3>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&hdmi_cec>; 209 status = "okay"; 210}; 211 212&hdmi_sound { 213 status = "okay"; 214}; 215 216&i2c0 { 217 clock-frequency = <400000>; 218 i2c-scl-rising-time-ns = <168>; 219 i2c-scl-falling-time-ns = <4>; 220 status = "okay"; 221 222 rk808: pmic@1b { 223 compatible = "rockchip,rk808"; 224 reg = <0x1b>; 225 interrupt-parent = <&gpio1>; 226 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 227 #clock-cells = <1>; 228 clock-output-names = "xin32k", "rk808-clkout2"; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pmic_int_l>; 231 rockchip,system-power-controller; 232 wakeup-source; 233 234 vcc1-supply = <&vcc5v0_sys>; 235 vcc2-supply = <&vcc5v0_sys>; 236 vcc3-supply = <&vcc5v0_sys>; 237 vcc4-supply = <&vcc5v0_sys>; 238 vcc6-supply = <&vcc5v0_sys>; 239 vcc7-supply = <&vcc5v0_sys>; 240 vcc8-supply = <&vcc3v3_sys>; 241 vcc9-supply = <&vcc5v0_sys>; 242 vcc10-supply = <&vcc5v0_sys>; 243 vcc11-supply = <&vcc5v0_sys>; 244 vcc12-supply = <&vcc3v3_sys>; 245 vddio-supply = <&vcc_1v8>; 246 247 regulators { 248 vdd_center: DCDC_REG1 { 249 regulator-name = "vdd_center"; 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-min-microvolt = <750000>; 253 regulator-max-microvolt = <1350000>; 254 regulator-ramp-delay = <6001>; 255 regulator-state-mem { 256 regulator-off-in-suspend; 257 }; 258 }; 259 260 vdd_cpu_l: DCDC_REG2 { 261 regulator-name = "vdd_cpu_l"; 262 regulator-always-on; 263 regulator-boot-on; 264 regulator-min-microvolt = <750000>; 265 regulator-max-microvolt = <1350000>; 266 regulator-ramp-delay = <6001>; 267 regulator-state-mem { 268 regulator-off-in-suspend; 269 }; 270 }; 271 272 vcc_ddr: DCDC_REG3 { 273 regulator-name = "vcc_ddr"; 274 regulator-always-on; 275 regulator-boot-on; 276 regulator-state-mem { 277 regulator-on-in-suspend; 278 }; 279 }; 280 281 vcc_1v8: DCDC_REG4 { 282 regulator-name = "vcc_1v8"; 283 regulator-always-on; 284 regulator-boot-on; 285 regulator-min-microvolt = <1800000>; 286 regulator-max-microvolt = <1800000>; 287 regulator-state-mem { 288 regulator-on-in-suspend; 289 regulator-suspend-microvolt = <1800000>; 290 }; 291 }; 292 293 vcc1v8_codec: LDO_REG1 { 294 regulator-name = "vcc1v8_codec"; 295 regulator-always-on; 296 regulator-boot-on; 297 regulator-min-microvolt = <1800000>; 298 regulator-max-microvolt = <1800000>; 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 vcc1v8_hdmi: LDO_REG2 { 305 regulator-name = "vcc1v8_hdmi"; 306 regulator-always-on; 307 regulator-boot-on; 308 regulator-min-microvolt = <1800000>; 309 regulator-max-microvolt = <1800000>; 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 315 vcca_1v8: LDO_REG3 { 316 regulator-name = "vcca_1v8"; 317 regulator-always-on; 318 regulator-boot-on; 319 regulator-min-microvolt = <1800000>; 320 regulator-max-microvolt = <1800000>; 321 regulator-state-mem { 322 regulator-on-in-suspend; 323 regulator-suspend-microvolt = <1800000>; 324 }; 325 }; 326 327 vcc_sdio: LDO_REG4 { 328 regulator-name = "vcc_sdio"; 329 regulator-always-on; 330 regulator-boot-on; 331 regulator-min-microvolt = <3000000>; 332 regulator-max-microvolt = <3000000>; 333 regulator-state-mem { 334 regulator-on-in-suspend; 335 regulator-suspend-microvolt = <3000000>; 336 }; 337 }; 338 339 vcca3v0_codec: LDO_REG5 { 340 regulator-name = "vcca3v0_codec"; 341 regulator-always-on; 342 regulator-boot-on; 343 regulator-min-microvolt = <3000000>; 344 regulator-max-microvolt = <3000000>; 345 regulator-state-mem { 346 regulator-off-in-suspend; 347 }; 348 }; 349 350 vcc_1v5: LDO_REG6 { 351 regulator-name = "vcc_1v5"; 352 regulator-always-on; 353 regulator-boot-on; 354 regulator-min-microvolt = <1500000>; 355 regulator-max-microvolt = <1500000>; 356 regulator-state-mem { 357 regulator-on-in-suspend; 358 regulator-suspend-microvolt = <1500000>; 359 }; 360 }; 361 362 vcc0v9_hdmi: LDO_REG7 { 363 regulator-name = "vcc0v9_hdmi"; 364 regulator-always-on; 365 regulator-boot-on; 366 regulator-min-microvolt = <900000>; 367 regulator-max-microvolt = <900000>; 368 regulator-state-mem { 369 regulator-off-in-suspend; 370 }; 371 }; 372 373 vcc_3v0: LDO_REG8 { 374 regulator-name = "vcc_3v0"; 375 regulator-always-on; 376 regulator-boot-on; 377 regulator-min-microvolt = <3000000>; 378 regulator-max-microvolt = <3000000>; 379 regulator-state-mem { 380 regulator-on-in-suspend; 381 regulator-suspend-microvolt = <3000000>; 382 }; 383 }; 384 385 vcc_cam: SWITCH_REG1 { 386 regulator-name = "vcc_cam"; 387 regulator-always-on; 388 regulator-boot-on; 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 }; 392 }; 393 394 vcc_mipi: SWITCH_REG2 { 395 regulator-name = "vcc_mipi"; 396 regulator-always-on; 397 regulator-boot-on; 398 regulator-state-mem { 399 regulator-off-in-suspend; 400 }; 401 }; 402 }; 403 }; 404 405 vdd_cpu_b: regulator@40 { 406 compatible = "silergy,syr827"; 407 reg = <0x40>; 408 fcs,suspend-voltage-selector = <1>; 409 pinctrl-names = "default"; 410 pinctrl-0 = <&vsel1_pin>; 411 regulator-name = "vdd_cpu_b"; 412 regulator-min-microvolt = <712500>; 413 regulator-max-microvolt = <1500000>; 414 regulator-ramp-delay = <1000>; 415 regulator-always-on; 416 regulator-boot-on; 417 vin-supply = <&vcc5v0_sys>; 418 419 regulator-state-mem { 420 regulator-off-in-suspend; 421 }; 422 }; 423 424 vdd_gpu: regulator@41 { 425 compatible = "silergy,syr828"; 426 reg = <0x41>; 427 fcs,suspend-voltage-selector = <1>; 428 pinctrl-names = "default"; 429 pinctrl-0 = <&vsel2_pin>; 430 regulator-name = "vdd_gpu"; 431 regulator-min-microvolt = <712500>; 432 regulator-max-microvolt = <1500000>; 433 regulator-ramp-delay = <1000>; 434 regulator-always-on; 435 regulator-boot-on; 436 vin-supply = <&vcc5v0_sys>; 437 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 }; 441 }; 442}; 443 444&i2c1 { 445 i2c-scl-rising-time-ns = <300>; 446 i2c-scl-falling-time-ns = <15>; 447 status = "okay"; 448 449 es8316: codec@11 { 450 compatible = "everest,es8316"; 451 reg = <0x11>; 452 clocks = <&cru SCLK_I2S_8CH_OUT>; 453 clock-names = "mclk"; 454 #sound-dai-cells = <0>; 455 456 port { 457 es8316_p0_0: endpoint { 458 remote-endpoint = <&i2s0_p0_0>; 459 }; 460 }; 461 }; 462}; 463 464&i2c3 { 465 i2c-scl-rising-time-ns = <450>; 466 i2c-scl-falling-time-ns = <15>; 467 status = "okay"; 468}; 469 470&i2c4 { 471 i2c-scl-rising-time-ns = <600>; 472 i2c-scl-falling-time-ns = <20>; 473 status = "okay"; 474}; 475 476&i2s0 { 477 pinctrl-0 = <&i2s0_2ch_bus>; 478 rockchip,capture-channels = <2>; 479 rockchip,playback-channels = <2>; 480 status = "okay"; 481 482 i2s0_p0: port { 483 i2s0_p0_0: endpoint { 484 dai-format = "i2s"; 485 mclk-fs = <256>; 486 remote-endpoint = <&es8316_p0_0>; 487 }; 488 }; 489}; 490 491&i2s1 { 492 rockchip,playback-channels = <2>; 493 rockchip,capture-channels = <2>; 494 status = "okay"; 495}; 496 497&i2s2 { 498 status = "okay"; 499}; 500 501&io_domains { 502 status = "okay"; 503 504 bt656-supply = <&vcc_3v0>; 505 audio-supply = <&vcc1v8_codec>; 506 sdmmc-supply = <&vcc_sdio>; 507 gpio1830-supply = <&vcc_3v0>; 508}; 509 510&pmu_io_domains { 511 status = "okay"; 512 513 pmu1830-supply = <&vcc_3v0>; 514}; 515 516&pcie_phy { 517 status = "okay"; 518}; 519 520&pcie0 { 521 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; 522 num-lanes = <4>; 523 pinctrl-0 = <&pcie_clkreqnb_cpm>; 524 pinctrl-names = "default"; 525 vpcie0v9-supply = <&vcc_0v9>; 526 vpcie1v8-supply = <&vcc_1v8>; 527 vpcie3v3-supply = <&vcc3v3_pcie>; 528 status = "okay"; 529}; 530 531&pinctrl { 532 bt { 533 bt_enable_h: bt-enable-h { 534 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 535 }; 536 537 bt_host_wake_l: bt-host-wake-l { 538 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 539 }; 540 541 bt_wake_l: bt-wake-l { 542 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 543 }; 544 }; 545 546 es8316 { 547 hp_detect: hp-detect { 548 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 549 }; 550 551 hp_int: hp-int { 552 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 553 }; 554 }; 555 556 pcie { 557 pcie_pwr_en: pcie-pwr-en { 558 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 559 }; 560 }; 561 562 sdio0 { 563 sdio0_bus4: sdio0-bus4 { 564 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>, 565 <2 RK_PC5 1 &pcfg_pull_up_20ma>, 566 <2 RK_PC6 1 &pcfg_pull_up_20ma>, 567 <2 RK_PC7 1 &pcfg_pull_up_20ma>; 568 }; 569 570 sdio0_cmd: sdio0-cmd { 571 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>; 572 }; 573 574 sdio0_clk: sdio0-clk { 575 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>; 576 }; 577 }; 578 579 pmic { 580 pmic_int_l: pmic-int-l { 581 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 582 }; 583 584 vsel1_pin: vsel1-pin { 585 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 586 }; 587 588 vsel2_pin: vsel2-pin { 589 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 590 }; 591 }; 592 593 usb-typec { 594 vcc5v0_typec_en: vcc5v0-typec-en { 595 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 596 }; 597 }; 598 599 usb2 { 600 vcc5v0_host_en: vcc5v0-host-en { 601 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 602 }; 603 }; 604 605 wifi { 606 wifi_enable_h: wifi-enable-h { 607 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 608 }; 609 610 wifi_host_wake_l: wifi-host-wake-l { 611 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 612 }; 613 }; 614}; 615 616&pwm2 { 617 status = "okay"; 618}; 619 620&saradc { 621 status = "okay"; 622 623 vref-supply = <&vcc_1v8>; 624}; 625 626&sdio0 { 627 #address-cells = <1>; 628 #size-cells = <0>; 629 bus-width = <4>; 630 clock-frequency = <50000000>; 631 cap-sdio-irq; 632 cap-sd-highspeed; 633 keep-power-in-suspend; 634 mmc-pwrseq = <&sdio_pwrseq>; 635 non-removable; 636 pinctrl-names = "default"; 637 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 638 sd-uhs-sdr104; 639}; 640 641&sdmmc { 642 bus-width = <4>; 643 cap-mmc-highspeed; 644 cap-sd-highspeed; 645 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 646 disable-wp; 647 max-frequency = <150000000>; 648 pinctrl-names = "default"; 649 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 650 status = "okay"; 651}; 652 653&sdhci { 654 bus-width = <8>; 655 mmc-hs400-1_8v; 656 mmc-hs400-enhanced-strobe; 657 non-removable; 658 status = "okay"; 659}; 660 661&spdif { 662 663 spdif_p0: port { 664 spdif_p0_0: endpoint { 665 remote-endpoint = <&dit_p0_0>; 666 }; 667 }; 668}; 669 670&tcphy0 { 671 status = "okay"; 672}; 673 674&tcphy1 { 675 status = "okay"; 676}; 677 678&tsadc { 679 status = "okay"; 680 681 /* tshut mode 0:CRU 1:GPIO */ 682 rockchip,hw-tshut-mode = <1>; 683 /* tshut polarity 0:LOW 1:HIGH */ 684 rockchip,hw-tshut-polarity = <1>; 685}; 686 687&u2phy0 { 688 status = "okay"; 689 690 u2phy0_otg: otg-port { 691 status = "okay"; 692 }; 693 694 u2phy0_host: host-port { 695 phy-supply = <&vcc5v0_host>; 696 status = "okay"; 697 }; 698}; 699 700&u2phy1 { 701 status = "okay"; 702 703 u2phy1_otg: otg-port { 704 status = "okay"; 705 }; 706 707 u2phy1_host: host-port { 708 phy-supply = <&vcc5v0_host>; 709 status = "okay"; 710 }; 711}; 712 713&uart0 { 714 pinctrl-names = "default"; 715 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 716}; 717 718&uart2 { 719 status = "okay"; 720}; 721 722&usb_host0_ehci { 723 status = "okay"; 724}; 725 726&usb_host0_ohci { 727 status = "okay"; 728}; 729 730&usb_host1_ehci { 731 status = "okay"; 732}; 733 734&usb_host1_ohci { 735 status = "okay"; 736}; 737 738&usbdrd3_0 { 739 status = "okay"; 740}; 741 742&usbdrd_dwc3_0 { 743 status = "okay"; 744 dr_mode = "host"; 745}; 746 747&usbdrd3_1 { 748 status = "okay"; 749}; 750 751&usbdrd_dwc3_1 { 752 status = "okay"; 753 dr_mode = "host"; 754}; 755 756&vopb { 757 status = "okay"; 758}; 759 760&vopb_mmu { 761 status = "okay"; 762}; 763 764&vopl { 765 status = "okay"; 766}; 767 768&vopl_mmu { 769 status = "okay"; 770};