cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rk3566-soquartz.dtsi (13598B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2
      3/dts-v1/;
      4
      5#include <dt-bindings/gpio/gpio.h>
      6#include <dt-bindings/pinctrl/rockchip.h>
      7#include "rk3566.dtsi"
      8
      9/ {
     10	model = "Pine64 RK3566 SoQuartz SOM";
     11	compatible = "pine64,soquartz", "rockchip,rk3566";
     12
     13	aliases {
     14		ethernet0 = &gmac1;
     15		mmc0 = &sdmmc0;
     16		mmc1 = &sdhci;
     17		mmc2 = &sdmmc1;
     18	};
     19
     20	chosen: chosen {
     21		stdout-path = "serial2:1500000n8";
     22	};
     23
     24	gmac1_clkin: external-gmac1-clock {
     25		compatible = "fixed-clock";
     26		clock-frequency = <125000000>;
     27		clock-output-names = "gmac1_clkin";
     28		#clock-cells = <0>;
     29	};
     30
     31	leds {
     32		compatible = "gpio-leds";
     33
     34		led_diy: led-diy {
     35			label = "diy-led";
     36			default-state = "on";
     37			gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
     38			linux,default-trigger = "heartbeat";
     39			pinctrl-names = "default";
     40			pinctrl-0 = <&diy_led_enable_h>;
     41			retain-state-suspended;
     42			status = "disabled";
     43		};
     44
     45		led_work: led-work {
     46			label = "work-led";
     47			default-state = "off";
     48			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
     49			pinctrl-names = "default";
     50			pinctrl-0 = <&work_led_enable_h>;
     51			retain-state-suspended;
     52			status = "disabled";
     53		};
     54	};
     55
     56	sdio_pwrseq: sdio-pwrseq {
     57		status = "okay";
     58		compatible = "mmc-pwrseq-simple";
     59		clocks = <&rk809 1>;
     60		clock-names = "ext_clock";
     61		pinctrl-names = "default";
     62		pinctrl-0 = <&wifi_enable_h>;
     63		reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
     64	};
     65
     66	vbus: vbus-regulator {
     67		compatible = "regulator-fixed";
     68		regulator-name = "vbus";
     69		regulator-always-on;
     70		regulator-boot-on;
     71		regulator-min-microvolt = <5000000>;
     72		regulator-max-microvolt = <5000000>;
     73	};
     74
     75	/* sourced from vbus, vbus is provided by the carrier board */
     76	vcc5v0_sys: vcc5v0-sys-regulator {
     77		compatible = "regulator-fixed";
     78		regulator-name = "vcc5v0_sys";
     79		regulator-always-on;
     80		regulator-boot-on;
     81		regulator-min-microvolt = <5000000>;
     82		regulator-max-microvolt = <5000000>;
     83		vin-supply = <&vbus>;
     84	};
     85
     86	vcc3v3_sys: vcc3v3-sys-regulator {
     87		compatible = "regulator-fixed";
     88		regulator-name = "vcc3v3_sys";
     89		regulator-always-on;
     90		regulator-boot-on;
     91		regulator-min-microvolt = <3300000>;
     92		regulator-max-microvolt = <3300000>;
     93		vin-supply = <&vcc5v0_sys>;
     94	};
     95
     96	sdmmc_pwr: sdmmc-pwr-regulator {
     97		compatible = "regulator-fixed";
     98		enable-active-high;
     99		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
    100		pinctrl-names = "default";
    101		pinctrl-0 = <&sdmmc_pwr_h>;
    102		regulator-name = "sdmmc_pwr";
    103		status = "disabled";
    104	};
    105};
    106
    107&cpu0 {
    108	cpu-supply = <&vdd_cpu>;
    109};
    110
    111&cpu1 {
    112	cpu-supply = <&vdd_cpu>;
    113};
    114
    115&cpu2 {
    116	cpu-supply = <&vdd_cpu>;
    117};
    118
    119&cpu3 {
    120	cpu-supply = <&vdd_cpu>;
    121};
    122
    123&gmac1 {
    124	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
    125	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
    126	clock_in_out = "input";
    127	phy-supply = <&vcc_3v3>;
    128	phy-mode = "rgmii";
    129	pinctrl-names = "default";
    130	pinctrl-0 = <&gmac1m0_miim
    131		     &gmac1m0_tx_bus2
    132		     &gmac1m0_rx_bus2
    133		     &gmac1m0_rgmii_clk
    134		     &gmac1m0_clkinout
    135		     &gmac1m0_rgmii_bus>;
    136	snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
    137	snps,reset-active-low;
    138	/* Reset time is 20ms, 100ms for rtl8211f, also works well here */
    139	snps,reset-delays-us = <0 20000 100000>;
    140	tx_delay = <0x30>;
    141	rx_delay = <0x10>;
    142	phy-handle = <&rgmii_phy1>;
    143	status = "disabled";
    144};
    145
    146&i2c0 {
    147	status = "okay";
    148
    149	vdd_cpu: regulator@1c {
    150		compatible = "tcs,tcs4525";
    151		reg = <0x1c>;
    152		fcs,suspend-voltage-selector = <1>;
    153		regulator-name = "vdd_cpu";
    154		regulator-min-microvolt = <800000>;
    155		regulator-max-microvolt = <1150000>;
    156		regulator-ramp-delay = <2300>;
    157		regulator-always-on;
    158		regulator-boot-on;
    159		vin-supply = <&vcc5v0_sys>;
    160
    161		regulator-state-mem {
    162			regulator-off-in-suspend;
    163		};
    164	};
    165
    166	rk809: pmic@20 {
    167		compatible = "rockchip,rk809";
    168		reg = <0x20>;
    169		interrupt-parent = <&gpio0>;
    170		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
    171		#clock-cells = <1>;
    172		clock-output-names = "rk808-clkout1", "rk808-clkout2";
    173		pinctrl-names = "default";
    174		pinctrl-0 = <&pmic_int_l>;
    175		rockchip,system-power-controller;
    176		wakeup-source;
    177
    178		vcc1-supply = <&vcc3v3_sys>;
    179		vcc2-supply = <&vcc3v3_sys>;
    180		vcc3-supply = <&vcc3v3_sys>;
    181		vcc4-supply = <&vcc3v3_sys>;
    182		vcc5-supply = <&vcc3v3_sys>;
    183		vcc6-supply = <&vcc3v3_sys>;
    184		vcc7-supply = <&vcc3v3_sys>;
    185		vcc8-supply = <&vcc3v3_sys>;
    186		vcc9-supply = <&vcc3v3_sys>;
    187
    188		regulators {
    189			vdd_logic: DCDC_REG1 {
    190				regulator-name = "vdd_logic";
    191				regulator-always-on;
    192				regulator-boot-on;
    193				regulator-min-microvolt = <500000>;
    194				regulator-max-microvolt = <1350000>;
    195				regulator-init-microvolt = <900000>;
    196				regulator-ramp-delay = <6001>;
    197				regulator-initial-mode = <0x2>;
    198				regulator-state-mem {
    199					regulator-on-in-suspend;
    200					regulator-suspend-microvolt = <900000>;
    201				};
    202			};
    203
    204			vdd_gpu: DCDC_REG2 {
    205				regulator-name = "vdd_gpu";
    206				regulator-always-on;
    207				regulator-boot-on;
    208				regulator-min-microvolt = <500000>;
    209				regulator-max-microvolt = <1350000>;
    210				regulator-init-microvolt = <900000>;
    211				regulator-ramp-delay = <6001>;
    212				regulator-initial-mode = <0x2>;
    213					regulator-state-mem {
    214					regulator-off-in-suspend;
    215				};
    216			};
    217
    218			vcc_ddr: DCDC_REG3 {
    219				regulator-always-on;
    220				regulator-boot-on;
    221				regulator-initial-mode = <0x2>;
    222				regulator-name = "vcc_ddr";
    223				regulator-state-mem {
    224					regulator-on-in-suspend;
    225				};
    226			};
    227
    228			vdd_npu: DCDC_REG4 {
    229				regulator-always-on;
    230				regulator-boot-on;
    231				regulator-min-microvolt = <500000>;
    232				regulator-max-microvolt = <1350000>;
    233				regulator-init-microvolt = <900000>;
    234				regulator-initial-mode = <0x2>;
    235				regulator-name = "vdd_npu";
    236				regulator-state-mem {
    237					regulator-off-in-suspend;
    238				};
    239			};
    240
    241			vcc_1v8: DCDC_REG5 {
    242				regulator-name = "vcc_1v8";
    243				regulator-always-on;
    244				regulator-boot-on;
    245				regulator-min-microvolt = <1800000>;
    246				regulator-max-microvolt = <1800000>;
    247				regulator-state-mem {
    248					regulator-on-in-suspend;
    249					regulator-suspend-microvolt = <1800000>;
    250				};
    251			};
    252
    253			vdda0v9_image: LDO_REG1 {
    254				regulator-always-on;
    255				regulator-boot-on;
    256				regulator-min-microvolt = <900000>;
    257				regulator-max-microvolt = <900000>;
    258				regulator-name = "vdda0v9_image";
    259				regulator-state-mem {
    260					regulator-on-in-suspend;
    261					regulator-suspend-microvolt = <900000>;
    262				};
    263			};
    264
    265			vdda_0v9: LDO_REG2 {
    266				regulator-always-on;
    267				regulator-boot-on;
    268				regulator-min-microvolt = <900000>;
    269				regulator-max-microvolt = <900000>;
    270				regulator-name = "vdda_0v9";
    271				regulator-state-mem {
    272					regulator-off-in-suspend;
    273				};
    274			};
    275
    276			vdda0v9_pmu: LDO_REG3 {
    277				regulator-always-on;
    278				regulator-boot-on;
    279				regulator-min-microvolt = <900000>;
    280				regulator-max-microvolt = <900000>;
    281				regulator-name = "vdda0v9_pmu";
    282				regulator-state-mem {
    283					regulator-on-in-suspend;
    284					regulator-suspend-microvolt = <900000>;
    285				};
    286			};
    287
    288			vccio_acodec: LDO_REG4 {
    289				regulator-always-on;
    290				regulator-boot-on;
    291				regulator-min-microvolt = <3300000>;
    292				regulator-max-microvolt = <3300000>;
    293				regulator-name = "vccio_acodec";
    294				regulator-state-mem {
    295					regulator-off-in-suspend;
    296				};
    297			};
    298
    299			vccio_sd: LDO_REG5 {
    300				regulator-always-on;
    301				regulator-boot-on;
    302				regulator-min-microvolt = <1800000>;
    303				regulator-max-microvolt = <3300000>;
    304				regulator-name = "vccio_sd";
    305				regulator-state-mem {
    306					regulator-off-in-suspend;
    307				};
    308			};
    309
    310			vcc3v3_pmu: LDO_REG6 {
    311				regulator-always-on;
    312				regulator-boot-on;
    313				regulator-min-microvolt = <3300000>;
    314				regulator-max-microvolt = <3300000>;
    315				regulator-name = "vcc3v3_pmu";
    316				regulator-state-mem {
    317					regulator-on-in-suspend;
    318					regulator-suspend-microvolt = <3300000>;
    319				};
    320			};
    321
    322			vcca_1v8: LDO_REG7 {
    323				regulator-always-on;
    324				regulator-boot-on;
    325				regulator-min-microvolt = <1800000>;
    326				regulator-max-microvolt = <1800000>;
    327				regulator-name = "vcca_1v8";
    328				regulator-state-mem {
    329					regulator-off-in-suspend;
    330				};
    331			};
    332
    333			vcca1v8_pmu: LDO_REG8 {
    334				regulator-always-on;
    335				regulator-boot-on;
    336				regulator-min-microvolt = <1800000>;
    337				regulator-max-microvolt = <1800000>;
    338				regulator-name = "vcca1v8_pmu";
    339				regulator-state-mem {
    340					regulator-off-in-suspend;
    341				};
    342			};
    343
    344			vcca1v8_image: LDO_REG9 {
    345				regulator-always-on;
    346				regulator-boot-on;
    347				regulator-min-microvolt = <1800000>;
    348				regulator-max-microvolt = <1800000>;
    349				regulator-name = "vcca1v8_image";
    350				regulator-state-mem {
    351					regulator-off-in-suspend;
    352				};
    353			};
    354
    355			vcc_3v3: SWITCH_REG1 {
    356				regulator-name = "vcc_3v3";
    357				regulator-state-mem {
    358					regulator-off-in-suspend;
    359				};
    360			};
    361
    362			vcc3v3_sd: SWITCH_REG2 {
    363				regulator-name = "vcc3v3_sd";
    364				status = "disabled";
    365				regulator-state-mem {
    366					regulator-on-in-suspend;
    367				};
    368			};
    369
    370		};
    371	};
    372};
    373
    374/*
    375 * i2c1 is exposed on CM1 / Module1A
    376 * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
    377 * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
    378 */
    379&i2c1 {
    380	status = "disabled";
    381};
    382
    383/*
    384 * i2c2 is exposed on CM1 / Module1A
    385 * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
    386 * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
    387 */
    388&i2c2 {
    389	pinctrl-names = "default";
    390	pinctrl-0 = <&i2c2m1_xfer>;
    391	status = "disabled";
    392};
    393
    394/*
    395 * i2c3 is exposed on CM1 / Module1A
    396 * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
    397 * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
    398 */
    399&i2c3 {
    400	status = "disabled";
    401};
    402
    403/*
    404 * i2c4 is exposed on CM2 / Module1B
    405 * pin 45 - i2c4_scl_m1
    406 * pin 47 - i2c4_sda_m1
    407 */
    408&i2c4 {
    409	pinctrl-names = "default";
    410	pinctrl-0 = <&i2c4m1_xfer>;
    411	status = "disabled";
    412};
    413
    414/*
    415 * i2s1_8ch is exposed on CM1 / Module1A
    416 * pin 24 - i2s1_sdi1_m1
    417 * pin 25 - i2s1_sdo0_m1
    418 * pin 26 - i2s1_lrck_tx_m1
    419 * pin 27 - i2s1_sdi0_m1
    420 * pin 29 - i2s1_sdi3_m1
    421 * pin 30 - i2s1_sdi2_m1
    422 * pin 40 - i2s1_sdo1_m1, shared with spi3
    423 * pin 41 - i2s1_sdo2_m1
    424 * pin 49 - i2s1_sclk_tx_m1
    425 * pin 50 - i2s1_mclk_m1
    426 * pin 56 - i2s1_sdo3_m1, shared with i2c2
    427 */
    428&i2s1_8ch {
    429	pinctrl-names = "default";
    430	pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
    431		     &i2s1m1_lrcktx &i2s1m1_lrckrx
    432		     &i2s1m1_sdi0   &i2s1m1_sdi1
    433		     &i2s1m1_sdi2   &i2s1m1_sdi3
    434		     &i2s1m1_sdo0   &i2s1m1_sdo1
    435		     &i2s1m1_sdo2   &i2s1m1_sdo3>;
    436	status = "disabled";
    437};
    438
    439&mdio1 {
    440	rgmii_phy1: ethernet-phy@0 {
    441		compatible = "ethernet-phy-ieee802.3-c22";
    442		reg = <0>;
    443		status = "disabled";
    444	};
    445};
    446
    447&pinctrl {
    448	bt {
    449		bt_enable_h: bt-enable-h {
    450			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
    451		};
    452
    453		bt_host_wake_l: bt-host-wake-l {
    454			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
    455		};
    456
    457		bt_wake_l: bt-wake-l {
    458			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
    459		};
    460	};
    461
    462	leds {
    463		work_led_enable_h: work-led-enable-h {
    464			rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
    465		};
    466
    467		diy_led_enable_h: diy-led-enable-h {
    468			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
    469		};
    470	};
    471
    472	pmic {
    473		pmic_int_l: pmic-int-l {
    474			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
    475		};
    476	};
    477
    478	sdio-pwrseq {
    479		wifi_enable_h: wifi-enable-h {
    480			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
    481		};
    482	};
    483
    484	sdmmc-pwr {
    485		sdmmc_pwr_h: sdmmc-pwr-h {
    486			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
    487		};
    488	};
    489};
    490
    491&pmu_io_domains {
    492	pmuio1-supply = <&vcc3v3_pmu>;
    493	pmuio2-supply = <&vcc3v3_pmu>;
    494	vccio1-supply = <&vcc_3v3>;
    495	vccio2-supply = <&vcc_1v8>;
    496	vccio3-supply = <&vccio_sd>;
    497	vccio4-supply = <&vcc_1v8>;
    498	vccio5-supply = <&vcc_3v3>;
    499	vccio6-supply = <&vcc_3v3>;
    500	vccio7-supply = <&vcc_3v3>;
    501	status = "okay";
    502};
    503
    504/*
    505 * saradc is exposed on CM1 / Module1A
    506 * pin 94 - saradc_vin3
    507 * pin 96 - saradc_vin2
    508 */
    509&saradc {
    510	vref-supply = <&vcca_1v8>;
    511	status = "disabled";
    512};
    513
    514&sdhci {
    515	bus-width = <8>;
    516	mmc-hs200-1_8v;
    517	non-removable;
    518	vmmc-supply = <&vcc_3v3>;
    519	vqmmc-supply = <&vcc_1v8>;
    520	status = "okay";
    521};
    522
    523&sdmmc0 {
    524	broken-cd;
    525	bus-width = <4>;
    526	cap-sd-highspeed;
    527	disable-wp;
    528	pinctrl-names = "default";
    529	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
    530	vqmmc-supply = <&vccio_sd>;
    531	status = "disabled";
    532};
    533
    534&sdmmc1 {
    535	bus-width = <4>;
    536	cap-sd-highspeed;
    537	cap-sdio-irq;
    538	keep-power-in-suspend;
    539	mmc-pwrseq = <&sdio_pwrseq>;
    540	non-removable;
    541	pinctrl-names = "default";
    542	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
    543	sd-uhs-sdr104;
    544	vmmc-supply = <&vcc3v3_sys>;
    545	vqmmc-supply = <&vcc_1v8>;
    546	status = "okay";
    547};
    548
    549/*
    550 * spi3 is exposed on CM1 / Module1A
    551 * pin 37 - spi3_cs1_m0
    552 * pin 38 - spi3_clk_m0
    553 * pin 39 - spi3_cs0_m0
    554 * pin 40 - spi3_miso_m0, shared with i2s1_8ch
    555 * pin 44 - spi3_mosi_m0
    556 */
    557&spi3 {
    558	status = "disabled";
    559};
    560
    561&tsadc {
    562	status = "okay";
    563};
    564
    565&uart1 {
    566	pinctrl-names = "default";
    567	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
    568	uart-has-rtscts;
    569	status = "okay";
    570
    571	bluetooth {
    572		compatible = "brcm,bcm43438-bt";
    573		clocks = <&rk809 1>;
    574		clock-names = "lpo";
    575		device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
    576		host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
    577		shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
    578		pinctrl-names = "default";
    579		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
    580		vbat-supply = <&vcc3v3_sys>;
    581		vddio-supply = <&vcca1v8_pmu>;
    582	};
    583};
    584
    585/*
    586 * uart2 is exposed on CM1 / Module1A
    587 * pin 51 - uart2_rx_m0
    588 * pin 55 - uart2_tx_m0
    589 */
    590&uart2 {
    591	status = "disabled";
    592};
    593
    594/*
    595 * uart7 is exposed on CM1 / Module1A
    596 * pin 46 - uart7_tx_m2
    597 * pin 47 - uart7_rx_m2
    598 */
    599&uart7 {
    600	pinctrl-names = "default";
    601	pinctrl-0 = <&uart7m2_xfer>;
    602	status = "disabled";
    603};
    604
    605/* dwc3_otg is the only usb port available */
    606&usb2phy0 {
    607	status = "disabled";
    608};
    609
    610&usb2phy0_otg {
    611	status = "disabled";
    612};
    613
    614&usb_host0_xhci {
    615	status = "disabled";
    616};